authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-21 14:02:24+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-21 22:38:30+02:00
log9848623e62d75507d94f4e4276c5e5c888d99f5d
tree932b7440c7ec6528da5f79834516390430e38b89
parent08cddaf11c7bac5fba2e696ed6b99d1f7b730543
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Remove the `renderscript32`/`renderscript64` arch tags.

It's dead: https://developer.android.com/guide/topics/renderscript/migrate

6 files changed, 0 insertions(+), 34 deletions(-)

lib/compiler/aro/aro/target.zig-6
...@@ -488,7 +488,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -488,7 +488,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
488 .shave,488 .shave,
489 .lanai,489 .lanai,
490 .wasm32,490 .wasm32,
491 .renderscript32,
492 .aarch64_32,491 .aarch64_32,
493 .spirv32,492 .spirv32,
494 .loongarch32,493 .loongarch32,
...@@ -504,7 +503,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -504,7 +503,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
504 .hsail64 => copy.cpu.arch = .hsail,503 .hsail64 => copy.cpu.arch = .hsail,
505 .spir64 => copy.cpu.arch = .spir,504 .spir64 => copy.cpu.arch = .spir,
506 .spirv64 => copy.cpu.arch = .spirv32,505 .spirv64 => copy.cpu.arch = .spirv32,
507 .renderscript64 => copy.cpu.arch = .renderscript32,
508 .loongarch64 => copy.cpu.arch = .loongarch32,506 .loongarch64 => copy.cpu.arch = .loongarch32,
509 .mips64 => copy.cpu.arch = .mips,507 .mips64 => copy.cpu.arch = .mips,
510 .mips64el => copy.cpu.arch = .mipsel,508 .mips64el => copy.cpu.arch = .mipsel,
...@@ -550,7 +548,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -550,7 +548,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
550 .hsail64,548 .hsail64,
551 .spir64,549 .spir64,
552 .spirv64,550 .spirv64,
553 .renderscript64,
554 .loongarch64,551 .loongarch64,
555 .mips64,552 .mips64,
556 .mips64el,553 .mips64el,
...@@ -574,7 +571,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -574,7 +571,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
574 .nvptx => copy.cpu.arch = .nvptx64,571 .nvptx => copy.cpu.arch = .nvptx64,
575 .powerpc => copy.cpu.arch = .powerpc64,572 .powerpc => copy.cpu.arch = .powerpc64,
576 .powerpcle => copy.cpu.arch = .powerpc64le,573 .powerpcle => copy.cpu.arch = .powerpc64le,
577 .renderscript32 => copy.cpu.arch = .renderscript64,
578 .riscv32 => copy.cpu.arch = .riscv64,574 .riscv32 => copy.cpu.arch = .riscv64,
579 .sparc => copy.cpu.arch = .sparc64,575 .sparc => copy.cpu.arch = .sparc64,
580 .spir => copy.cpu.arch = .spir64,576 .spir => copy.cpu.arch = .spir64,
...@@ -651,8 +647,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -651,8 +647,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
651 .lanai => "lanai",647 .lanai => "lanai",
652 .wasm32 => "wasm32",648 .wasm32 => "wasm32",
653 .wasm64 => "wasm64",649 .wasm64 => "wasm64",
654 .renderscript32 => "renderscript32",
655 .renderscript64 => "renderscript64",
656 .ve => "ve",650 .ve => "ve",
657 // Note: spu_2 is not supported in LLVM; this is the Zig arch name651 // Note: spu_2 is not supported in LLVM; this is the Zig arch name
658 .spu_2 => "spu_2",652 .spu_2 => "spu_2",
lib/std/Target.zig-16
...@@ -1026,8 +1026,6 @@ pub const Cpu = struct {...@@ -1026,8 +1026,6 @@ pub const Cpu = struct {
1026 lanai,1026 lanai,
1027 wasm32,1027 wasm32,
1028 wasm64,1028 wasm64,
1029 renderscript32,
1030 renderscript64,
1031 ve,1029 ve,
1032 spu_2,1030 spu_2,
10331031
...@@ -1167,7 +1165,6 @@ pub const Cpu = struct {...@@ -1167,7 +1165,6 @@ pub const Cpu = struct {
1167 .shave => .NONE,1165 .shave => .NONE,
1168 .lanai => .LANAI,1166 .lanai => .LANAI,
1169 .wasm32 => .NONE,1167 .wasm32 => .NONE,
1170 .renderscript32 => .NONE,
1171 .aarch64_32 => .AARCH64,1168 .aarch64_32 => .AARCH64,
1172 .aarch64 => .AARCH64,1169 .aarch64 => .AARCH64,
1173 .aarch64_be => .AARCH64,1170 .aarch64_be => .AARCH64,
...@@ -1182,7 +1179,6 @@ pub const Cpu = struct {...@@ -1182,7 +1179,6 @@ pub const Cpu = struct {
1182 .hsail64 => .NONE,1179 .hsail64 => .NONE,
1183 .spir64 => .NONE,1180 .spir64 => .NONE,
1184 .wasm64 => .NONE,1181 .wasm64 => .NONE,
1185 .renderscript64 => .NONE,
1186 .amdgcn => .AMDGPU,1182 .amdgcn => .AMDGPU,
1187 .bpfel => .BPF,1183 .bpfel => .BPF,
1188 .bpfeb => .BPF,1184 .bpfeb => .BPF,
...@@ -1231,7 +1227,6 @@ pub const Cpu = struct {...@@ -1231,7 +1227,6 @@ pub const Cpu = struct {
1231 .shave => .Unknown,1227 .shave => .Unknown,
1232 .lanai => .Unknown,1228 .lanai => .Unknown,
1233 .wasm32 => .Unknown,1229 .wasm32 => .Unknown,
1234 .renderscript32 => .Unknown,
1235 .aarch64_32 => .ARM64,1230 .aarch64_32 => .ARM64,
1236 .aarch64 => .ARM64,1231 .aarch64 => .ARM64,
1237 .aarch64_be => .ARM64,1232 .aarch64_be => .ARM64,
...@@ -1246,7 +1241,6 @@ pub const Cpu = struct {...@@ -1246,7 +1241,6 @@ pub const Cpu = struct {
1246 .hsail64 => .Unknown,1241 .hsail64 => .Unknown,
1247 .spir64 => .Unknown,1242 .spir64 => .Unknown,
1248 .wasm64 => .Unknown,1243 .wasm64 => .Unknown,
1249 .renderscript64 => .Unknown,
1250 .amdgcn => .Unknown,1244 .amdgcn => .Unknown,
1251 .bpfel => .Unknown,1245 .bpfel => .Unknown,
1252 .bpfeb => .Unknown,1246 .bpfeb => .Unknown,
...@@ -1299,8 +1293,6 @@ pub const Cpu = struct {...@@ -1299,8 +1293,6 @@ pub const Cpu = struct {
1299 .thumb,1293 .thumb,
1300 .spir,1294 .spir,
1301 .spir64,1295 .spir64,
1302 .renderscript32,
1303 .renderscript64,
1304 .shave,1296 .shave,
1305 .ve,1297 .ve,
1306 .spu_2,1298 .spu_2,
...@@ -1794,8 +1786,6 @@ pub const DynamicLinker = struct {...@@ -1794,8 +1786,6 @@ pub const DynamicLinker = struct {
1794 .kalimba,1786 .kalimba,
1795 .shave,1787 .shave,
1796 .lanai,1788 .lanai,
1797 .renderscript32,
1798 .renderscript64,
1799 .ve,1789 .ve,
1800 .dxil,1790 .dxil,
1801 .loongarch32,1791 .loongarch32,
...@@ -1901,7 +1891,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1901,7 +1891,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1901 .shave,1891 .shave,
1902 .lanai,1892 .lanai,
1903 .wasm32,1893 .wasm32,
1904 .renderscript32,
1905 .aarch64_32,1894 .aarch64_32,
1906 .spirv32,1895 .spirv32,
1907 .loongarch32,1896 .loongarch32,
...@@ -1922,7 +1911,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1922,7 +1911,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1922 .hsail64,1911 .hsail64,
1923 .spir64,1912 .spir64,
1924 .wasm64,1913 .wasm64,
1925 .renderscript64,
1926 .amdgcn,1914 .amdgcn,
1927 .bpfel,1915 .bpfel,
1928 .bpfeb,1916 .bpfeb,
...@@ -2426,7 +2414,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2426,7 +2414,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2426 .spirv32,2414 .spirv32,
2427 .kalimba,2415 .kalimba,
2428 .shave,2416 .shave,
2429 .renderscript32,
2430 .ve,2417 .ve,
2431 .spu_2,2418 .spu_2,
2432 .xtensa,2419 .xtensa,
...@@ -2453,7 +2440,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2453,7 +2440,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2453 .s390x,2440 .s390x,
2454 .spir64,2441 .spir64,
2455 .spirv64,2442 .spirv64,
2456 .renderscript64,
2457 => 8,2443 => 8,
24582444
2459 .aarch64,2445 .aarch64,
...@@ -2545,7 +2531,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2545,7 +2531,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2545 .spirv32,2531 .spirv32,
2546 .kalimba,2532 .kalimba,
2547 .shave,2533 .shave,
2548 .renderscript32,
2549 .ve,2534 .ve,
2550 .spu_2,2535 .spu_2,
2551 .xtensa,2536 .xtensa,
...@@ -2579,7 +2564,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2579,7 +2564,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2579 .s390x,2564 .s390x,
2580 .spir64,2565 .spir64,
2581 .spirv64,2566 .spirv64,
2582 .renderscript64,
2583 => 8,2567 => 8,
25842568
2585 .aarch64,2569 .aarch64,
src/Type.zig-2
...@@ -1655,14 +1655,12 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1655,14 +1655,12 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1655 .hsail,1655 .hsail,
1656 .spir,1656 .spir,
1657 .kalimba,1657 .kalimba,
1658 .renderscript32,
1659 .spirv,1658 .spirv,
1660 .spirv32,1659 .spirv32,
1661 .shave,1660 .shave,
1662 .amdil64,1661 .amdil64,
1663 .hsail64,1662 .hsail64,
1664 .spir64,1663 .spir64,
1665 .renderscript64,
1666 .ve,1664 .ve,
1667 .spirv64,1665 .spirv64,
1668 .dxil,1666 .dxil,
src/Zcu.zig-2
...@@ -3263,7 +3263,6 @@ pub fn atomicPtrAlignment(...@@ -3263,7 +3263,6 @@ pub fn atomicPtrAlignment(
3263 .lanai,3263 .lanai,
3264 .shave,3264 .shave,
3265 .wasm32,3265 .wasm32,
3266 .renderscript32,
3267 .csky,3266 .csky,
3268 .spirv32,3267 .spirv32,
3269 .dxil,3268 .dxil,
...@@ -3286,7 +3285,6 @@ pub fn atomicPtrAlignment(...@@ -3286,7 +3285,6 @@ pub fn atomicPtrAlignment(
3286 .hsail64,3285 .hsail64,
3287 .spir64,3286 .spir64,
3288 .wasm64,3287 .wasm64,
3289 .renderscript64,
3290 .ve,3288 .ve,
3291 .spirv64,3289 .spirv64,
3292 .loongarch64,3290 .loongarch64,
src/codegen/llvm.zig-6
...@@ -97,8 +97,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -97,8 +97,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
97 .lanai => "lanai",97 .lanai => "lanai",
98 .wasm32 => "wasm32",98 .wasm32 => "wasm32",
99 .wasm64 => "wasm64",99 .wasm64 => "wasm64",
100 .renderscript32 => "renderscript32",
101 .renderscript64 => "renderscript64",
102 .ve => "ve",100 .ve => "ve",
103 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",101 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",
104 };102 };
...@@ -321,8 +319,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -321,8 +319,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
321 .lanai => .lanai,319 .lanai => .lanai,
322 .wasm32 => .wasm32,320 .wasm32 => .wasm32,
323 .wasm64 => .wasm64,321 .wasm64 => .wasm64,
324 .renderscript32 => .renderscript32,
325 .renderscript64 => .renderscript64,
326 .ve => .ve,322 .ve => .ve,
327 .spu_2 => .UnknownArch,323 .spu_2 => .UnknownArch,
328 };324 };
...@@ -12106,8 +12102,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -12106,8 +12102,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12106 .spirv32,12102 .spirv32,
12107 .spirv64,12103 .spirv64,
12108 .kalimba,12104 .kalimba,
12109 .renderscript32,
12110 .renderscript64,
12111 .dxil,12105 .dxil,
12112 => {},12106 => {},
1211312107
src/target.zig-2
...@@ -167,8 +167,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -167,8 +167,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
167 .lanai,167 .lanai,
168 .wasm32,168 .wasm32,
169 .wasm64,169 .wasm64,
170 .renderscript32,
171 .renderscript64,
172 .ve,170 .ve,
173 => true,171 => true,
174172