authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-07 08:46:43+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-07 16:47:57+02:00
log9cd37a06965f1993f6e70ca3f10008d02f77334b
treea5025123558b5b1641ee3594092ab27f5a31a9dc
parentf6403ed5ea05bcdbb55da15ee65204b1c8cdf423
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.debug.Dwarf: use 66 as the (fake) MIPS PC register

32-63 conflict with the floating point registers. 64 and 65 are used for the ac0 hi/lo registers.

2 files changed, 2 insertions(+), 2 deletions(-)

lib/std/debug/Dwarf.zig+1-1
...@@ -1433,7 +1433,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {...@@ -1433,7 +1433,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
1433 .arm, .armeb, .thumb, .thumbeb => 15,1433 .arm, .armeb, .thumb, .thumbeb => 15,
1434 .hexagon => 76,1434 .hexagon => 76,
1435 .loongarch32, .loongarch64 => 64,1435 .loongarch32, .loongarch64 => 64,
1436 .mips, .mipsel, .mips64, .mips64el => 37,1436 .mips, .mipsel, .mips64, .mips64el => 66,
1437 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,1437 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
1438 .riscv32, .riscv32be, .riscv64, .riscv64be => 65,1438 .riscv32, .riscv32be, .riscv64, .riscv64be => 65,
1439 .s390x => 65,1439 .s390x => 65,
lib/std/debug/cpu_context.zig+1-1
...@@ -810,7 +810,7 @@ pub const Mips = extern struct {...@@ -810,7 +810,7 @@ pub const Mips = extern struct {
810 pub fn dwarfRegisterBytes(ctx: *Mips, register_num: u16) DwarfRegisterError![]u8 {810 pub fn dwarfRegisterBytes(ctx: *Mips, register_num: u16) DwarfRegisterError![]u8 {
811 switch (register_num) {811 switch (register_num) {
812 0...31 => return @ptrCast(&ctx.r[register_num]),812 0...31 => return @ptrCast(&ctx.r[register_num]),
813 37 => return @ptrCast(&ctx.pc),813 66 => return @ptrCast(&ctx.pc),
814814
815 else => return error.InvalidRegister,815 else => return error.InvalidRegister,
816 }816 }