| ... | @@ -434,7 +434,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize { | ... | @@ -434,7 +434,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize { |
| 434 | // in a even-aligned register pair. | 434 | // in a even-aligned register pair. |
| 435 | const require_aligned_register_pair = | 435 | const require_aligned_register_pair = |
| 436 | builtin.cpu.arch.isPowerPC32() or | 436 | builtin.cpu.arch.isPowerPC32() or |
| 437 | builtin.cpu.arch.isMIPS() or | 437 | builtin.cpu.arch.isMIPS32() or |
| 438 | builtin.cpu.arch.isArmOrThumb(); | 438 | builtin.cpu.arch.isArmOrThumb(); |
| 439 | | 439 | |
| 440 | // Split a 64bit value into a {LSB,MSB} pair. | 440 | // Split a 64bit value into a {LSB,MSB} pair. |