| ... | @@ -5485,8 +5485,8 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool | ... | @@ -5485,8 +5485,8 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool |
| 5485 | } | 5485 | } |
| 5486 | | 5486 | |
| 5487 | static LLVMTypeRef get_atomic_abi_type(CodeGen *g, IrInstGen *instruction) { | 5487 | static LLVMTypeRef get_atomic_abi_type(CodeGen *g, IrInstGen *instruction) { |
| 5488 | // If the operand type of an atomic operation is not a power of two sized | 5488 | // If the operand type of an atomic operation is not byte sized we need to |
| 5489 | // we need to widen it before using it and then truncate the result. | 5489 | // widen it before using it and then truncate the result. |
| 5490 | | 5490 | |
| 5491 | ir_assert(instruction->value->type->id == ZigTypeIdPointer, instruction); | 5491 | ir_assert(instruction->value->type->id == ZigTypeIdPointer, instruction); |
| 5492 | ZigType *operand_type = instruction->value->type->data.pointer.child_type; | 5492 | ZigType *operand_type = instruction->value->type->data.pointer.child_type; |
| ... | @@ -5498,7 +5498,7 @@ static LLVMTypeRef get_atomic_abi_type(CodeGen *g, IrInstGen *instruction) { | ... | @@ -5498,7 +5498,7 @@ static LLVMTypeRef get_atomic_abi_type(CodeGen *g, IrInstGen *instruction) { |
| 5498 | bool is_signed = operand_type->data.integral.is_signed; | 5498 | bool is_signed = operand_type->data.integral.is_signed; |
| 5499 | | 5499 | |
| 5500 | ir_assert(bit_count != 0, instruction); | 5500 | ir_assert(bit_count != 0, instruction); |
| 5501 | if (bit_count == 1 || !is_power_of_2(bit_count)) { | 5501 | if (!is_power_of_2(bit_count) || bit_count % 8) { |
| 5502 | return get_llvm_type(g, get_int_type(g, is_signed, operand_type->abi_size * 8)); | 5502 | return get_llvm_type(g, get_int_type(g, is_signed, operand_type->abi_size * 8)); |
| 5503 | } else { | 5503 | } else { |
| 5504 | return nullptr; | 5504 | return nullptr; |