authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-06 16:37:40+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-07 16:47:57+02:00
loga5a9ffb90b9427efbad40404a9a830ddb42b88b6
treea0e1647cd753252efec149a212393211fd50b2ec
parent081d6d12a14d99e2e5d892df1a8e9697700c4644
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.debug.cpu_context: check for architecture, i.e. register size, not bitness

We care about the hardware here, not the ABI.

1 files changed, 10 insertions(+), 6 deletions(-)

lib/std/debug/cpu_context.zig+10-6
...@@ -581,12 +581,14 @@ pub const Hexagon = extern struct {...@@ -581,12 +581,14 @@ pub const Hexagon = extern struct {
581/// This is an `extern struct` so that inline assembly in `current` can use field offsets.581/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
582pub const LoongArch = extern struct {582pub const LoongArch = extern struct {
583 /// The numbered general-purpose registers r0 - r31. r0 must be zero.583 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
584 r: [32]usize,584 r: [32]Gpr,
585 pc: usize,585 pc: Gpr,
586
587 pub const Gpr = if (builtin.target.cpu.arch == .loongarch64) u64 else u32;
586588
587 pub inline fn current() LoongArch {589 pub inline fn current() LoongArch {
588 var ctx: LoongArch = undefined;590 var ctx: LoongArch = undefined;
589 asm volatile (if (@sizeOf(usize) == 8)591 asm volatile (if (Gpr == u64)
590 \\ st.d $zero, $t0, 0592 \\ st.d $zero, $t0, 0
591 \\ st.d $ra, $t0, 8593 \\ st.d $ra, $t0, 8
592 \\ st.d $tp, $t0, 16594 \\ st.d $tp, $t0, 16
...@@ -679,12 +681,14 @@ pub const LoongArch = extern struct {...@@ -679,12 +681,14 @@ pub const LoongArch = extern struct {
679/// This is an `extern struct` so that inline assembly in `current` can use field offsets.681/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
680pub const Riscv = extern struct {682pub const Riscv = extern struct {
681 /// The numbered general-purpose registers r0 - r31. r0 must be zero.683 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
682 r: [32]usize,684 r: [32]Gpr,
683 pc: usize,685 pc: Gpr,
686
687 pub const Gpr = if (builtin.target.cpu.arch.isRiscv64()) u64 else u32;
684688
685 pub inline fn current() Riscv {689 pub inline fn current() Riscv {
686 var ctx: Riscv = undefined;690 var ctx: Riscv = undefined;
687 asm volatile (if (@sizeOf(usize) == 8)691 asm volatile (if (Gpr == u64)
688 \\ sd zero, 0(t0)692 \\ sd zero, 0(t0)
689 \\ sd ra, 8(t0)693 \\ sd ra, 8(t0)
690 \\ sd sp, 16(t0)694 \\ sd sp, 16(t0)