authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2025-07-15 23:43:34-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2025-07-16 10:27:40-07:00
logaf084e537adbf571d3d1f69ef5ee3de7abd27ccd
tree084fee5cc721abdc9313c1c36c341478f36c5a44
parentc2fa961b63cc32d9cecb8f33db465667c093f961

add lr register to mips

1 files changed, 2 insertions(+), 0 deletions(-)

lib/std/builtin/assembly.zig+2
......@@ -2062,6 +2062,8 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
20622062 /// addresses other than those derived from input pointer provenance.
20632063 memory: bool = false,
20642064
2065 lr: bool = false,
2066
20652067 hi: bool = false,
20662068 lo: bool = false,
20672069 ac0: bool = false,