authorgravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-04-19 20:33:03+03:30
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-25 19:57:39+02:00
logaf6670c40348bb0e75e48b446a06886f37eb2e4a
tree65785be7dbb477be6d619b99a2087682aceeb64c
parentfd7aafdbd5a1f58577d95afcb7e42dcfe3802c4d
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

Module: ignore `xnack` and `sramecc` features on some gpu models

3 files changed, 56 insertions(+), 0 deletions(-)

src/Compilation.zig+4
...@@ -6010,6 +6010,10 @@ pub fn addCCArgs(...@@ -6010,6 +6010,10 @@ pub fn addCCArgs(
6010 // We communicate float ABI to Clang through the dedicated options further down.6010 // We communicate float ABI to Clang through the dedicated options further down.
6011 if (std.mem.eql(u8, llvm_name, "soft-float")) continue;6011 if (std.mem.eql(u8, llvm_name, "soft-float")) continue;
60126012
6013 // Ignore these until we figure out how to handle the concept of omitting features.
6014 // See https://github.com/ziglang/zig/issues/23539
6015 if (target_util.isDynamicAMDGCNFeature(target, feature)) continue;
6016
6013 argv.appendSliceAssumeCapacity(&[_][]const u8{ "-Xclang", "-target-feature", "-Xclang" });6017 argv.appendSliceAssumeCapacity(&[_][]const u8{ "-Xclang", "-target-feature", "-Xclang" });
6014 const plus_or_minus = "-+"[@intFromBool(is_enabled)];6018 const plus_or_minus = "-+"[@intFromBool(is_enabled)];
6015 const arg = try std.fmt.allocPrint(arena, "{c}{s}", .{ plus_or_minus, llvm_name });6019 const arg = try std.fmt.allocPrint(arena, "{c}{s}", .{ plus_or_minus, llvm_name });
src/Package/Module.zig+4
...@@ -331,6 +331,10 @@ pub fn create(arena: Allocator, options: CreateOptions) !*Package.Module {...@@ -331,6 +331,10 @@ pub fn create(arena: Allocator, options: CreateOptions) !*Package.Module {
331 // Append disabled features after enabled ones, so that their effects aren't overwritten.331 // Append disabled features after enabled ones, so that their effects aren't overwritten.
332 for (target.cpu.arch.allFeaturesList()) |feature| {332 for (target.cpu.arch.allFeaturesList()) |feature| {
333 if (feature.llvm_name) |llvm_name| {333 if (feature.llvm_name) |llvm_name| {
334 // Ignore these until we figure out how to handle the concept of omitting features.
335 // See https://github.com/ziglang/zig/issues/23539
336 if (target_util.isDynamicAMDGCNFeature(target, feature)) continue;
337
334 const is_enabled = target.cpu.features.isEnabled(feature.index);338 const is_enabled = target.cpu.features.isEnabled(feature.index);
335339
336 if (is_enabled) {340 if (is_enabled) {
src/target.zig+48
...@@ -474,6 +474,54 @@ pub fn arePointersLogical(target: std.Target, as: AddressSpace) bool {...@@ -474,6 +474,54 @@ pub fn arePointersLogical(target: std.Target, as: AddressSpace) bool {
474 };474 };
475}475}
476476
477pub fn isDynamicAMDGCNFeature(target: std.Target, feature: std.Target.Cpu.Feature) bool {
478 if (target.cpu.arch != .amdgcn) return false;
479
480 const sramecc_only = &[_]*const std.Target.Cpu.Model{
481 &std.Target.amdgcn.cpu.gfx1010,
482 &std.Target.amdgcn.cpu.gfx1011,
483 &std.Target.amdgcn.cpu.gfx1012,
484 &std.Target.amdgcn.cpu.gfx1013,
485 };
486 const xnack_or_sramecc = &[_]*const std.Target.Cpu.Model{
487 &std.Target.amdgcn.cpu.gfx1030,
488 &std.Target.amdgcn.cpu.gfx1031,
489 &std.Target.amdgcn.cpu.gfx1032,
490 &std.Target.amdgcn.cpu.gfx1033,
491 &std.Target.amdgcn.cpu.gfx1034,
492 &std.Target.amdgcn.cpu.gfx1035,
493 &std.Target.amdgcn.cpu.gfx1036,
494 &std.Target.amdgcn.cpu.gfx1100,
495 &std.Target.amdgcn.cpu.gfx1101,
496 &std.Target.amdgcn.cpu.gfx1102,
497 &std.Target.amdgcn.cpu.gfx1103,
498 &std.Target.amdgcn.cpu.gfx1150,
499 &std.Target.amdgcn.cpu.gfx1151,
500 &std.Target.amdgcn.cpu.gfx1152,
501 &std.Target.amdgcn.cpu.gfx1153,
502 &std.Target.amdgcn.cpu.gfx1200,
503 &std.Target.amdgcn.cpu.gfx1201,
504 };
505 const feature_tag: std.Target.amdgcn.Feature = @enumFromInt(feature.index);
506
507 if (feature_tag == .sramecc) {
508 if (std.mem.indexOfScalar(
509 *const std.Target.Cpu.Model,
510 sramecc_only ++ xnack_or_sramecc,
511 target.cpu.model,
512 )) |_| return true;
513 }
514 if (feature_tag == .xnack) {
515 if (std.mem.indexOfScalar(
516 *const std.Target.Cpu.Model,
517 xnack_or_sramecc,
518 target.cpu.model,
519 )) |_| return true;
520 }
521
522 return false;
523}
524
477pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {525pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
478 // LLD does not support ELFv1. Rather than having LLVM produce ELFv1 code and then linking it526 // LLD does not support ELFv1. Rather than having LLVM produce ELFv1 code and then linking it
479 // into a broken ELFv2 binary, just force LLVM to use ELFv2 as well. This will break when glibc527 // into a broken ELFv2 binary, just force LLVM to use ELFv2 as well. This will break when glibc