| author | |
| committer | |
| log | af78c5567682535ff763dddc785f851dc41bbd04 |
| tree | 1670cda91c50f82fdc00a9708fb2d7510eb316ee |
| parent | 367be3777c7dcdd8ca19de0b2a8e2dc4b91486e0 |
| signature |
3 files changed, 4 insertions(+), 0 deletions(-)
lib/std/math.zig+2| ... | ... | @@ -636,6 +636,7 @@ test shl { |
| 636 | 636 | |
| 637 | 637 | try testing.expect(shl(i8, -1, -100) == -1); |
| 638 | 638 | try testing.expect(shl(i8, -1, 100) == 0); |
| 639 | if (builtin.cpu.arch == .hexagon and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; | |
| 639 | 640 | try testing.expect(@reduce(.And, shl(@Vector(2, i8), .{ -1, 1 }, -100) == @Vector(2, i8){ -1, 0 })); |
| 640 | 641 | try testing.expect(@reduce(.And, shl(@Vector(2, i8), .{ -1, 1 }, 100) == @Vector(2, i8){ 0, 0 })); |
| 641 | 642 | } |
| ... | ... | @@ -684,6 +685,7 @@ test shr { |
| 684 | 685 | |
| 685 | 686 | try testing.expect(shr(i8, -1, -100) == 0); |
| 686 | 687 | try testing.expect(shr(i8, -1, 100) == -1); |
| 688 | if (builtin.cpu.arch == .hexagon and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; | |
| 687 | 689 | try testing.expect(@reduce(.And, shr(@Vector(2, i8), .{ -1, 1 }, -100) == @Vector(2, i8){ 0, 0 })); |
| 688 | 690 | try testing.expect(@reduce(.And, shr(@Vector(2, i8), .{ -1, 1 }, 100) == @Vector(2, i8){ -1, 0 })); |
| 689 | 691 | } |
lib/std/math/isnan.zig+1| ... | ... | @@ -34,6 +34,7 @@ test isSignalNan { |
| 34 | 34 | // See https://github.com/ziglang/zig/issues/14366 |
| 35 | 35 | if (!builtin.cpu.arch.isArm() and |
| 36 | 36 | !builtin.cpu.arch.isAARCH64() and |
| 37 | builtin.cpu.arch != .hexagon and | |
| 37 | 38 | !builtin.cpu.arch.isMIPS32() and |
| 38 | 39 | !builtin.cpu.arch.isPowerPC() and |
| 39 | 40 | builtin.zig_backend != .stage2_c) |
lib/std/math/log10.zig+1| ... | ... | @@ -135,6 +135,7 @@ test log10_int { |
| 135 | 135 | if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO |
| 136 | 136 | if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO |
| 137 | 137 | if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.cpu.arch.isWasm()) return error.SkipZigTest; // TODO |
| 138 | if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.cpu.arch == .hexagon) return error.SkipZigTest; | |
| 138 | 139 | |
| 139 | 140 | inline for ( |
| 140 | 141 | .{ u8, u16, u32, u64, u128, u256, u512 }, |