| ... | ... | @@ -8409,16 +8409,11 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa |
| 8409 | 8409 | if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) { |
| 8410 | 8410 | // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's |
| 8411 | 8411 | // cross compilation CPU info for RISCV. |
| 8412 | | switch (g->zig_target->arch) { |
| 8413 | | case ZigLLVM_riscv32: |
| 8414 | | args.append("-march=rv32ia"); |
| 8415 | | break; |
| 8416 | | case ZigLLVM_riscv64: |
| 8417 | | args.append("-march=rv64ia"); |
| 8418 | | break; |
| 8419 | | default: |
| 8420 | | zig_unreachable(); |
| 8421 | | } |
| 8412 | // TODO: https://github.com/ziglang/zig/issues/2883 |
| 8413 | args.append("-Xclang"); |
| 8414 | args.append("-target-feature"); |
| 8415 | args.append("-Xclang"); |
| 8416 | args.append("+a"); |
| 8422 | 8417 | } |
| 8423 | 8418 | } |
| 8424 | 8419 | if (g->zig_target->os == OsFreestanding) { |