Commit b618dbdf6989235242ef35f9b676848794fc2229 | zig

author	Koakuma <koachan@protonmail.com> 2022-05-15 22:10:27+07:00
committer	Koakuma <koachan@protonmail.com> 2022-05-16 23:30:54+07:00
log	b618dbdf6989235242ef35f9b676848794fc2229
tree	cdb359262ef23bd26fc3da7b17d47d0e0a6de6a6
parent	7245aad6895c39fee1f7897add9e18807e880213

stage2: sparc64: Implement SPARCv9 mulx

2 files changed, 11 insertions(+), 1 deletions(-)

src
- arch
  - sparc64
    Emit.zig
    bits.zig

src/arch/sparc64/Emit.zig+3-1

...	...	@@ -94,7 +94,7 @@ pub fn emitMir(
94	94
95	95	.@"or" => try emit.mirArithmetic3Op(inst),
96	96
97		.mulx => @panic("TODO implement sparc64 mulx"),
	97	.mulx => try emit.mirArithmetic3Op(inst),
98	98
99	99	.nop => try emit.mirNop(),
100	100
...	...	@@ -207,6 +207,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {
207	207	.lduw => try emit.writeInstruction(Instruction.lduw(i13, rs1, imm, rd)),
208	208	.ldx => try emit.writeInstruction(Instruction.ldx(i13, rs1, imm, rd)),
209	209	.@"or" => try emit.writeInstruction(Instruction.@"or"(i13, rs1, imm, rd)),
	210	.mulx => try emit.writeInstruction(Instruction.mulx(i13, rs1, imm, rd)),
210	211	.save => try emit.writeInstruction(Instruction.save(i13, rs1, imm, rd)),
211	212	.restore => try emit.writeInstruction(Instruction.restore(i13, rs1, imm, rd)),
212	213	.stb => try emit.writeInstruction(Instruction.stb(i13, rs1, imm, rd)),
...	...	@@ -227,6 +228,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {
227	228	.lduw => try emit.writeInstruction(Instruction.lduw(Register, rs1, rs2, rd)),
228	229	.ldx => try emit.writeInstruction(Instruction.ldx(Register, rs1, rs2, rd)),
229	230	.@"or" => try emit.writeInstruction(Instruction.@"or"(Register, rs1, rs2, rd)),
	231	.mulx => try emit.writeInstruction(Instruction.mulx(Register, rs1, rs2, rd)),
230	232	.save => try emit.writeInstruction(Instruction.save(Register, rs1, rs2, rd)),
231	233	.restore => try emit.writeInstruction(Instruction.restore(Register, rs1, rs2, rd)),
232	234	.stb => try emit.writeInstruction(Instruction.stb(Register, rs1, rs2, rd)),

src/arch/sparc64/bits.zig+8

...	...	@@ -1197,6 +1197,14 @@ pub const Instruction = union(enum) {
1197	1197	};
1198	1198	}
1199	1199
	1200	pub fn mulx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
	1201	return switch (s2) {
	1202	Register => format3a(0b10, 0b00_1001, rs1, rs2, rd),
	1203	i13 => format3b(0b10, 0b00_1001, rs1, rs2, rd),
	1204	else => unreachable,
	1205	};
	1206	}
	1207
1200	1208	pub fn nop() Instruction {
1201	1209	return sethi(0, .g0);
1202	1210	}