authorgravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-05-15 22:10:27+07:00
committergravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-05-16 23:30:54+07:00
logb618dbdf6989235242ef35f9b676848794fc2229
treecdb359262ef23bd26fc3da7b17d47d0e0a6de6a6
parent7245aad6895c39fee1f7897add9e18807e880213

stage2: sparc64: Implement SPARCv9 mulx

2 files changed, 11 insertions(+), 1 deletions(-)

src/arch/sparc64/Emit.zig+3-1
...@@ -94,7 +94,7 @@ pub fn emitMir(...@@ -94,7 +94,7 @@ pub fn emitMir(
9494
95 .@"or" => try emit.mirArithmetic3Op(inst),95 .@"or" => try emit.mirArithmetic3Op(inst),
9696
97 .mulx => @panic("TODO implement sparc64 mulx"),97 .mulx => try emit.mirArithmetic3Op(inst),
9898
99 .nop => try emit.mirNop(),99 .nop => try emit.mirNop(),
100100
...@@ -207,6 +207,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -207,6 +207,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {
207 .lduw => try emit.writeInstruction(Instruction.lduw(i13, rs1, imm, rd)),207 .lduw => try emit.writeInstruction(Instruction.lduw(i13, rs1, imm, rd)),
208 .ldx => try emit.writeInstruction(Instruction.ldx(i13, rs1, imm, rd)),208 .ldx => try emit.writeInstruction(Instruction.ldx(i13, rs1, imm, rd)),
209 .@"or" => try emit.writeInstruction(Instruction.@"or"(i13, rs1, imm, rd)),209 .@"or" => try emit.writeInstruction(Instruction.@"or"(i13, rs1, imm, rd)),
210 .mulx => try emit.writeInstruction(Instruction.mulx(i13, rs1, imm, rd)),
210 .save => try emit.writeInstruction(Instruction.save(i13, rs1, imm, rd)),211 .save => try emit.writeInstruction(Instruction.save(i13, rs1, imm, rd)),
211 .restore => try emit.writeInstruction(Instruction.restore(i13, rs1, imm, rd)),212 .restore => try emit.writeInstruction(Instruction.restore(i13, rs1, imm, rd)),
212 .stb => try emit.writeInstruction(Instruction.stb(i13, rs1, imm, rd)),213 .stb => try emit.writeInstruction(Instruction.stb(i13, rs1, imm, rd)),
...@@ -227,6 +228,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -227,6 +228,7 @@ fn mirArithmetic3Op(emit: *Emit, inst: Mir.Inst.Index) !void {
227 .lduw => try emit.writeInstruction(Instruction.lduw(Register, rs1, rs2, rd)),228 .lduw => try emit.writeInstruction(Instruction.lduw(Register, rs1, rs2, rd)),
228 .ldx => try emit.writeInstruction(Instruction.ldx(Register, rs1, rs2, rd)),229 .ldx => try emit.writeInstruction(Instruction.ldx(Register, rs1, rs2, rd)),
229 .@"or" => try emit.writeInstruction(Instruction.@"or"(Register, rs1, rs2, rd)),230 .@"or" => try emit.writeInstruction(Instruction.@"or"(Register, rs1, rs2, rd)),
231 .mulx => try emit.writeInstruction(Instruction.mulx(Register, rs1, rs2, rd)),
230 .save => try emit.writeInstruction(Instruction.save(Register, rs1, rs2, rd)),232 .save => try emit.writeInstruction(Instruction.save(Register, rs1, rs2, rd)),
231 .restore => try emit.writeInstruction(Instruction.restore(Register, rs1, rs2, rd)),233 .restore => try emit.writeInstruction(Instruction.restore(Register, rs1, rs2, rd)),
232 .stb => try emit.writeInstruction(Instruction.stb(Register, rs1, rs2, rd)),234 .stb => try emit.writeInstruction(Instruction.stb(Register, rs1, rs2, rd)),
src/arch/sparc64/bits.zig+8
...@@ -1197,6 +1197,14 @@ pub const Instruction = union(enum) {...@@ -1197,6 +1197,14 @@ pub const Instruction = union(enum) {
1197 };1197 };
1198 }1198 }
11991199
1200 pub fn mulx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
1201 return switch (s2) {
1202 Register => format3a(0b10, 0b00_1001, rs1, rs2, rd),
1203 i13 => format3b(0b10, 0b00_1001, rs1, rs2, rd),
1204 else => unreachable,
1205 };
1206 }
1207
1200 pub fn nop() Instruction {1208 pub fn nop() Instruction {
1201 return sethi(0, .g0);1209 return sethi(0, .g0);
1202 }1210 }