Commit b732070fd36267fb055347e3aa8a1851e4054d50 | zig

build.zig+1-1

...	...	@@ -742,7 +742,7 @@ fn addCmakeCfgOptionsToExe(
742	742	const mod = exe.root_module;
743	743	const target = mod.resolved_target.?.result;
744	744
745		if (target.isDarwin()) {
	745	if (target.os.tag.isDarwin()) {
746	746	// useful for package maintainers
747	747	exe.headerpad_max_install_names = true;
748	748	}

lib/compiler/aro/aro/Compilation.zig+2-2

...	...	@@ -308,7 +308,7 @@ fn generateSystemDefines(comp: *Compilation, w: anytype) !void {
308	308	),
309	309	else => {},
310	310	}
311		if (comp.target.isAndroid()) {
	311	if (comp.target.abi.isAndroid()) {
312	312	try w.writeAll("#define __ANDROID__ 1\n");
313	313	}
314	314
...	...	@@ -734,7 +734,7 @@ pub fn float80Type(comp: *const Compilation) ?Type {
734	734
735	735	/// Smallest integer type with at least N bits
736	736	pub fn intLeastN(comp: *const Compilation, bits: usize, signedness: std.builtin.Signedness) Type {
737		if (bits == 64 and (comp.target.isDarwin() or comp.target.isWasm())) {
	737	if (bits == 64 and (comp.target.os.tag.isDarwin() or comp.target.cpu.arch.isWasm())) {
738	738	// WebAssembly and Darwin use `long long` for `int_least64_t` and `int_fast64_t`.
739	739	return .{ .specifier = if (signedness == .signed) .long_long else .ulong_long };
740	740	}

lib/compiler/aro/aro/Driver/GCCDetector.zig+1-1

...	...	@@ -183,7 +183,7 @@ fn collectLibDirsAndTriples(
183	183	// TODO
184	184	return;
185	185	}
186		if (target.isAndroid()) {
	186	if (target.abi.isAndroid()) {
187	187	const AArch64AndroidTriples: [1][]const u8 = .{"aarch64-linux-android"};
188	188	const ARMAndroidTriples: [1][]const u8 = .{"arm-linux-androideabi"};
189	189	const MIPSELAndroidTriples: [1][]const u8 = .{"mipsel-linux-android"};

lib/compiler/aro/aro/Toolchain.zig+7-7

...	...	@@ -161,7 +161,7 @@ pub fn getLinkerPath(tc: *const Toolchain, buf: []u8) ![]const u8 {
161	161	} else {
162	162	var linker_name = try std.ArrayList(u8).initCapacity(tc.driver.comp.gpa, 5 + use_linker.len); // "ld64." ++ use_linker
163	163	defer linker_name.deinit();
164		if (tc.getTarget().isDarwin()) {
	164	if (tc.getTarget().os.tag.isDarwin()) {
165	165	linker_name.appendSliceAssumeCapacity("ld64.");
166	166	} else {
167	167	linker_name.appendSliceAssumeCapacity("ld.");
...	...	@@ -343,7 +343,7 @@ pub fn buildLinkerArgs(tc: Toolchain, argv: std.ArrayList([]const u8)) !void {
343	343	}
344	344
345	345	fn getDefaultRuntimeLibKind(tc: *const Toolchain) RuntimeLibKind {
346		if (tc.getTarget().isAndroid()) {
	346	if (tc.getTarget().abi.isAndroid()) {
347	347	return .compiler_rt;
348	348	}
349	349	return .libgcc;
...	...	@@ -369,7 +369,7 @@ pub fn getCompilerRt(tc: *const Toolchain, component: []const u8, file_kind: Fil
369	369
370	370	fn getLibGCCKind(tc: *const Toolchain) LibGCCKind {
371	371	const target = tc.getTarget();
372		if (tc.driver.static_libgcc or tc.driver.static or tc.driver.static_pie or target.isAndroid()) {
	372	if (tc.driver.static_libgcc or tc.driver.static or tc.driver.static_pie or target.abi.isAndroid()) {
373	373	return .static;
374	374	}
375	375	if (tc.driver.shared_libgcc) {
...	...	@@ -384,7 +384,7 @@ fn getUnwindLibKind(tc: *const Toolchain) !UnwindLibKind {
384	384	switch (tc.getRuntimeLibKind()) {
385	385	.compiler_rt => {
386	386	const target = tc.getTarget();
387		if (target.isAndroid() or target.os.tag == .aix) {
	387	if (target.abi.isAndroid() or target.os.tag == .aix) {
388	388	return .compiler_rt;
389	389	} else {
390	390	return .none;
...	...	@@ -417,14 +417,14 @@ fn getAsNeededOption(is_solaris: bool, needed: bool) []const u8 {
417	417	fn addUnwindLibrary(tc: const Toolchain, argv: std.ArrayList([]const u8)) !void {
418	418	const unw = try tc.getUnwindLibKind();
419	419	const target = tc.getTarget();
420		if ((target.isAndroid() and unw == .libgcc) or
	420	if ((target.abi.isAndroid() and unw == .libgcc) or
421	421	target.os.tag == .elfiamcu or
422	422	target.ofmt == .wasm or
423	423	target_util.isWindowsMSVCEnvironment(target) or
424	424	unw == .none) return;
425	425
426	426	const lgk = tc.getLibGCCKind();
427		const as_needed = lgk == .unspecified and !target.isAndroid() and !target_util.isCygwinMinGW(target) and target.os.tag != .aix;
	427	const as_needed = lgk == .unspecified and !target.abi.isAndroid() and !target_util.isCygwinMinGW(target) and target.os.tag != .aix;
428	428	if (as_needed) {
429	429	try argv.append(getAsNeededOption(target.os.tag == .solaris, true));
430	430	}
...	...	@@ -483,7 +483,7 @@ pub fn addRuntimeLibs(tc: const Toolchain, argv: std.ArrayList([]const u8)) !v
483	483	},
484	484	}
485	485
486		if (target.isAndroid() and !tc.driver.static and !tc.driver.static_pie) {
	486	if (target.abi.isAndroid() and !tc.driver.static and !tc.driver.static_pie) {
487	487	try argv.append("-ldl");
488	488	}
489	489	}

lib/compiler/aro/aro/Type.zig+1-1

...	...	@@ -1102,7 +1102,7 @@ pub fn alignof(ty: Type, comp: *const Compilation) u29 {
1102	1102	.double => comp.target.cTypeAlignment(.double),
1103	1103	.long_double => comp.target.cTypeAlignment(.longdouble),
1104	1104
1105		.int128, .uint128 => if (comp.target.cpu.arch == .s390x and comp.target.os.tag == .linux and comp.target.isGnu()) 8 else 16,
	1105	.int128, .uint128 => if (comp.target.cpu.arch == .s390x and comp.target.os.tag == .linux and comp.target.abi.isGnu()) 8 else 16,
1106	1106	.fp16, .float16 => 2,
1107	1107
1108	1108	.float128 => 16,

lib/compiler/aro/aro/target.zig+8-13

...	...	@@ -117,8 +117,8 @@ pub fn int64Type(target: std.Target) Type {
117	117
118	118	.sparc64 => return intMaxType(target),
119	119
120		.x86, .x86_64 => if (!target.isDarwin()) return intMaxType(target),
121		.aarch64, .aarch64_be => if (!target.isDarwin() and target.os.tag != .openbsd and target.os.tag != .windows) return .{ .specifier = .long },
	120	.x86, .x86_64 => if (!target.os.tag.isDarwin()) return intMaxType(target),
	121	.aarch64, .aarch64_be => if (!target.os.tag.isDarwin() and target.os.tag != .openbsd and target.os.tag != .windows) return .{ .specifier = .long },
122	122	else => {},
123	123	}
124	124	return .{ .specifier = .long_long };
...	...	@@ -144,7 +144,7 @@ pub fn defaultFunctionAlignment(target: std.Target) u8 {
144	144	}
145	145
146	146	pub fn isTlsSupported(target: std.Target) bool {
147		if (target.isDarwin()) {
	147	if (target.os.tag.isDarwin()) {
148	148	var supported = false;
149	149	switch (target.os.tag) {
150	150	.macos => supported = !(target.os.isAtLeast(.macos, .{ .major = 10, .minor = 7, .patch = 0 }) orelse false),
...	...	@@ -199,7 +199,7 @@ pub fn minZeroWidthBitfieldAlignment(target: std.Target) ?u29 {
199	199	pub fn unnamedFieldAffectsAlignment(target: std.Target) bool {
200	200	switch (target.cpu.arch) {
201	201	.aarch64 => {
202		if (target.isDarwin() or target.os.tag == .windows) return false;
	202	if (target.os.tag.isDarwin() or target.os.tag == .windows) return false;
203	203	return true;
204	204	},
205	205	.armeb => {
...	...	@@ -229,7 +229,7 @@ pub fn packAllEnums(target: std.Target) bool {
229	229	pub fn defaultAlignment(target: std.Target) u29 {
230	230	switch (target.cpu.arch) {
231	231	.avr => return 1,
232		.arm => if (target.isAndroid() or target.os.tag == .ios) return 16 else return 8,
	232	.arm => if (target.abi.isAndroid() or target.os.tag == .ios) return 16 else return 8,
233	233	.sparc => if (std.Target.sparc.featureSetHas(target.cpu.features, .v9)) return 16 else return 8,
234	234	.mips, .mipsel => switch (target.abi) {
235	235	.none, .gnuabi64 => return 16,
...	...	@@ -242,9 +242,8 @@ pub fn defaultAlignment(target: std.Target) u29 {
242	242	pub fn systemCompiler(target: std.Target) LangOpts.Compiler {
243	243	// Android is linux but not gcc, so these checks go first
244	244	// the rest for documentation as fn returns .clang
245		if (target.isDarwin() or
246		target.isAndroid() or
247		target.isBSD() or
	245	if (target.abi.isAndroid() or
	246	target.os.tag.isBSD() or
248	247	target.os.tag == .fuchsia or
249	248	target.os.tag == .solaris or
250	249	target.os.tag == .haiku or
...	...	@@ -268,7 +267,7 @@ pub fn systemCompiler(target: std.Target) LangOpts.Compiler {
268	267
269	268	pub fn hasFloat128(target: std.Target) bool {
270	269	if (target.cpu.arch.isWasm()) return true;
271		if (target.isDarwin()) return false;
	270	if (target.os.tag.isDarwin()) return false;
272	271	if (target.cpu.arch.isPowerPC()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
273	272	return switch (target.os.tag) {
274	273	.dragonfly,
...	...	@@ -461,7 +460,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
461	460	.amdgcn,
462	461	.avr,
463	462	.msp430,
464		.spu_2,
465	463	.ve,
466	464	.bpfel,
467	465	.bpfeb,
...	...	@@ -522,7 +520,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
522	520	.lanai,
523	521	.m68k,
524	522	.msp430,
525		.spu_2,
526	523	.xcore,
527	524	.xtensa,
528	525	=> return null,
...	...	@@ -620,8 +617,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
620	617	.wasm32 => "wasm32",
621	618	.wasm64 => "wasm64",
622	619	.ve => "ve",
623		// Note: spu_2 is not supported in LLVM; this is the Zig arch name
624		.spu_2 => "spu_2",
625	620	};
626	621	writer.writeAll(llvm_arch) catch unreachable;
627	622	writer.writeByte('-') catch unreachable;

lib/compiler/aro/aro/toolchains/Linux.zig+7-7

...	...	@@ -27,7 +27,7 @@ pub fn discover(self: Linux, tc: Toolchain) !void {
27	27	fn buildExtraOpts(self: Linux, tc: const Toolchain) !void {
28	28	const gpa = tc.driver.comp.gpa;
29	29	const target = tc.getTarget();
30		const is_android = target.isAndroid();
	30	const is_android = target.abi.isAndroid();
31	31	if (self.distro.isAlpine() or is_android) {
32	32	try self.extra_opts.ensureUnusedCapacity(gpa, 2);
33	33	self.extra_opts.appendAssumeCapacity("-z");
...	...	@@ -113,7 +113,7 @@ fn findPaths(self: Linux, tc: Toolchain) !void {
113	113	try tc.addPathIfExists(&.{ sysroot, "/lib", multiarch_triple }, .file);
114	114	try tc.addPathIfExists(&.{ sysroot, "/lib", "..", os_lib_dir }, .file);
115	115
116		if (target.isAndroid()) {
	116	if (target.abi.isAndroid()) {
117	117	// TODO
118	118	}
119	119	try tc.addPathIfExists(&.{ sysroot, "/usr", "lib", multiarch_triple }, .file);
...	...	@@ -156,7 +156,7 @@ fn getStatic(self: const Linux, d: const Driver) bool {
156	156
157	157	pub fn getDefaultLinker(self: *const Linux, target: std.Target) []const u8 {
158	158	_ = self;
159		if (target.isAndroid()) {
	159	if (target.abi.isAndroid()) {
160	160	return "ld.lld";
161	161	}
162	162	return "ld";
...	...	@@ -169,7 +169,7 @@ pub fn buildLinkerArgs(self: const Linux, tc: const Toolchain, argv: *std.Arra
169	169	const is_pie = self.getPIE(d);
170	170	const is_static_pie = try self.getStaticPIE(d);
171	171	const is_static = self.getStatic(d);
172		const is_android = target.isAndroid();
	172	const is_android = target.abi.isAndroid();
173	173	const is_iamcu = target.os.tag == .elfiamcu;
174	174	const is_ve = target.cpu.arch == .ve;
175	175	const has_crt_begin_end_files = target.abi != .none; // TODO: clang checks for MIPS vendor
...	...	@@ -326,7 +326,7 @@ pub fn buildLinkerArgs(self: const Linux, tc: const Toolchain, argv: *std.Arra
326	326	}
327	327
328	328	fn getMultiarchTriple(target: std.Target) ?[]const u8 {
329		const is_android = target.isAndroid();
	329	const is_android = target.abi.isAndroid();
330	330	const is_mips_r6 = std.Target.mips.featureSetHas(target.cpu.features, .mips32r6);
331	331	return switch (target.cpu.arch) {
332	332	.arm, .thumb => if (is_android) "arm-linux-androideabi" else if (target.abi == .gnueabihf) "arm-linux-gnueabihf" else "arm-linux-gnueabi",
...	...	@@ -380,7 +380,7 @@ pub fn defineSystemIncludes(self: const Linux, tc: const Toolchain) !void {
380	380
381	381	// musl prefers /usr/include before builtin includes, so musl targets will add builtins
382	382	// at the end of this function (unless disabled with nostdlibinc)
383		if (!tc.driver.nobuiltininc and (!target.isMusl() or tc.driver.nostdlibinc)) {
	383	if (!tc.driver.nobuiltininc and (!target.abi.isMusl() or tc.driver.nostdlibinc)) {
384	384	try comp.addBuiltinIncludeDir(tc.driver.aro_name);
385	385	}
386	386
...	...	@@ -411,7 +411,7 @@ pub fn defineSystemIncludes(self: const Linux, tc: const Toolchain) !void {
411	411	try comp.addSystemIncludeDir("/usr/include");
412	412
413	413	std.debug.assert(!tc.driver.nostdlibinc);
414		if (!tc.driver.nobuiltininc and target.isMusl()) {
	414	if (!tc.driver.nobuiltininc and target.abi.isMusl()) {
415	415	try comp.addBuiltinIncludeDir(tc.driver.aro_name);
416	416	}
417	417	}

lib/compiler_rt/common.zig+3-3

...	...	@@ -14,7 +14,7 @@ else
14	14	/// For WebAssembly this allows the symbol to be resolved to other modules, but will not
15	15	/// export it to the host runtime.
16	16	pub const visibility: std.builtin.SymbolVisibility =
17		if (builtin.target.isWasm() and linkage != .internal) .hidden else .default;
	17	if (builtin.target.cpu.arch.isWasm() and linkage != .internal) .hidden else .default;
18	18
19	19	pub const want_aeabi = switch (builtin.abi) {
20	20	.eabi,
...	...	@@ -92,7 +92,7 @@ pub const panic = if (builtin.is_test) std.debug.FullPanic(std.debug.defaultPani
92	92	pub fn F16T(comptime OtherType: type) type {
93	93	return switch (builtin.cpu.arch) {
94	94	.arm, .armeb, .thumb, .thumbeb => if (std.Target.arm.featureSetHas(builtin.cpu.features, .has_v8))
95		switch (builtin.abi.floatAbi()) {
	95	switch (builtin.abi.float()) {
96	96	.soft => u16,
97	97	.hard => f16,
98	98	}
...	...	@@ -100,7 +100,7 @@ pub fn F16T(comptime OtherType: type) type {
100	100	u16,
101	101	.aarch64, .aarch64_be => f16,
102	102	.riscv32, .riscv64 => f16,
103		.x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) {
	103	.x86, .x86_64 => if (builtin.target.os.tag.isDarwin()) switch (OtherType) {
104	104	// Starting with LLVM 16, Darwin uses different abi for f16
105	105	// depending on the type of the other return/argument..???
106	106	f32, f64 => u16,

lib/std/Build/Step/Compile.zig+3-3

...	...	@@ -465,7 +465,7 @@ pub fn create(owner: std.Build, options: Options) Compile {
465	465	if (compile.linkage != null and compile.linkage.? == .static) {
466	466	compile.out_lib_filename = compile.out_filename;
467	467	} else if (compile.version) \|version\| {
468		if (target.isDarwin()) {
	468	if (target.os.tag.isDarwin()) {
469	469	compile.major_only_filename = owner.fmt("lib{s}.{d}.dylib", .{
470	470	compile.name,
471	471	version.major,
...	...	@@ -480,7 +480,7 @@ pub fn create(owner: std.Build, options: Options) Compile {
480	480	compile.out_lib_filename = compile.out_filename;
481	481	}
482	482	} else {
483		if (target.isDarwin()) {
	483	if (target.os.tag.isDarwin()) {
484	484	compile.out_lib_filename = compile.out_filename;
485	485	} else if (target.os.tag == .windows) {
486	486	compile.out_lib_filename = owner.fmt("{s}.lib", .{compile.name});
...	...	@@ -1524,7 +1524,7 @@ fn getZigArgs(compile: *Compile, fuzz: bool) ![][]const u8 {
1524	1524	try zig_args.append(b.fmt("{}", .{version}));
1525	1525	}
1526	1526
1527		if (compile.rootModuleTarget().isDarwin()) {
	1527	if (compile.rootModuleTarget().os.tag.isDarwin()) {
1528	1528	const install_name = compile.install_name orelse b.fmt("@rpath/{s}{s}{s}", .{
1529	1529	compile.rootModuleTarget().libPrefix(),
1530	1530	compile.name,

lib/std/Target.zig+68-131

...	...	@@ -144,10 +144,6 @@ pub const Os = struct {
144	144	};
145	145	}
146	146
147		pub inline fn isGnuLibC(tag: Os.Tag, abi: Abi) bool {
148		return (tag == .hurd or tag == .linux) and abi.isGnu();
149		}
150
151	147	pub fn defaultVersionRange(tag: Tag, arch: Cpu.Arch, abi: Abi) Os {
152	148	return .{
153	149	.tag = tag,
...	...	@@ -218,23 +214,6 @@ pub const Os = struct {
218	214	.windows => .windows,
219	215	};
220	216	}
221
222		pub fn archName(tag: Tag, arch: Cpu.Arch) [:0]const u8 {
223		return switch (tag) {
224		.linux => switch (arch) {
225		.arm, .armeb, .thumb, .thumbeb => "arm",
226		.aarch64, .aarch64_be => "aarch64",
227		.loongarch32, .loongarch64 => "loongarch",
228		.mips, .mipsel, .mips64, .mips64el => "mips",
229		.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
230		.riscv32, .riscv64 => "riscv",
231		.sparc, .sparc64 => "sparc",
232		.x86, .x86_64 => "x86",
233		else => @tagName(arch),
234		},
235		else => @tagName(arch),
236		};
237		}
238	217	};
239	218
240	219	/// Based on NTDDI version constants from
...	...	@@ -763,6 +742,7 @@ pub const mips = @import("Target/mips.zig");
763	742	pub const msp430 = @import("Target/msp430.zig");
764	743	pub const nvptx = @import("Target/nvptx.zig");
765	744	pub const powerpc = @import("Target/powerpc.zig");
	745	pub const propeller = @import("Target/propeller.zig");
766	746	pub const riscv = @import("Target/riscv.zig");
767	747	pub const sparc = @import("Target/sparc.zig");
768	748	pub const spirv = @import("Target/spirv.zig");
...	...	@@ -772,7 +752,6 @@ pub const wasm = @import("Target/wasm.zig");
772	752	pub const x86 = @import("Target/x86.zig");
773	753	pub const xcore = @import("Target/xcore.zig");
774	754	pub const xtensa = @import("Target/xtensa.zig");
775		pub const propeller = @import("Target/propeller.zig");
776	755
777	756	pub const Abi = enum {
778	757	none,
...	...	@@ -990,7 +969,12 @@ pub const Abi = enum {
990	969	};
991	970	}
992	971
993		pub inline fn floatAbi(abi: Abi) FloatAbi {
	972	pub const Float = enum {
	973	hard,
	974	soft,
	975	};
	976
	977	pub inline fn float(abi: Abi) Float {
994	978	return switch (abi) {
995	979	.androideabi,
996	980	.eabi,
...	...	@@ -1081,20 +1065,17 @@ pub fn toElfMachine(target: Target) std.elf.EM {
1081	1065	.msp430 => .MSP430,
1082	1066	.powerpc, .powerpcle => .PPC,
1083	1067	.powerpc64, .powerpc64le => .PPC64,
	1068	.propeller => .PROPELLER,
1084	1069	.riscv32, .riscv64 => .RISCV,
1085	1070	.s390x => .S390,
1086	1071	.sparc => if (Target.sparc.featureSetHas(target.cpu.features, .v9)) .SPARC32PLUS else .SPARC,
1087	1072	.sparc64 => .SPARCV9,
1088		.spu_2 => .SPU_2,
1089	1073	.ve => .VE,
1090	1074	.x86 => if (target.os.tag == .elfiamcu) .IAMCU else .@"386",
1091	1075	.x86_64 => .X86_64,
1092	1076	.xcore => .XCORE,
1093	1077	.xtensa => .XTENSA,
1094	1078
1095		.propeller1 => .PROPELLER,
1096		.propeller2 => .PROPELLER2,
1097
1098	1079	.nvptx,
1099	1080	.nvptx64,
1100	1081	.spirv,
...	...	@@ -1148,14 +1129,12 @@ pub fn toCoffMachine(target: Target) std.coff.MachineType {
1148	1129	.spirv,
1149	1130	.spirv32,
1150	1131	.spirv64,
1151		.spu_2,
1152	1132	.ve,
1153	1133	.wasm32,
1154	1134	.wasm64,
1155	1135	.xcore,
1156	1136	.xtensa,
1157		.propeller1,
1158		.propeller2,
	1137	.propeller,
1159	1138	=> .UNKNOWN,
1160	1139	};
1161	1140	}
...	...	@@ -1368,8 +1347,7 @@ pub const Cpu = struct {
1368	1347	powerpcle,
1369	1348	powerpc64,
1370	1349	powerpc64le,
1371		propeller1,
1372		propeller2,
	1350	propeller,
1373	1351	riscv32,
1374	1352	riscv64,
1375	1353	s390x,
...	...	@@ -1378,7 +1356,6 @@ pub const Cpu = struct {
1378	1356	spirv,
1379	1357	spirv32,
1380	1358	spirv64,
1381		spu_2,
1382	1359	ve,
1383	1360	wasm32,
1384	1361	wasm64,
...	...	@@ -1520,14 +1497,6 @@ pub const Cpu = struct {
1520	1497	};
1521	1498	}
1522	1499
1523		/// Returns if the architecture is a Parallax propeller architecture.
1524		pub inline fn isPropeller(arch: Arch) bool {
1525		return switch (arch) {
1526		.propeller1, .propeller2 => true,
1527		else => false,
1528		};
1529		}
1530
1531	1500	pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model {
1532	1501	for (arch.allCpuModels()) \|cpu\| {
1533	1502	if (std.mem.eql(u8, cpu_name, cpu.name)) {
...	...	@@ -1564,7 +1533,6 @@ pub const Cpu = struct {
1564	1533	.xcore,
1565	1534	.thumb,
1566	1535	.ve,
1567		.spu_2,
1568	1536	// GPU bitness is opaque. For now, assume little endian.
1569	1537	.spirv,
1570	1538	.spirv32,
...	...	@@ -1572,8 +1540,7 @@ pub const Cpu = struct {
1572	1540	.loongarch32,
1573	1541	.loongarch64,
1574	1542	.arc,
1575		.propeller1,
1576		.propeller2,
	1543	.propeller,
1577	1544	=> .little,
1578	1545
1579	1546	.armeb,
...	...	@@ -1593,26 +1560,6 @@ pub const Cpu = struct {
1593	1560	};
1594	1561	}
1595	1562
1596		/// Returns whether this architecture supports the address space
1597		pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool {
1598		const is_nvptx = arch.isNvptx();
1599		const is_spirv = arch.isSpirV();
1600		const is_gpu = is_nvptx or is_spirv or arch == .amdgcn;
1601		return switch (address_space) {
1602		.generic => true,
1603		.fs, .gs, .ss => arch == .x86_64 or arch == .x86,
1604		.global, .constant, .local, .shared => is_gpu,
1605		.param => is_nvptx,
1606		.input, .output, .uniform, .push_constant, .storage_buffer => is_spirv,
1607		// TODO this should also check how many flash banks the cpu has
1608		.flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr,
1609
1610		// Propeller address spaces:
1611		.cog, .hub => arch.isPropeller(),
1612		.lut => (arch == .propeller2),
1613		};
1614		}
1615
1616	1563	/// Returns a name that matches the lib/std/target/* source file name.
1617	1564	pub fn genericName(arch: Arch) [:0]const u8 {
1618	1565	return switch (arch) {
...	...	@@ -1622,6 +1569,7 @@ pub const Cpu = struct {
1622	1569	.loongarch32, .loongarch64 => "loongarch",
1623	1570	.mips, .mipsel, .mips64, .mips64el => "mips",
1624	1571	.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
	1572	.propeller => "propeller",
1625	1573	.riscv32, .riscv64 => "riscv",
1626	1574	.sparc, .sparc64 => "sparc",
1627	1575	.s390x => "s390x",
...	...	@@ -1629,7 +1577,6 @@ pub const Cpu = struct {
1629	1577	.nvptx, .nvptx64 => "nvptx",
1630	1578	.wasm32, .wasm64 => "wasm",
1631	1579	.spirv, .spirv32, .spirv64 => "spirv",
1632		.propeller1, .propeller2 => "propeller",
1633	1580	else => @tagName(arch),
1634	1581	};
1635	1582	}
...	...	@@ -1770,10 +1717,8 @@ pub const Cpu = struct {
1770	1717	.aarch64_vfabi_sve,
1771	1718	=> &.{ .aarch64, .aarch64_be },
1772	1719
1773		.arm_apcs,
1774	1720	.arm_aapcs,
1775	1721	.arm_aapcs_vfp,
1776		.arm_aapcs16_vfp,
1777	1722	.arm_interrupt,
1778	1723	=> &.{ .arm, .armeb, .thumb, .thumbeb },
1779	1724
...	...	@@ -1813,7 +1758,7 @@ pub const Cpu = struct {
1813	1758	.powerpc_aix_altivec,
1814	1759	=> &.{ .powerpc, .powerpcle },
1815	1760
1816		.wasm_watc,
	1761	.wasm_mvp,
1817	1762	=> &.{ .wasm64, .wasm32 },
1818	1763
1819	1764	.arc_sysv,
...	...	@@ -1854,11 +1799,8 @@ pub const Cpu = struct {
1854	1799	.msp430_eabi,
1855	1800	=> &.{.msp430},
1856	1801
1857		.propeller1_sysv,
1858		=> &.{.propeller1},
1859
1860		.propeller2_sysv,
1861		=> &.{.propeller2},
	1802	.propeller_sysv,
	1803	=> &.{.propeller},
1862	1804
1863	1805	.s390x_sysv,
1864	1806	.s390x_sysv_vx,
...	...	@@ -1937,8 +1879,7 @@ pub const Cpu = struct {
1937	1879	.msp430 => &msp430.cpu.generic,
1938	1880	.powerpc, .powerpcle => &powerpc.cpu.ppc,
1939	1881	.powerpc64, .powerpc64le => &powerpc.cpu.ppc64,
1940		.propeller1 => &propeller.cpu.generic,
1941		.propeller2 => &propeller.cpu.generic,
	1882	.propeller => &propeller.cpu.p1,
1942	1883	.riscv32 => &riscv.cpu.generic_rv32,
1943	1884	.riscv64 => &riscv.cpu.generic_rv64,
1944	1885	.spirv, .spirv32, .spirv64 => &spirv.cpu.generic,
...	...	@@ -1954,7 +1895,6 @@ pub const Cpu = struct {
1954	1895	.xtensa => &xtensa.cpu.generic,
1955	1896
1956	1897	.kalimba,
1957		.spu_2,
1958	1898	=> &S.generic_model,
1959	1899	};
1960	1900	}
...	...	@@ -2015,6 +1955,35 @@ pub const Cpu = struct {
2015	1955	pub fn baseline(arch: Arch, os: Os) Cpu {
2016	1956	return Model.baseline(arch, os).toCpu(arch);
2017	1957	}
	1958
	1959	/// Returns whether this architecture supports `address_space`. If `context` is `null`, this
	1960	/// function simply answers the general question of whether the architecture has any concept
	1961	/// of `address_space`; if non-`null`, the function additionally checks whether
	1962	/// `address_space` is valid in that context.
	1963	pub fn supportsAddressSpace(
	1964	cpu: Cpu,
	1965	address_space: std.builtin.AddressSpace,
	1966	context: ?std.builtin.AddressSpace.Context,
	1967	) bool {
	1968	const arch = cpu.arch;
	1969
	1970	const is_nvptx = arch.isNvptx();
	1971	const is_spirv = arch.isSpirV();
	1972	const is_gpu = is_nvptx or is_spirv or arch == .amdgcn;
	1973
	1974	return switch (address_space) {
	1975	.generic => true,
	1976	.fs, .gs, .ss => (arch == .x86_64 or arch == .x86) and (context == null or context == .pointer),
	1977	.flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr, // TODO this should also check how many flash banks the cpu has
	1978	.cog, .hub => arch == .propeller,
	1979	.lut => arch == .propeller and std.Target.propeller.featureSetHas(cpu.features, .p2),
	1980
	1981	.global, .local, .shared => is_gpu,
	1982	.constant => is_gpu and (context == null or context == .constant),
	1983	.param => is_nvptx,
	1984	.input, .output, .uniform, .push_constant, .storage_buffer => is_spirv,
	1985	};
	1986	}
2018	1987	};
2019	1988
2020	1989	pub fn zigTriple(target: Target, allocator: Allocator) Allocator.Error![]u8 {
...	...	@@ -2054,48 +2023,29 @@ pub fn libPrefix(target: Target) [:0]const u8 {
2054	2023	}
2055	2024
2056	2025	pub inline fn isMinGW(target: Target) bool {
2057		return target.os.tag == .windows and target.isGnu();
2058		}
2059
2060		pub inline fn isGnu(target: Target) bool {
2061		return target.abi.isGnu();
2062		}
2063
2064		pub inline fn isMusl(target: Target) bool {
2065		return target.abi.isMusl();
2066		}
2067
2068		pub inline fn isAndroid(target: Target) bool {
2069		return target.abi.isAndroid();
2070		}
2071
2072		pub inline fn isWasm(target: Target) bool {
2073		return target.cpu.arch.isWasm();
2074		}
2075
2076		pub inline fn isDarwin(target: Target) bool {
2077		return target.os.tag.isDarwin();
2078		}
2079
2080		pub inline fn isBSD(target: Target) bool {
2081		return target.os.tag.isBSD();
	2026	return target.os.tag == .windows and target.abi.isGnu();
2082	2027	}
2083	2028
2084	2029	pub inline fn isGnuLibC(target: Target) bool {
2085		return target.os.tag.isGnuLibC(target.abi);
	2030	return switch (target.os.tag) {
	2031	.hurd, .linux => target.abi.isGnu(),
	2032	else => false,
	2033	};
2086	2034	}
2087	2035
2088		pub inline fn isSpirV(target: Target) bool {
2089		return target.cpu.arch.isSpirV();
	2036	pub inline fn isMuslLibC(target: Target) bool {
	2037	return target.os.tag == .linux and target.abi.isMusl();
2090	2038	}
2091	2039
2092		pub const FloatAbi = enum {
2093		hard,
2094		soft,
2095		};
	2040	pub inline fn isDarwinLibC(target: Target) bool {
	2041	return switch (target.abi) {
	2042	.none, .macabi, .simulator => target.os.tag.isDarwin(),
	2043	else => false,
	2044	};
	2045	}
2096	2046
2097		pub inline fn floatAbi(target: Target) FloatAbi {
2098		return target.abi.floatAbi();
	2047	pub inline fn isWasiLibC(target: Target) bool {
	2048	return target.os.tag == .wasi and target.abi.isMusl();
2099	2049	}
2100	2050
2101	2051	pub const DynamicLinker = struct {
...	...	@@ -2627,7 +2577,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
2627	2577	return switch (cpu.arch) {
2628	2578	.avr,
2629	2579	.msp430,
2630		.spu_2,
2631	2580	=> 16,
2632	2581
2633	2582	.arc,
...	...	@@ -2653,8 +2602,7 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
2653	2602	.spirv32,
2654	2603	.loongarch32,
2655	2604	.xtensa,
2656		.propeller1,
2657		.propeller2,
	2605	.propeller,
2658	2606	=> 32,
2659	2607
2660	2608	.aarch64,
...	...	@@ -2733,7 +2681,7 @@ pub fn stackAlignment(target: Target) u16 {
2733	2681	/// Note that char signedness is implementation-defined and many compilers provide
2734	2682	/// an option to override the default signedness e.g. GCC's -funsigned-char / -fsigned-char
2735	2683	pub fn charSignedness(target: Target) std.builtin.Signedness {
2736		if (target.isDarwin() or target.os.tag == .windows or target.os.tag == .uefi) return .signed;
	2684	if (target.os.tag.isDarwin() or target.os.tag == .windows or target.os.tag == .uefi) return .signed;
2737	2685
2738	2686	return switch (target.cpu.arch) {
2739	2687	.arm,
...	...	@@ -3164,10 +3112,8 @@ pub fn cTypeAlignment(target: Target, c_type: CType) u16 {
3164	3112	.x86,
3165	3113	.xcore,
3166	3114	.kalimba,
3167		.spu_2,
3168	3115	.xtensa,
3169		.propeller1,
3170		.propeller2,
	3116	.propeller,
3171	3117	=> 4,
3172	3118
3173	3119	.arm,
...	...	@@ -3260,10 +3206,8 @@ pub fn cTypePreferredAlignment(target: Target, c_type: CType) u16 {
3260	3206	.csky,
3261	3207	.xcore,
3262	3208	.kalimba,
3263		.spu_2,
3264	3209	.xtensa,
3265		.propeller1,
3266		.propeller2,
	3210	.propeller,
3267	3211	=> 4,
3268	3212
3269	3213	.arc,
...	...	@@ -3330,7 +3274,7 @@ pub fn cCallingConvention(target: Target) ?std.builtin.CallingConvention {
3330	3274	.windows => .{ .aarch64_aapcs_win = .{} },
3331	3275	else => .{ .aarch64_aapcs = .{} },
3332	3276	},
3333		.arm, .armeb, .thumb, .thumbeb => switch (target.abi.floatAbi()) {
	3277	.arm, .armeb, .thumb, .thumbeb => switch (target.abi.float()) {
3334	3278	.soft => .{ .arm_aapcs = .{} },
3335	3279	.hard => .{ .arm_aapcs_vfp = .{} },
3336	3280	},
...	...	@@ -3343,7 +3287,7 @@ pub fn cCallingConvention(target: Target) ?std.builtin.CallingConvention {
3343	3287	.riscv32 => .{ .riscv32_ilp32 = .{} },
3344	3288	.sparc64 => .{ .sparc64_sysv = .{} },
3345	3289	.sparc => .{ .sparc_sysv = .{} },
3346		.powerpc64 => if (target.isMusl())
	3290	.powerpc64 => if (target.abi.isMusl())
3347	3291	.{ .powerpc64_elf_v2 = .{} }
3348	3292	else
3349	3293	.{ .powerpc64_elf = .{} },
...	...	@@ -3352,8 +3296,7 @@ pub fn cCallingConvention(target: Target) ?std.builtin.CallingConvention {
3352	3296	.aix => .{ .powerpc_aix = .{} },
3353	3297	else => .{ .powerpc_sysv = .{} },
3354	3298	},
3355		.wasm32 => .{ .wasm_watc = .{} },
3356		.wasm64 => .{ .wasm_watc = .{} },
	3299	.wasm32, .wasm64 => .{ .wasm_mvp = .{} },
3357	3300	.arc => .{ .arc_sysv = .{} },
3358	3301	.avr => .avr_gnu,
3359	3302	.bpfel, .bpfeb => .{ .bpf_std = .{} },
...	...	@@ -3368,10 +3311,8 @@ pub fn cCallingConvention(target: Target) ?std.builtin.CallingConvention {
3368	3311	else
3369	3312	.{ .m68k_sysv = .{} },
3370	3313	.msp430 => .{ .msp430_eabi = .{} },
3371		.propeller1 => .{ .propeller1_sysv = .{} },
3372		.propeller2 => .{ .propeller2_sysv = .{} },
	3314	.propeller => .{ .propeller_sysv = .{} },
3373	3315	.s390x => .{ .s390x_sysv = .{} },
3374		.spu_2 => null,
3375	3316	.ve => .{ .ve_sysv = .{} },
3376	3317	.xcore => .{ .xcore_xs1 = .{} },
3377	3318	.xtensa => .{ .xtensa_call0 = .{} },
...	...	@@ -3381,10 +3322,6 @@ pub fn cCallingConvention(target: Target) ?std.builtin.CallingConvention {
3381	3322	};
3382	3323	}
3383	3324
3384		pub fn osArchName(target: std.Target) [:0]const u8 {
3385		return target.os.tag.archName(target.cpu.arch);
3386		}
3387
3388	3325	const Target = @This();
3389	3326	const std = @import("std.zig");
3390	3327	const builtin = @import("builtin");

lib/std/Target/Query.zig+2-3

...	...	@@ -26,7 +26,7 @@ os_version_min: ?OsVersion = null,
26	26	os_version_max: ?OsVersion = null,
27	27
28	28	/// `null` means default when cross compiling, or native when `os_tag` is native.
29		/// If `isGnuLibC()` is `false`, this must be `null` and is ignored.
	29	/// If `isGnu()` is `false`, this must be `null` and is ignored.
30	30	glibc_version: ?SemanticVersion = null,
31	31
32	32	/// `null` means default when cross compiling, or native when `os_tag` is native.
...	...	@@ -235,8 +235,7 @@ pub fn parse(args: ParseOptions) !Query {
235	235
236	236	const abi_ver_text = abi_it.rest();
237	237	if (abi_it.next() != null) {
238		const tag = result.os_tag orelse builtin.os.tag;
239		if (tag.isGnuLibC(abi)) {
	238	if (abi.isGnu()) {
240	239	result.glibc_version = parseVersion(abi_ver_text) catch \|err\| switch (err) {
241	240	error.Overflow => return error.InvalidAbiVersion,
242	241	error.InvalidVersion => return error.InvalidAbiVersion,

lib/std/Target/propeller.zig+30-4

...	...	@@ -1,20 +1,46 @@
	1	//! This file is auto-generated by tools/update_cpu_features.zig.
	2
1	3	const std = @import("../std.zig");
2	4	const CpuFeature = std.Target.Cpu.Feature;
3	5	const CpuModel = std.Target.Cpu.Model;
4	6
5		pub const Feature = enum {};
	7	pub const Feature = enum {
	8	p2,
	9	};
6	10
7	11	pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
8	12	pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
9	13	pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
10	14	pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
11	15
12		pub const all_features: [0]CpuFeature = .{};
	16	pub const all_features = blk: {
	17	const len = @typeInfo(Feature).@"enum".fields.len;
	18	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
	19	var result: [len]CpuFeature = undefined;
	20	result[@intFromEnum(Feature.p2)] = .{
	21	.llvm_name = null,
	22	.description = "Enable Propeller 2",
	23	.dependencies = featureSet(&[_]Feature{}),
	24	};
	25	const ti = @typeInfo(Feature);
	26	for (&result, 0..) \|*elem, i\| {
	27	elem.index = i;
	28	elem.name = ti.@"enum".fields[i].name;
	29	}
	30	break :blk result;
	31	};
13	32
14	33	pub const cpu = struct {
15		pub const generic = CpuModel{
16		.name = "generic",
	34	pub const p1: CpuModel = .{
	35	.name = "p1",
17	36	.llvm_name = null,
18	37	.features = featureSet(&[_]Feature{}),
19	38	};
	39	pub const p2: CpuModel = .{
	40	.name = "p2",
	41	.llvm_name = null,
	42	.features = featureSet(&[_]Feature{
	43	.p2,
	44	}),
	45	};
20	46	};

lib/std/Thread.zig+1-1

...	...	@@ -734,7 +734,7 @@ const PosixThreadImpl = struct {
734	734	else => {
735	735	var count: c_int = undefined;
736	736	var count_len: usize = @sizeOf(c_int);
737		const name = if (comptime target.isDarwin()) "hw.logicalcpu" else "hw.ncpu";
	737	const name = if (comptime target.os.tag.isDarwin()) "hw.logicalcpu" else "hw.ncpu";
738	738	posix.sysctlbynameZ(name, &count, &count_len, null, 0) catch \|err\| switch (err) {
739	739	error.NameTooLong, error.UnknownName => unreachable,
740	740	else => \|e\| return e,

lib/std/Thread/Futex.zig+1-1

...	...	@@ -80,7 +80,7 @@ else if (builtin.os.tag == .openbsd)
80	80	OpenbsdImpl
81	81	else if (builtin.os.tag == .dragonfly)
82	82	DragonflyImpl
83		else if (builtin.target.isWasm())
	83	else if (builtin.target.cpu.arch.isWasm())
84	84	WasmImpl
85	85	else if (std.Thread.use_pthreads)
86	86	PosixImpl

lib/std/builtin.zig+19-13

...	...	@@ -220,8 +220,6 @@ pub const CallingConvention = union(enum(u8)) {
220	220	};
221	221	/// Deprecated; use `.x86_thiscall`.
222	222	pub const Thiscall: CallingConvention = .{ .x86_thiscall = .{} };
223		/// Deprecated; do not use.
224		pub const APCS: CallingConvention = .{ .arm_apcs = .{} };
225	223	/// Deprecated; use `.arm_aapcs`.
226	224	pub const AAPCS: CallingConvention = .{ .arm_aapcs = .{} };
227	225	/// Deprecated; use `.arm_aapcs_vfp`.
...	...	@@ -284,14 +282,10 @@ pub const CallingConvention = union(enum(u8)) {
284	282	aarch64_vfabi_sve: CommonOptions,
285	283
286	284	// Calling convetions for the `arm`, `armeb`, `thumb`, and `thumbeb` architectures.
287		/// Deprecated; do not use.
288		arm_apcs: CommonOptions, // Removal of `arm_apcs` is blocked by #21842.
289	285	/// ARM Architecture Procedure Call Standard
290	286	arm_aapcs: CommonOptions,
291	287	/// ARM Architecture Procedure Call Standard Vector Floating-Point
292	288	arm_aapcs_vfp: CommonOptions,
293		/// Deprecated; do not use.
294		arm_aapcs16_vfp: CommonOptions, // Removal of `arm_aapcs16_vfp` is blocked by #21842.
295	289	arm_interrupt: ArmInterruptOptions,
296	290
297	291	// Calling conventions for the `mips64` and `mips64el` architectures.
...	...	@@ -331,7 +325,7 @@ pub const CallingConvention = union(enum(u8)) {
331	325	powerpc_aix_altivec: CommonOptions,
332	326
333	327	/// The standard `wasm32` and `wasm64` calling convention, as specified in the WebAssembly Tool Conventions.
334		wasm_watc: CommonOptions,
	328	wasm_mvp: CommonOptions,
335	329
336	330	/// The standard `arc` calling convention.
337	331	arc_sysv: CommonOptions,
...	...	@@ -371,11 +365,8 @@ pub const CallingConvention = union(enum(u8)) {
371	365	/// The standard `msp430` calling convention.
372	366	msp430_eabi: CommonOptions,
373	367
374		/// The standard `propeller1` calling convention.
375		propeller1_sysv: CommonOptions,
376
377		/// The standard `propeller2` calling convention.
378		propeller2_sysv: CommonOptions,
	368	/// The standard `propeller` calling convention.
	369	propeller_sysv: CommonOptions,
379	370
380	371	// Calling conventions for the `s390x` architecture.
381	372	s390x_sysv: CommonOptions,
...	...	@@ -500,6 +491,21 @@ pub const CallingConvention = union(enum(u8)) {
500	491	/// This data structure is used by the Zig language code generation and
501	492	/// therefore must be kept in sync with the compiler implementation.
502	493	pub const AddressSpace = enum(u5) {
	494	/// The places where a user can specify an address space attribute
	495	pub const Context = enum {
	496	/// A function is specified to be placed in a certain address space.
	497	function,
	498	/// A (global) variable is specified to be placed in a certain address space.
	499	/// In contrast to .constant, these values (and thus the address space they will be
	500	/// placed in) are required to be mutable.
	501	variable,
	502	/// A (global) constant value is specified to be placed in a certain address space.
	503	/// In contrast to .variable, values placed in this address space are not required to be mutable.
	504	constant,
	505	/// A pointer is ascripted to point into a certain address space.
	506	pointer,
	507	};
	508
503	509	// CPU address spaces.
504	510	generic,
505	511	gs,
...	...	@@ -951,7 +957,7 @@ pub const VaList = switch (builtin.cpu.arch) {
951	957	.amdgcn => *u8,
952	958	.avr => *anyopaque,
953	959	.bpfel, .bpfeb => *anyopaque,
954		.hexagon => if (builtin.target.isMusl()) VaListHexagon else *u8,
	960	.hexagon => if (builtin.target.abi.isMusl()) VaListHexagon else *u8,
955	961	.loongarch32, .loongarch64 => *anyopaque,
956	962	.mips, .mipsel, .mips64, .mips64el => *anyopaque,
957	963	.riscv32, .riscv64 => *anyopaque,

lib/std/c.zig+6-6

...	...	@@ -2808,7 +2808,7 @@ pub const Sigaction = switch (native_os) {
2808	2808	.mipsel,
2809	2809	.mips64,
2810	2810	.mips64el,
2811		=> if (builtin.target.isMusl())
	2811	=> if (builtin.target.abi.isMusl())
2812	2812	linux.Sigaction
2813	2813	else if (builtin.target.ptrBitWidth() == 64) extern struct {
2814	2814	pub const handler_fn = *align(1) const fn (i32) callconv(.c) void;
...	...	@@ -6701,7 +6701,7 @@ pub const Stat = switch (native_os) {
6701	6701	return self.ctim;
6702	6702	}
6703	6703	},
6704		.mips, .mipsel => if (builtin.target.isMusl()) extern struct {
	6704	.mips, .mipsel => if (builtin.target.abi.isMusl()) extern struct {
6705	6705	dev: dev_t,
6706	6706	__pad0: [2]i32,
6707	6707	ino: ino_t,
...	...	@@ -6762,7 +6762,7 @@ pub const Stat = switch (native_os) {
6762	6762	return self.ctim;
6763	6763	}
6764	6764	},
6765		.mips64, .mips64el => if (builtin.target.isMusl()) extern struct {
	6765	.mips64, .mips64el => if (builtin.target.abi.isMusl()) extern struct {
6766	6766	dev: dev_t,
6767	6767	__pad0: [3]i32,
6768	6768	ino: ino_t,
...	...	@@ -9863,16 +9863,16 @@ pub const LC = enum(c_int) {
9863	9863
9864	9864	pub extern "c" fn setlocale(category: LC, locale: ?[:0]const u8) ?[:0]const u8;
9865	9865
9866		pub const getcontext = if (builtin.target.isAndroid() or builtin.target.os.tag == .openbsd)
	9866	pub const getcontext = if (builtin.target.abi.isAndroid() or builtin.target.os.tag == .openbsd)
9867	9867	{} // android bionic and openbsd libc does not implement getcontext
9868		else if (native_os == .linux and builtin.target.isMusl())
	9868	else if (native_os == .linux and builtin.target.abi.isMusl())
9869	9869	linux.getcontext
9870	9870	else
9871	9871	private.getcontext;
9872	9872
9873	9873	pub const max_align_t = if (native_abi == .msvc or native_abi == .itanium)
9874	9874	f64
9875		else if (builtin.target.isDarwin())
	9875	else if (native_os.isDarwin())
9876	9876	c_longdouble
9877	9877	else
9878	9878	extern struct {

lib/std/c/darwin.zig+1-1

...	...	@@ -979,7 +979,7 @@ pub const kevent64_s = extern struct {
979	979	// to make sure the struct is laid out the same. These values were
980	980	// produced from C code using the offsetof macro.
981	981	comptime {
982		if (builtin.target.isDarwin()) {
	982	if (builtin.target.os.tag.isDarwin()) {
983	983	assert(@offsetOf(kevent64_s, "ident") == 0);
984	984	assert(@offsetOf(kevent64_s, "filter") == 8);
985	985	assert(@offsetOf(kevent64_s, "flags") == 10);

lib/std/debug.zig+4-4

...	...	@@ -292,7 +292,7 @@ pub fn dumpHexFallible(bytes: []const u8) !void {
292	292	/// TODO multithreaded awareness
293	293	pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
294	294	nosuspend {
295		if (builtin.target.isWasm()) {
	295	if (builtin.target.cpu.arch.isWasm()) {
296	296	if (native_os == .wasi) {
297	297	const stderr = io.getStdErr().writer();
298	298	stderr.print("Unable to dump stack trace: not implemented for Wasm\n", .{}) catch return;
...	...	@@ -380,7 +380,7 @@ pub inline fn getContext(context: *ThreadContext) bool {
380	380	/// TODO multithreaded awareness
381	381	pub fn dumpStackTraceFromBase(context: *ThreadContext) void {
382	382	nosuspend {
383		if (builtin.target.isWasm()) {
	383	if (builtin.target.cpu.arch.isWasm()) {
384	384	if (native_os == .wasi) {
385	385	const stderr = io.getStdErr().writer();
386	386	stderr.print("Unable to dump stack trace: not implemented for Wasm\n", .{}) catch return;
...	...	@@ -478,7 +478,7 @@ pub fn captureStackTrace(first_address: ?usize, stack_trace: *std.builtin.StackT
478	478	/// TODO multithreaded awareness
479	479	pub fn dumpStackTrace(stack_trace: std.builtin.StackTrace) void {
480	480	nosuspend {
481		if (builtin.target.isWasm()) {
	481	if (builtin.target.cpu.arch.isWasm()) {
482	482	if (native_os == .wasi) {
483	483	const stderr = io.getStdErr().writer();
484	484	stderr.print("Unable to dump stack trace: not implemented for Wasm\n", .{}) catch return;
...	...	@@ -759,7 +759,7 @@ pub const StackIterator = struct {
759	759	pub fn initWithContext(first_address: ?usize, debug_info: SelfInfo, context: posix.ucontext_t) !StackIterator {
760	760	// The implementation of DWARF unwinding on aarch64-macos is not complete. However, Apple mandates that
761	761	// the frame pointer register is always used, so on this platform we can safely use the FP-based unwinder.
762		if (builtin.target.isDarwin() and native_arch == .aarch64)
	762	if (builtin.target.os.tag.isDarwin() and native_arch == .aarch64)
763	763	return init(first_address, @truncate(context.mcontext.ss.fp));
764	764
765	765	if (SelfInfo.supports_unwinding) {

lib/std/debug/Dwarf/abi.zig-1

...	...	@@ -17,7 +17,6 @@ pub fn supportsUnwinding(target: std.Target) bool {
17	17	.spirv,
18	18	.spirv32,
19	19	.spirv64,
20		.spu_2,
21	20	=> false,
22	21
23	22	// Enabling this causes relocation errors such as:

lib/std/debug/SelfInfo.zig+4-4

...	...	@@ -121,13 +121,13 @@ pub fn deinit(self: *SelfInfo) void {
121	121	}
122	122
123	123	pub fn getModuleForAddress(self: SelfInfo, address: usize) !Module {
124		if (builtin.target.isDarwin()) {
	124	if (builtin.target.os.tag.isDarwin()) {
125	125	return self.lookupModuleDyld(address);
126	126	} else if (native_os == .windows) {
127	127	return self.lookupModuleWin32(address);
128	128	} else if (native_os == .haiku) {
129	129	return self.lookupModuleHaiku(address);
130		} else if (builtin.target.isWasm()) {
	130	} else if (builtin.target.cpu.arch.isWasm()) {
131	131	return self.lookupModuleWasm(address);
132	132	} else {
133	133	return self.lookupModuleDl(address);
...	...	@@ -138,13 +138,13 @@ pub fn getModuleForAddress(self: SelfInfo, address: usize) !Module {
138	138	// This can be called when getModuleForAddress fails, so implementations should provide
139	139	// a path that doesn't rely on any side-effects of a prior successful module lookup.
140	140	pub fn getModuleNameForAddress(self: *SelfInfo, address: usize) ?[]const u8 {
141		if (builtin.target.isDarwin()) {
	141	if (builtin.target.os.tag.isDarwin()) {
142	142	return self.lookupModuleNameDyld(address);
143	143	} else if (native_os == .windows) {
144	144	return self.lookupModuleNameWin32(address);
145	145	} else if (native_os == .haiku) {
146	146	return null;
147		} else if (builtin.target.isWasm()) {
	147	} else if (builtin.target.cpu.arch.isWasm()) {
148	148	return null;
149	149	} else {
150	150	return self.lookupModuleNameDl(address);

lib/std/elf.zig-2

...	...	@@ -1178,8 +1178,6 @@ pub const EM = enum(u16) {
1178	1178	MIPS_RS3_LE = 10,
1179	1179	/// Old version of Sparc v9, from before the ABI (deprecated)
1180	1180	OLD_SPARCV9 = 11,
1181		/// SPU Mark II
1182		SPU_2 = 13,
1183	1181	/// HPPA
1184	1182	PARISC = 15,
1185	1183	/// Fujitsu VPP500 (also old version of PowerPC; deprecated)

lib/std/fs/Dir.zig+1-1

...	...	@@ -2587,7 +2587,7 @@ const CopyFileRawError = error{SystemResources} \|\| posix.CopyFileRangeError \|\| p
2587	2587	// The copy starts at offset 0, the initial offsets are preserved.
2588	2588	// No metadata is transferred over.
2589	2589	fn copy_file(fd_in: posix.fd_t, fd_out: posix.fd_t, maybe_size: ?u64) CopyFileRawError!void {
2590		if (builtin.target.isDarwin()) {
	2590	if (builtin.target.os.tag.isDarwin()) {
2591	2591	const rc = posix.system.fcopyfile(fd_in, fd_out, null, .{ .DATA = true });
2592	2592	switch (posix.errno(rc)) {
2593	2593	.SUCCESS => return,

lib/std/heap.zig+3-3

...	...	@@ -348,7 +348,7 @@ pub const page_allocator: Allocator = if (@hasDecl(root, "os") and
348	348	@hasDecl(root.os, "heap") and
349	349	@hasDecl(root.os.heap, "page_allocator"))
350	350	root.os.heap.page_allocator
351		else if (builtin.target.isWasm()) .{
	351	else if (builtin.target.cpu.arch.isWasm()) .{
352	352	.ptr = undefined,
353	353	.vtable = &WasmAllocator.vtable,
354	354	} else if (builtin.target.os.tag == .plan9) .{
...	...	@@ -508,7 +508,7 @@ test PageAllocator {
508	508	const allocator = page_allocator;
509	509	try testAllocator(allocator);
510	510	try testAllocatorAligned(allocator);
511		if (!builtin.target.isWasm()) {
	511	if (!builtin.target.cpu.arch.isWasm()) {
512	512	try testAllocatorLargeAlignment(allocator);
513	513	try testAllocatorAlignedShrink(allocator);
514	514	}
...	...	@@ -990,7 +990,7 @@ test {
990	990	_ = FixedBufferAllocator;
991	991	_ = ThreadSafeAllocator;
992	992	_ = SbrkAllocator;
993		if (builtin.target.isWasm()) {
	993	if (builtin.target.cpu.arch.isWasm()) {
994	994	_ = WasmAllocator;
995	995	}
996	996	if (!builtin.single_threaded) _ = smp_allocator;

lib/std/heap/WasmAllocator.zig+1-1

...	...	@@ -7,7 +7,7 @@ const wasm = std.wasm;
7	7	const math = std.math;
8	8
9	9	comptime {
10		if (!builtin.target.isWasm()) {
	10	if (!builtin.target.cpu.arch.isWasm()) {
11	11	@compileError("only available for wasm32 arch");
12	12	}
13	13	if (!builtin.single_threaded) {

lib/std/heap/debug_allocator.zig+2-2

...	...	@@ -1140,7 +1140,7 @@ test "shrink" {
1140	1140	}
1141	1141
1142	1142	test "large object - grow" {
1143		if (builtin.target.isWasm()) {
	1143	if (builtin.target.cpu.arch.isWasm()) {
1144	1144	// Not expected to pass on targets that do not have memory mapping.
1145	1145	return error.SkipZigTest;
1146	1146	}
...	...	@@ -1319,7 +1319,7 @@ test "realloc large object to larger alignment" {
1319	1319	}
1320	1320
1321	1321	test "large object rejects shrinking to small" {
1322		if (builtin.target.isWasm()) {
	1322	if (builtin.target.cpu.arch.isWasm()) {
1323	1323	// Not expected to pass on targets that do not have memory mapping.
1324	1324	return error.SkipZigTest;
1325	1325	}

lib/std/math/big/int_test.zig+1-1

...	...	@@ -2262,7 +2262,7 @@ test "bitNotWrap more than two limbs" {
2262	2262	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2263	2263	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
2264	2264	// LLVM: unexpected runtime library name: __umodei4
2265		if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.isWasm()) return error.SkipZigTest; // TODO
	2265	if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.cpu.arch.isWasm()) return error.SkipZigTest; // TODO
2266	2266
2267	2267	var a = try Managed.initSet(testing.allocator, maxInt(Limb));
2268	2268	defer a.deinit();

lib/std/math/gamma.zig+1-1

...	...	@@ -263,7 +263,7 @@ test gamma {
263	263	}
264	264
265	265	test "gamma.special" {
266		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	266	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
267	267
268	268	inline for (&.{ f32, f64 }) \|T\| {
269	269	try expect(std.math.isNan(gamma(T, -std.math.nan(T))));

lib/std/math/log10.zig+1-1

...	...	@@ -135,7 +135,7 @@ test log10_int {
135	135	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
136	136	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
137	137	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
138		if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.isWasm()) return error.SkipZigTest; // TODO
	138	if (builtin.zig_backend == .stage2_llvm and comptime builtin.target.cpu.arch.isWasm()) return error.SkipZigTest; // TODO
139	139
140	140	inline for (
141	141	.{ u8, u16, u32, u64, u128, u256, u512 },

lib/std/posix.zig+2-2

...	...	@@ -3583,7 +3583,7 @@ pub fn socket(domain: u32, socket_type: u32, protocol: u32) SocketError!socket_t
3583	3583	return rc;
3584	3584	}
3585	3585
3586		const have_sock_flags = !builtin.target.isDarwin() and native_os != .haiku;
	3586	const have_sock_flags = !builtin.target.os.tag.isDarwin() and native_os != .haiku;
3587	3587	const filtered_sock_type = if (!have_sock_flags)
3588	3588	socket_type & ~@as(u32, SOCK.NONBLOCK \| SOCK.CLOEXEC)
3589	3589	else
...	...	@@ -3879,7 +3879,7 @@ pub fn accept(
3879	3879	/// description of the `CLOEXEC` flag in `open` for reasons why this may be useful.
3880	3880	flags: u32,
3881	3881	) AcceptError!socket_t {
3882		const have_accept4 = !(builtin.target.isDarwin() or native_os == .windows or native_os == .haiku);
	3882	const have_accept4 = !(builtin.target.os.tag.isDarwin() or native_os == .windows or native_os == .haiku);
3883	3883	assert(0 == (flags & ~@as(u32, SOCK.NONBLOCK \| SOCK.CLOEXEC))); // Unsupported flag(s)
3884	3884
3885	3885	const accepted_sock: socket_t = while (true) {

lib/std/zig/LibCDirs.zig+3-3

...	...	@@ -127,7 +127,7 @@ fn detectFromInstallation(arena: Allocator, target: std.Target, lci: *const LibC
127	127
128	128	var sysroot: ?[]const u8 = null;
129	129
130		if (target.isDarwin()) d: {
	130	if (target.os.tag.isDarwin()) d: {
131	131	const down1 = std.fs.path.dirname(lci.sys_include_dir.?) orelse break :d;
132	132	const down2 = std.fs.path.dirname(down1) orelse break :d;
133	133	try framework_list.append(try std.fs.path.join(arena, &.{ down2, "System", "Library", "Frameworks" }));
...	...	@@ -150,7 +150,7 @@ pub fn detectFromBuilding(
150	150	) !LibCDirs {
151	151	const s = std.fs.path.sep_str;
152	152
153		if (target.isDarwin()) {
	153	if (target.os.tag.isDarwin()) {
154	154	const list = try arena.alloc([]const u8, 1);
155	155	list[0] = try std.fmt.allocPrint(
156	156	arena,
...	...	@@ -187,7 +187,7 @@ pub fn detectFromBuilding(
187	187	"{s}" ++ s ++ "libc" ++ s ++ "include" ++ s ++ "generic-{s}",
188	188	.{ zig_lib_dir, generic_name },
189	189	);
190		const generic_arch_name = target.osArchName();
	190	const generic_arch_name = std.zig.target.osArchName(target);
191	191	const arch_os_include_dir = try std.fmt.allocPrint(
192	192	arena,
193	193	"{s}" ++ s ++ "libc" ++ s ++ "include" ++ s ++ "{s}-{s}-any",

lib/std/zig/LibCInstallation.zig+5-5

...	...	@@ -81,7 +81,7 @@ pub fn parse(
81	81	}
82	82
83	83	const os_tag = target.os.tag;
84		if (self.crt_dir == null and !target.isDarwin()) {
	84	if (self.crt_dir == null and !target.os.tag.isDarwin()) {
85	85	log.err("crt_dir may not be empty for {s}", .{@tagName(os_tag)});
86	86	return error.ParseError;
87	87	}
...	...	@@ -167,7 +167,7 @@ pub const FindNativeOptions = struct {
167	167	pub fn findNative(args: FindNativeOptions) FindError!LibCInstallation {
168	168	var self: LibCInstallation = .{};
169	169
170		if (is_darwin and args.target.isDarwin()) {
	170	if (is_darwin and args.target.os.tag.isDarwin()) {
171	171	if (!std.zig.system.darwin.isSdkInstalled(args.allocator))
172	172	return error.DarwinSdkNotFound;
173	173	const sdk = std.zig.system.darwin.getSdk(args.allocator, args.target) orelse
...	...	@@ -444,7 +444,7 @@ fn findNativeCrtDirPosix(self: *LibCInstallation, args: FindNativeOptions) FindE
444	444	self.crt_dir = try ccPrintFileName(.{
445	445	.allocator = args.allocator,
446	446	.search_basename = switch (args.target.os.tag) {
447		.linux => if (args.target.isAndroid()) "crtbegin_dynamic.o" else "crt1.o",
	447	.linux => if (args.target.abi.isAndroid()) "crtbegin_dynamic.o" else "crt1.o",
448	448	else => "crt1.o",
449	449	},
450	450	.want_dirname = .only_dir,
...	...	@@ -734,7 +734,7 @@ pub const CrtBasenames = struct {
734	734
735	735	const target = args.target;
736	736
737		if (target.isAndroid()) return switch (mode) {
	737	if (target.abi.isAndroid()) return switch (mode) {
738	738	.dynamic_lib => .{
739	739	.crtbegin = "crtbegin_so.o",
740	740	.crtend = "crtend_so.o",
...	...	@@ -1025,7 +1025,7 @@ const fs = std.fs;
1025	1025	const Allocator = std.mem.Allocator;
1026	1026	const Path = std.Build.Cache.Path;
1027	1027
1028		const is_darwin = builtin.target.isDarwin();
	1028	const is_darwin = builtin.target.os.tag.isDarwin();
1029	1029	const is_windows = builtin.target.os.tag == .windows;
1030	1030	const is_haiku = builtin.target.os.tag == .haiku;
1031	1031

lib/std/zig/system.zig+1-1

...	...	@@ -415,7 +415,7 @@ pub fn resolveTargetQuery(query: Target.Query) DetectError!Target {
415	415	}
416	416
417	417	// https://github.com/llvm/llvm-project/issues/105978
418		if (result.cpu.arch.isArm() and result.abi.floatAbi() == .soft) {
	418	if (result.cpu.arch.isArm() and result.abi.float() == .soft) {
419	419	result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2));
420	420	}
421	421	}

lib/std/zig/system/NativePaths.zig+1-1

...	...	@@ -83,7 +83,7 @@ pub fn detect(arena: Allocator, native_target: std.Target) !NativePaths {
83	83
84	84	// TODO: consider also adding homebrew paths
85	85	// TODO: consider also adding macports paths
86		if (builtin.target.isDarwin()) {
	86	if (builtin.target.os.tag.isDarwin()) {
87	87	if (std.zig.system.darwin.isSdkInstalled(arena)) sdk: {
88	88	const sdk = std.zig.system.darwin.getSdk(arena, native_target) orelse break :sdk;
89	89	try self.addLibDir(try std.fs.path.join(arena, &.{ sdk, "usr/lib" }));

lib/std/zig/target.zig+17

...	...	@@ -129,6 +129,23 @@ pub fn glibcRuntimeTriple(
129	129	};
130	130	}
131	131
	132	pub fn osArchName(target: std.Target) [:0]const u8 {
	133	return switch (target.os.tag) {
	134	.linux => switch (target.cpu.arch) {
	135	.arm, .armeb, .thumb, .thumbeb => "arm",
	136	.aarch64, .aarch64_be => "aarch64",
	137	.loongarch32, .loongarch64 => "loongarch",
	138	.mips, .mipsel, .mips64, .mips64el => "mips",
	139	.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
	140	.riscv32, .riscv64 => "riscv",
	141	.sparc, .sparc64 => "sparc",
	142	.x86, .x86_64 => "x86",
	143	else => @tagName(target.cpu.arch),
	144	},
	145	else => @tagName(target.cpu.arch),
	146	};
	147	}
	148
132	149	pub fn muslArchName(arch: std.Target.Cpu.Arch, abi: std.Target.Abi) [:0]const u8 {
133	150	return switch (abi) {
134	151	.muslabin32 => "mipsn32",

src/Compilation.zig+6-15

...	...	@@ -1766,11 +1766,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
1766	1766	if (comp.config.link_libc and is_exe_or_dyn_lib) {
1767	1767	// If the "is darwin" check is moved below the libc_installation check below,
1768	1768	// error.LibCInstallationMissingCrtDir is returned from lci.resolveCrtPaths().
1769		if (target.isDarwin()) {
1770		switch (target.abi) {
1771		.none, .simulator, .macabi => {},
1772		else => return error.LibCUnavailable,
1773		}
	1769	if (target.isDarwinLibC()) {
1774	1770	// TODO delete logic from MachO flush() and queue up tasks here instead.
1775	1771	} else if (comp.libc_installation) \|lci\| {
1776	1772	const basenames = LibCInstallation.CrtBasenames.get(.{
...	...	@@ -1793,7 +1789,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
1793	1789	// Loads the libraries provided by `target_util.libcFullLinkFlags(target)`.
1794	1790	comp.link_task_queue.shared.appendAssumeCapacity(.load_host_libc);
1795	1791	comp.remaining_prelink_tasks += 1;
1796		} else if (target.isMusl() and !target.isWasm()) {
	1792	} else if (target.isMuslLibC()) {
1797	1793	if (!std.zig.target.canBuildLibC(target)) return error.LibCUnavailable;
1798	1794
1799	1795	if (musl.needsCrt0(comp.config.output_mode, comp.config.link_mode, comp.config.pie)) \|f\| {
...	...	@@ -1817,7 +1813,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
1817	1813
1818	1814	comp.queued_jobs.glibc_crt_file[@intFromEnum(glibc.CrtFile.libc_nonshared_a)] = true;
1819	1815	comp.remaining_prelink_tasks += 1;
1820		} else if (target.isWasm() and target.os.tag == .wasi) {
	1816	} else if (target.isWasiLibC()) {
1821	1817	if (!std.zig.target.canBuildLibC(target)) return error.LibCUnavailable;
1822	1818
1823	1819	for (comp.wasi_emulated_libs) \|crt_file\| {
...	...	@@ -1839,11 +1835,6 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
1839	1835	// When linking mingw-w64 there are some import libs we always need.
1840	1836	try comp.windows_libs.ensureUnusedCapacity(gpa, mingw.always_link_libs.len);
1841	1837	for (mingw.always_link_libs) \|name\| comp.windows_libs.putAssumeCapacity(name, {});
1842		} else if (target.isDarwin()) {
1843		switch (target.abi) {
1844		.none, .simulator, .macabi => {},
1845		else => return error.LibCUnavailable,
1846		}
1847	1838	} else if (target.os.tag == .freestanding and capable_of_building_zig_libc) {
1848	1839	comp.queued_jobs.zig_libc = true;
1849	1840	comp.remaining_prelink_tasks += 1;
...	...	@@ -5545,7 +5536,7 @@ pub fn addCCArgs(
5545	5536
5546	5537	// We might want to support -mfloat-abi=softfp for Arm and CSKY here in the future.
5547	5538	if (target_util.clangSupportsFloatAbiArg(target)) {
5548		const fabi = @tagName(target.floatAbi());
	5539	const fabi = @tagName(target.abi.float());
5549	5540
5550	5541	try argv.append(switch (target.cpu.arch) {
5551	5542	// For whatever reason, Clang doesn't support `-mfloat-abi` for s390x.
...	...	@@ -5598,7 +5589,7 @@ pub fn addCCArgs(
5598	5589	if (ext != .assembly) {
5599	5590	try argv.append(if (target.os.tag == .freestanding) "-ffreestanding" else "-fhosted");
5600	5591
5601		if (target_util.clangSupportsNoImplicitFloatArg(target) and target.floatAbi() == .soft) {
	5592	if (target_util.clangSupportsNoImplicitFloatArg(target) and target.abi.float() == .soft) {
5602	5593	try argv.append("-mno-implicit-float");
5603	5594	}
5604	5595
...	...	@@ -5646,7 +5637,7 @@ pub fn addCCArgs(
5646	5637	// LLVM IR files don't support these flags.
5647	5638	if (ext != .ll and ext != .bc) {
5648	5639	// https://github.com/llvm/llvm-project/issues/105972
5649		if (target.cpu.arch.isPowerPC() and target.floatAbi() == .soft) {
	5640	if (target.cpu.arch.isPowerPC() and target.abi.float() == .soft) {
5650	5641	try argv.append("-D__NO_FPRS__");
5651	5642	try argv.append("-D_SOFT_FLOAT");
5652	5643	try argv.append("-D_SOFT_DOUBLE");

src/Sema.zig+10-52

...	...	@@ -9378,7 +9378,7 @@ pub fn handleExternLibName(
9378	9378	);
9379	9379	break :blk;
9380	9380	}
9381		if (!target.isWasm() and !block.ownerModule().pic) {
	9381	if (!target.cpu.arch.isWasm() and !block.ownerModule().pic) {
9382	9382	return sema.fail(
9383	9383	block,
9384	9384	src_loc,
...	...	@@ -9407,10 +9407,8 @@ const calling_conventions_supporting_var_args = [_]std.builtin.CallingConvention
9407	9407	.aarch64_aapcs_win,
9408	9408	.aarch64_vfabi,
9409	9409	.aarch64_vfabi_sve,
9410		.arm_apcs,
9411	9410	.arm_aapcs,
9412	9411	.arm_aapcs_vfp,
9413		.arm_aapcs16_vfp,
9414	9412	.mips64_n64,
9415	9413	.mips64_n32,
9416	9414	.mips_o32,
...	...	@@ -9427,7 +9425,7 @@ const calling_conventions_supporting_var_args = [_]std.builtin.CallingConvention
9427	9425	.powerpc_sysv_altivec,
9428	9426	.powerpc_aix,
9429	9427	.powerpc_aix_altivec,
9430		.wasm_watc,
	9428	.wasm_mvp,
9431	9429	.arc_sysv,
9432	9430	.avr_gnu,
9433	9431	.bpf_std,
...	...	@@ -26513,7 +26511,7 @@ fn zirWasmMemorySize(
26513	26511	const index_src = block.builtinCallArgSrc(extra.node, 0);
26514	26512	const builtin_src = block.nodeOffset(extra.node);
26515	26513	const target = sema.pt.zcu.getTarget();
26516		if (!target.isWasm()) {
	26514	if (!target.cpu.arch.isWasm()) {
26517	26515	return sema.fail(block, builtin_src, "builtin @wasmMemorySize is available when targeting WebAssembly; targeted CPU architecture is {s}", .{@tagName(target.cpu.arch)});
26518	26516	}
26519	26517
...	...	@@ -26538,7 +26536,7 @@ fn zirWasmMemoryGrow(
26538	26536	const index_src = block.builtinCallArgSrc(extra.node, 0);
26539	26537	const delta_src = block.builtinCallArgSrc(extra.node, 1);
26540	26538	const target = sema.pt.zcu.getTarget();
26541		if (!target.isWasm()) {
	26539	if (!target.cpu.arch.isWasm()) {
26542	26540	return sema.fail(block, builtin_src, "builtin @wasmMemoryGrow is available when targeting WebAssembly; targeted CPU architecture is {s}", .{@tagName(target.cpu.arch)});
26543	26541	}
26544	26542
...	...	@@ -37222,30 +37220,12 @@ fn analyzeComptimeAlloc(
37222	37220	} })));
37223	37221	}
37224	37222
37225		/// The places where a user can specify an address space attribute
37226		pub const AddressSpaceContext = enum {
37227		/// A function is specified to be placed in a certain address space.
37228		function,
37229
37230		/// A (global) variable is specified to be placed in a certain address space.
37231		/// In contrast to .constant, these values (and thus the address space they will be
37232		/// placed in) are required to be mutable.
37233		variable,
37234
37235		/// A (global) constant value is specified to be placed in a certain address space.
37236		/// In contrast to .variable, values placed in this address space are not required to be mutable.
37237		constant,
37238
37239		/// A pointer is ascripted to point into a certain address space.
37240		pointer,
37241		};
37242
37243	37223	fn resolveAddressSpace(
37244	37224	sema: *Sema,
37245	37225	block: *Block,
37246	37226	src: LazySrcLoc,
37247	37227	zir_ref: Zir.Inst.Ref,
37248		ctx: AddressSpaceContext,
	37228	ctx: std.builtin.AddressSpace.Context,
37249	37229	) !std.builtin.AddressSpace {
37250	37230	const air_ref = try sema.resolveInst(zir_ref);
37251	37231	return sema.analyzeAsAddressSpace(block, src, air_ref, ctx);
...	...	@@ -37256,7 +37236,7 @@ pub fn analyzeAsAddressSpace(
37256	37236	block: *Block,
37257	37237	src: LazySrcLoc,
37258	37238	air_ref: Air.Inst.Ref,
37259		ctx: AddressSpaceContext,
	37239	ctx: std.builtin.AddressSpace.Context,
37260	37240	) !std.builtin.AddressSpace {
37261	37241	const pt = sema.pt;
37262	37242	const addrspace_ty = try sema.getBuiltinType(src, .AddressSpace);
...	...	@@ -37264,30 +37244,8 @@ pub fn analyzeAsAddressSpace(
37264	37244	const addrspace_val = try sema.resolveConstDefinedValue(block, src, coerced, .{ .simple = .@"addrspace" });
37265	37245	const address_space = try sema.interpretBuiltinType(block, src, addrspace_val, std.builtin.AddressSpace);
37266	37246	const target = pt.zcu.getTarget();
37267		const arch = target.cpu.arch;
37268
37269		const is_nv = arch.isNvptx();
37270		const is_amd = arch == .amdgcn;
37271		const is_spirv = arch.isSpirV();
37272		const is_gpu = is_nv or is_amd or is_spirv;
37273
37274		const supported = switch (address_space) {
37275		// TODO: on spir-v only when os is opencl.
37276		.generic => true,
37277		.gs, .fs, .ss => (arch == .x86 or arch == .x86_64) and ctx == .pointer,
37278		// TODO: check that .shared and .local are left uninitialized
37279		.param => is_nv,
37280		.input, .output, .uniform, .push_constant, .storage_buffer => is_spirv,
37281		.global, .shared, .local => is_gpu,
37282		.constant => is_gpu and (ctx == .constant),
37283		// TODO this should also check how many flash banks the cpu has
37284		.flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr,
37285
37286		.cog, .hub => arch.isPropeller(),
37287		.lut => (arch == .propeller2),
37288		};
37289
37290		if (!supported) {
	37247
	37248	if (!target.cpu.supportsAddressSpace(address_space, ctx)) {
37291	37249	// TODO error messages could be made more elaborate here
37292	37250	const entity = switch (ctx) {
37293	37251	.function => "functions",
...	...	@@ -37299,7 +37257,7 @@ pub fn analyzeAsAddressSpace(
37299	37257	block,
37300	37258	src,
37301	37259	"{s} with address space '{s}' are not supported on {s}",
37302		.{ entity, @tagName(address_space), arch.genericName() },
	37260	.{ entity, @tagName(address_space), target.cpu.arch.genericName() },
37303	37261	);
37304	37262	}
37305	37263
...	...	@@ -38729,7 +38687,7 @@ pub fn resolveNavPtrModifiers(
38729	38687	};
38730	38688
38731	38689	const @"addrspace": std.builtin.AddressSpace = as: {
38732		const addrspace_ctx: Sema.AddressSpaceContext = switch (zir_decl.kind) {
	38690	const addrspace_ctx: std.builtin.AddressSpace.Context = switch (zir_decl.kind) {
38733	38691	.@"var" => .variable,
38734	38692	else => switch (nav_ty.zigTypeTag(zcu)) {
38735	38693	.@"fn" => .function,

src/Type.zig+1-2

...	...	@@ -1647,7 +1647,7 @@ pub fn maxIntAlignment(target: std.Target) u16 {
1647	1647	.avr => 1,
1648	1648	.msp430 => 2,
1649	1649	.xcore => 4,
1650		.propeller1, .propeller2 => 4,
	1650	.propeller => 4,
1651	1651
1652	1652	.arm,
1653	1653	.armeb,
...	...	@@ -1698,7 +1698,6 @@ pub fn maxIntAlignment(target: std.Target) u16 {
1698	1698
1699	1699	// Below this comment are unverified but based on the fact that C requires
1700	1700	// int128_t to be 16 bytes aligned, it's a safe default.
1701		.spu_2,
1702	1701	.csky,
1703	1702	.arc,
1704	1703	.m68k,

src/Zcu.zig+3-7

...	...	@@ -3594,7 +3594,6 @@ pub fn atomicPtrAlignment(
3594	3594	const max_atomic_bits: u16 = switch (target.cpu.arch) {
3595	3595	.avr,
3596	3596	.msp430,
3597		.spu_2,
3598	3597	=> 16,
3599	3598
3600	3599	.arc,
...	...	@@ -3620,8 +3619,7 @@ pub fn atomicPtrAlignment(
3620	3619	.spirv32,
3621	3620	.loongarch32,
3622	3621	.xtensa,
3623		.propeller1,
3624		.propeller2,
	3622	.propeller,
3625	3623	=> 32,
3626	3624
3627	3625	.amdgcn,
...	...	@@ -4211,9 +4209,7 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
4211	4209	=> \|opts\| opts.incoming_stack_alignment == null,
4212	4210
4213	4211	.arm_aapcs_vfp,
4214		=> \|opts\| opts.incoming_stack_alignment == null and target.os.tag != .watchos,
4215		.arm_aapcs16_vfp,
4216		=> \|opts\| opts.incoming_stack_alignment == null and target.os.tag == .watchos,
	4212	=> \|opts\| opts.incoming_stack_alignment == null,
4217	4213
4218	4214	.arm_interrupt,
4219	4215	=> \|opts\| opts.incoming_stack_alignment == null,
...	...	@@ -4241,7 +4237,7 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
4241	4237	};
4242	4238	},
4243	4239	.stage2_wasm => switch (cc) {
4244		.wasm_watc => \|opts\| opts.incoming_stack_alignment == null,
	4240	.wasm_mvp => \|opts\| opts.incoming_stack_alignment == null,
4245	4241	else => false,
4246	4242	},
4247	4243	.stage2_arm => switch (cc) {

src/arch/wasm/CodeGen.zig+8-8

...	...	@@ -1396,7 +1396,7 @@ fn resolveCallingConventionValues(
1396	1396	result.local_index += 1;
1397	1397	}
1398	1398	},
1399		.wasm_watc => {
	1399	.wasm_mvp => {
1400	1400	for (fn_info.param_types.get(ip)) \|ty\| {
1401	1401	const ty_classes = abi.classifyType(Type.fromInterned(ty), zcu);
1402	1402	for (ty_classes) \|class\| {
...	...	@@ -1421,7 +1421,7 @@ pub fn firstParamSRet(
1421	1421	switch (cc) {
1422	1422	.@"inline" => unreachable,
1423	1423	.auto => return isByRef(return_type, zcu, target),
1424		.wasm_watc => {
	1424	.wasm_mvp => {
1425	1425	const ty_classes = abi.classifyType(return_type, zcu);
1426	1426	if (ty_classes[0] == .indirect) return true;
1427	1427	if (ty_classes[0] == .direct and ty_classes[1] == .direct) return true;
...	...	@@ -1434,7 +1434,7 @@ pub fn firstParamSRet(
1434	1434	/// Lowers a Zig type and its value based on a given calling convention to ensure
1435	1435	/// it matches the ABI.
1436	1436	fn lowerArg(cg: *CodeGen, cc: std.builtin.CallingConvention, ty: Type, value: WValue) !void {
1437		if (cc != .wasm_watc) {
	1437	if (cc != .wasm_mvp) {
1438	1438	return cg.lowerToStack(value);
1439	1439	}
1440	1440
...	...	@@ -2124,7 +2124,7 @@ fn airRet(cg: *CodeGen, inst: Air.Inst.Index) InnerError!void {
2124	2124	// to the stack instead
2125	2125	if (cg.return_value != .none) {
2126	2126	try cg.store(cg.return_value, operand, ret_ty, 0);
2127		} else if (fn_info.cc == .wasm_watc and ret_ty.hasRuntimeBitsIgnoreComptime(zcu)) {
	2127	} else if (fn_info.cc == .wasm_mvp and ret_ty.hasRuntimeBitsIgnoreComptime(zcu)) {
2128	2128	switch (ret_ty.zigTypeTag(zcu)) {
2129	2129	// Aggregate types can be lowered as a singular value
2130	2130	.@"struct", .@"union" => {
...	...	@@ -2268,7 +2268,7 @@ fn airCall(cg: *CodeGen, inst: Air.Inst.Index, modifier: std.builtin.CallModifie
2268	2268	} else if (first_param_sret) {
2269	2269	break :result_value sret;
2270	2270	// TODO: Make this less fragile and optimize
2271		} else if (zcu.typeToFunc(fn_ty).?.cc == .wasm_watc and ret_ty.zigTypeTag(zcu) == .@"struct" or ret_ty.zigTypeTag(zcu) == .@"union") {
	2271	} else if (zcu.typeToFunc(fn_ty).?.cc == .wasm_mvp and ret_ty.zigTypeTag(zcu) == .@"struct" or ret_ty.zigTypeTag(zcu) == .@"union") {
2272	2272	const result_local = try cg.allocLocal(ret_ty);
2273	2273	try cg.addLocal(.local_set, result_local.local.value);
2274	2274	const scalar_type = abi.scalarType(ret_ty, zcu);
...	...	@@ -2546,7 +2546,7 @@ fn airArg(cg: *CodeGen, inst: Air.Inst.Index) InnerError!void {
2546	2546	const arg = cg.args[arg_index];
2547	2547	const cc = zcu.typeToFunc(zcu.navValue(cg.owner_nav).typeOf(zcu)).?.cc;
2548	2548	const arg_ty = cg.typeOfIndex(inst);
2549		if (cc == .wasm_watc) {
	2549	if (cc == .wasm_mvp) {
2550	2550	const arg_classes = abi.classifyType(arg_ty, zcu);
2551	2551	for (arg_classes) \|class\| {
2552	2552	if (class != .none) {
...	...	@@ -7047,7 +7047,7 @@ fn callIntrinsic(
7047	7047
7048	7048	// Always pass over C-ABI
7049	7049
7050		const want_sret_param = firstParamSRet(.{ .wasm_watc = .{} }, return_type, zcu, cg.target);
	7050	const want_sret_param = firstParamSRet(.{ .wasm_mvp = .{} }, return_type, zcu, cg.target);
7051	7051	// if we want return as first param, we allocate a pointer to stack,
7052	7052	// and emit it as our first argument
7053	7053	const sret = if (want_sret_param) blk: {
...	...	@@ -7060,7 +7060,7 @@ fn callIntrinsic(
7060	7060	for (args, 0..) \|arg, arg_i\| {
7061	7061	assert(!(want_sret_param and arg == .stack));
7062	7062	assert(Type.fromInterned(param_types[arg_i]).hasRuntimeBitsIgnoreComptime(zcu));
7063		try cg.lowerArg(.{ .wasm_watc = .{} }, Type.fromInterned(param_types[arg_i]), arg);
	7063	try cg.lowerArg(.{ .wasm_mvp = .{} }, Type.fromInterned(param_types[arg_i]), arg);
7064	7064	}
7065	7065
7066	7066	try cg.addInst(.{ .tag = .call_intrinsic, .data = .{ .intrinsic = intrinsic } });

src/arch/x86_64/CodeGen.zig+1-1

...	...	@@ -90078,7 +90078,7 @@ fn floatCompilerRtAbiName(float_bits: u32) u8 {
90078	90078	fn floatCompilerRtAbiType(self: *CodeGen, ty: Type, other_ty: Type) Type {
90079	90079	if (ty.toIntern() == .f16_type and
90080	90080	(other_ty.toIntern() == .f32_type or other_ty.toIntern() == .f64_type) and
90081		self.target.isDarwin()) return .u16;
	90081	self.target.os.tag.isDarwin()) return .u16;
90082	90082	return ty;
90083	90083	}
90084	90084

src/codegen/c.zig+1-1

...	...	@@ -7725,7 +7725,7 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
7725	7725	.aarch64_vfabi_sve => "aarch64_sve_pcs",
7726	7726
7727	7727	.arm_aapcs => "pcs(\"aapcs\")",
7728		.arm_aapcs_vfp, .arm_aapcs16_vfp => "pcs(\"aapcs-vfp\")",
	7728	.arm_aapcs_vfp => "pcs(\"aapcs-vfp\")",
7729	7729
7730	7730	.arm_interrupt => \|opts\| switch (opts.type) {
7731	7731	.generic => "interrupt",

src/codegen/llvm.zig+20-33

...	...	@@ -98,9 +98,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
98	98	.ve => "ve",
99	99
100	100	.kalimba,
101		.spu_2,
102		.propeller1,
103		.propeller2,
	101	.propeller,
104	102	=> unreachable, // Gated by hasLlvmSupport().
105	103
106	104	};
...	...	@@ -1303,7 +1301,7 @@ pub const Object = struct {
1303	1301	.large => .Large,
1304	1302	};
1305	1303
1306		const float_abi: llvm.TargetMachine.FloatABI = if (comp.root_mod.resolved_target.result.floatAbi() == .hard)
	1304	const float_abi: llvm.TargetMachine.FloatABI = if (comp.root_mod.resolved_target.result.abi.float() == .hard)
1307	1305	.Hard
1308	1306	else
1309	1307	.Soft;
...	...	@@ -2941,7 +2939,7 @@ pub const Object = struct {
2941	2939	function_index.setLinkage(.internal, &o.builder);
2942	2940	function_index.setUnnamedAddr(.unnamed_addr, &o.builder);
2943	2941	} else {
2944		if (target.isWasm()) {
	2942	if (target.cpu.arch.isWasm()) {
2945	2943	try attributes.addFnAttr(.{ .string = .{
2946	2944	.kind = try o.builder.string("wasm-import-name"),
2947	2945	.value = try o.builder.string(nav.name.toSlice(ip)),
...	...	@@ -3158,7 +3156,7 @@ pub const Object = struct {
3158	3156	.value = try o.builder.string(std.mem.span(s)),
3159	3157	} }, &o.builder);
3160	3158	}
3161		if (target.floatAbi() == .soft) {
	3159	if (target.abi.float() == .soft) {
3162	3160	// `use-soft-float` means "use software routines for floating point computations". In
3163	3161	// other words, it configures how LLVM lowers basic float instructions like `fcmp`,
3164	3162	// `fadd`, etc. The float calling convention is configured on `TargetMachine` and is
...	...	@@ -4832,7 +4830,7 @@ pub const NavGen = struct {
4832	4830	const global_index = o.nav_map.get(nav_index).?;
4833	4831
4834	4832	const decl_name = decl_name: {
4835		if (zcu.getTarget().isWasm() and ty.zigTypeTag(zcu) == .@"fn") {
	4833	if (zcu.getTarget().cpu.arch.isWasm() and ty.zigTypeTag(zcu) == .@"fn") {
4836	4834	if (lib_name.toSlice(ip)) \|lib_name_slice\| {
4837	4835	if (!std.mem.eql(u8, lib_name_slice, "c")) {
4838	4836	break :decl_name try o.builder.strtabStringFmt("{}\|{s}", .{ nav.name.fmt(ip), lib_name_slice });
...	...	@@ -6569,7 +6567,7 @@ pub const FuncGen = struct {
6569	6567	// Workaround for:
6570	6568	// * https://github.com/llvm/llvm-project/blob/56905dab7da50bccfcceaeb496b206ff476127e1/llvm/lib/MC/WasmObjectWriter.cpp#L560
6571	6569	// * https://github.com/llvm/llvm-project/blob/56905dab7da50bccfcceaeb496b206ff476127e1/llvm/test/MC/WebAssembly/blockaddress.ll
6572		if (zcu.comp.getTarget().isWasm()) break :jmp_table null;
	6570	if (zcu.comp.getTarget().cpu.arch.isWasm()) break :jmp_table null;
6573	6571
6574	6572	// On a 64-bit target, 1024 pointers in our jump table is about 8K of pointers. This seems just
6575	6573	// about acceptable - it won't fill L1d cache on most CPUs.
...	...	@@ -10026,7 +10024,7 @@ pub const FuncGen = struct {
10026	10024	// of the length. This means we need to emit a check where we skip the memset when the length
10027	10025	// is 0 as we allow for undefined pointers in 0-sized slices.
10028	10026	// This logic can be removed once https://github.com/ziglang/zig/issues/16360 is done.
10029		const intrinsic_len0_traps = o.target.isWasm() and
	10027	const intrinsic_len0_traps = o.target.cpu.arch.isWasm() and
10030	10028	ptr_ty.isSlice(zcu) and
10031	10029	std.Target.wasm.featureSetHas(o.target.cpu.features, .bulk_memory);
10032	10030
...	...	@@ -10183,7 +10181,7 @@ pub const FuncGen = struct {
10183	10181	// For this reason we must add a check for 0-sized slices as its pointer field can be undefined.
10184	10182	// We only have to do this for slices as arrays will have a valid pointer.
10185	10183	// This logic can be removed once https://github.com/ziglang/zig/issues/16360 is done.
10186		if (o.target.isWasm() and
	10184	if (o.target.cpu.arch.isWasm() and
10187	10185	std.Target.wasm.featureSetHas(o.target.cpu.features, .bulk_memory) and
10188	10186	dest_ptr_ty.isSlice(zcu))
10189	10187	{
...	...	@@ -11768,16 +11766,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
11768	11766	.x86_interrupt => .x86_intrcc,
11769	11767	.aarch64_vfabi => .aarch64_vector_pcs,
11770	11768	.aarch64_vfabi_sve => .aarch64_sve_vector_pcs,
11771		.arm_apcs => .arm_apcscc,
11772	11769	.arm_aapcs => .arm_aapcscc,
11773		.arm_aapcs_vfp => if (target.os.tag != .watchos)
11774		.arm_aapcs_vfpcc
11775		else
11776		null,
11777		.arm_aapcs16_vfp => if (target.os.tag == .watchos)
11778		.arm_aapcs_vfpcc
11779		else
11780		null,
	11770	.arm_aapcs_vfp => .arm_aapcs_vfpcc,
11781	11771	.riscv64_lp64_v => .riscv_vectorcallcc,
11782	11772	.riscv32_ilp32_v => .riscv_vectorcallcc,
11783	11773	.avr_builtin => .avr_builtincc,
...	...	@@ -11821,7 +11811,7 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
11821	11811	.powerpc_sysv_altivec,
11822	11812	.powerpc_aix,
11823	11813	.powerpc_aix_altivec,
11824		.wasm_watc,
	11814	.wasm_mvp,
11825	11815	.arc_sysv,
11826	11816	.avr_gnu,
11827	11817	.bpf_std,
...	...	@@ -11834,8 +11824,7 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
11834	11824	.m68k_sysv,
11835	11825	.m68k_gnu,
11836	11826	.msp430_eabi,
11837		.propeller1_sysv,
11838		.propeller2_sysv,
	11827	.propeller_sysv,
11839	11828	.s390x_sysv,
11840	11829	.s390x_sysv_vx,
11841	11830	.ve_sysv,
...	...	@@ -11999,12 +11988,12 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
11999	11988	.x86_64_win => x86_64_abi.classifyWindows(return_type, zcu) == .memory,
12000	11989	.x86_sysv, .x86_win => isByRef(return_type, zcu),
12001	11990	.x86_stdcall => !isScalar(zcu, return_type),
12002		.wasm_watc => wasm_c_abi.classifyType(return_type, zcu)[0] == .indirect,
	11991	.wasm_mvp => wasm_c_abi.classifyType(return_type, zcu)[0] == .indirect,
12003	11992	.aarch64_aapcs,
12004	11993	.aarch64_aapcs_darwin,
12005	11994	.aarch64_aapcs_win,
12006	11995	=> aarch64_c_abi.classifyType(return_type, zcu) == .memory,
12007		.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
	11996	.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
12008	11997	.memory, .i64_array => true,
12009	11998	.i32_array => \|size\| size != 1,
12010	11999	.byval => false,
...	...	@@ -12054,7 +12043,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
12054	12043	.integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),
12055	12044	.double_integer => return o.builder.arrayType(2, .i64),
12056	12045	},
12057		.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
	12046	.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
12058	12047	.memory, .i64_array => return .void,
12059	12048	.i32_array => \|len\| return if (len == 1) .i32 else .void,
12060	12049	.byval => return o.lowerType(return_type),
...	...	@@ -12084,7 +12073,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
12084	12073	return o.builder.structType(.normal, types[0..types_len]);
12085	12074	},
12086	12075	},
12087		.wasm_watc => {
	12076	.wasm_mvp => {
12088	12077	if (isScalar(zcu, return_type)) {
12089	12078	return o.lowerType(return_type);
12090	12079	}
...	...	@@ -12303,7 +12292,7 @@ const ParamTypeIterator = struct {
12303	12292	.double_integer => return Lowering{ .i64_array = 2 },
12304	12293	}
12305	12294	},
12306		.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => {
	12295	.arm_aapcs, .arm_aapcs_vfp => {
12307	12296	it.zig_index += 1;
12308	12297	it.llvm_index += 1;
12309	12298	switch (arm_c_abi.classifyType(ty, zcu, .arg)) {
...	...	@@ -12349,7 +12338,7 @@ const ParamTypeIterator = struct {
12349	12338	},
12350	12339	}
12351	12340	},
12352		.wasm_watc => {
	12341	.wasm_mvp => {
12353	12342	it.zig_index += 1;
12354	12343	it.llvm_index += 1;
12355	12344	if (isScalar(zcu, ty)) {
...	...	@@ -12707,7 +12696,7 @@ fn backendSupportsF16(target: std.Target) bool {
12707	12696	.armeb,
12708	12697	.thumb,
12709	12698	.thumbeb,
12710		=> target.floatAbi() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
	12699	=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
12711	12700	.aarch64,
12712	12701	.aarch64_be,
12713	12702	=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
...	...	@@ -12734,7 +12723,7 @@ fn backendSupportsF128(target: std.Target) bool {
12734	12723	.armeb,
12735	12724	.thumb,
12736	12725	.thumbeb,
12737		=> target.floatAbi() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
	12726	=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
12738	12727	.aarch64,
12739	12728	.aarch64_be,
12740	12729	=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
...	...	@@ -13024,9 +13013,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
13024	13013
13025	13014	// LLVM does does not have a backend for these.
13026	13015	.kalimba,
13027		.spu_2,
13028		.propeller1,
13029		.propeller2,
	13016	.propeller,
13030	13017	=> unreachable,
13031	13018	}
13032	13019	}

src/glibc.zig+1-1

...	...	@@ -469,7 +469,7 @@ fn add_include_dirs(comp: Compilation, arena: Allocator, args: std.ArrayList([
469	469	try args.append("-I");
470	470	try args.append(try lib_path(comp, arena, lib_libc ++ "include" ++ s ++ "generic-glibc"));
471	471
472		const arch_name = target.osArchName();
	472	const arch_name = std.zig.target.osArchName(target);
473	473	try args.append("-I");
474	474	try args.append(try std.fmt.allocPrint(arena, "{s}" ++ s ++ "libc" ++ s ++ "include" ++ s ++ "{s}-linux-any", .{
475	475	comp.zig_lib_directory.path.?, arch_name,

src/libtsan.zig+6-6

...	...	@@ -36,7 +36,7 @@ pub fn buildTsan(comp: *Compilation, prog_node: std.Progress.Node) BuildError!vo
36	36	.watchos => if (target.abi == .simulator) "clang_rt.tsan_watchossim_dynamic" else "clang_rt.tsan_watchos_dynamic",
37	37	else => "tsan",
38	38	};
39		const link_mode: std.builtin.LinkMode = if (target.isDarwin()) .dynamic else .static;
	39	const link_mode: std.builtin.LinkMode = if (target.os.tag.isDarwin()) .dynamic else .static;
40	40	const output_mode = .Lib;
41	41	const basename = try std.zig.binNameAlloc(arena, .{
42	42	.root_name = root_name,
...	...	@@ -52,9 +52,9 @@ pub fn buildTsan(comp: *Compilation, prog_node: std.Progress.Node) BuildError!vo
52	52
53	53	const optimize_mode = comp.compilerRtOptMode();
54	54	const strip = comp.compilerRtStrip();
55		const link_libcpp = target.isDarwin();
56	55	const unwind_tables: std.builtin.UnwindTables =
57	56	if (target.cpu.arch == .x86 and target.os.tag == .windows) .none else .@"async";
	57	const link_libcpp = target.os.tag.isDarwin();
58	58
59	59	const config = Compilation.Config.resolve(.{
60	60	.output_mode = output_mode,
...	...	@@ -276,14 +276,14 @@ pub fn buildTsan(comp: *Compilation, prog_node: std.Progress.Node) BuildError!vo
276	276	});
277	277	}
278	278
279		const skip_linker_dependencies = !target.isDarwin();
280		const linker_allow_shlib_undefined = target.isDarwin();
281		const install_name = if (target.isDarwin())
	279	const skip_linker_dependencies = !target.os.tag.isDarwin();
	280	const linker_allow_shlib_undefined = target.os.tag.isDarwin();
	281	const install_name = if (target.os.tag.isDarwin())
282	282	try std.fmt.allocPrintZ(arena, "@rpath/{s}", .{basename})
283	283	else
284	284	null;
285	285	// Workaround for https://github.com/llvm/llvm-project/issues/97627
286		const headerpad_size: ?u32 = if (target.isDarwin()) 32 else null;
	286	const headerpad_size: ?u32 = if (target.os.tag.isDarwin()) 32 else null;
287	287	const sub_compilation = Compilation.create(comp.gpa, arena, .{
288	288	.local_cache_directory = comp.global_cache_directory,
289	289	.global_cache_directory = comp.global_cache_directory,

src/libunwind.zig+1-1

...	...	@@ -136,7 +136,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
136	136	if (!comp.config.any_non_single_threaded) {
137	137	try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
138	138	}
139		if (target.cpu.arch.isArm() and target.abi.floatAbi() == .hard) {
	139	if (target.cpu.arch.isArm() and target.abi.float() == .hard) {
140	140	try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
141	141	}
142	142	try cflags.append("-Wno-bitwise-conditional-parentheses");

src/link.zig+2-2

...	...	@@ -2067,7 +2067,7 @@ fn resolveLibInput(
2067	2067
2068	2068	const lib_name = name_query.name;
2069	2069
2070		if (target.isDarwin() and link_mode == .dynamic) tbd: {
	2070	if (target.os.tag.isDarwin() and link_mode == .dynamic) tbd: {
2071	2071	// Prefer .tbd over .dylib.
2072	2072	const test_path: Path = .{
2073	2073	.root_dir = lib_directory,
...	...	@@ -2104,7 +2104,7 @@ fn resolveLibInput(
2104	2104
2105	2105	// In the case of Darwin, the main check will be .dylib, so here we
2106	2106	// additionally check for .so files.
2107		if (target.isDarwin() and link_mode == .dynamic) so: {
	2107	if (target.os.tag.isDarwin() and link_mode == .dynamic) so: {
2108	2108	const test_path: Path = .{
2109	2109	.root_dir = lib_directory,
2110	2110	.sub_path = try std.fmt.allocPrint(arena, "lib{s}.so", .{lib_name}),

src/link/Coff.zig+1-1

...	...	@@ -1881,7 +1881,7 @@ fn linkWithLLD(coff: *Coff, arena: Allocator, tid: Zcu.PerThread.Id, prog_node:
1881	1881	try argv.append(try allocPrint(arena, "-MLLVM:-target-abi={s}", .{mabi}));
1882	1882	}
1883	1883
1884		try argv.append(try allocPrint(arena, "-MLLVM:-float-abi={s}", .{if (target.abi.floatAbi() == .hard) "hard" else "soft"}));
	1884	try argv.append(try allocPrint(arena, "-MLLVM:-float-abi={s}", .{if (target.abi.float() == .hard) "hard" else "soft"}));
1885	1885
1886	1886	if (comp.config.lto != .none) {
1887	1887	switch (optimize_mode) {

src/link/Dwarf.zig+1-4

...	...	@@ -3538,11 +3538,8 @@ fn updateLazyType(
3538	3538	.aarch64_vfabi => .LLVM_AAPCS,
3539	3539	.aarch64_vfabi_sve => .LLVM_AAPCS,
3540	3540
3541		.arm_apcs => .normal,
3542	3541	.arm_aapcs => .LLVM_AAPCS,
3543		.arm_aapcs_vfp,
3544		.arm_aapcs16_vfp,
3545		=> .LLVM_AAPCS_VFP,
	3542	.arm_aapcs_vfp => .LLVM_AAPCS_VFP,
3546	3543
3547	3544	.riscv64_lp64_v,
3548	3545	.riscv32_ilp32_v,

src/link/Elf.zig+2-2

...	...	@@ -1709,7 +1709,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s
1709	1709
1710	1710	try argv.appendSlice(&.{
1711	1711	"-mllvm",
1712		try std.fmt.allocPrint(arena, "-float-abi={s}", .{if (target.abi.floatAbi() == .hard) "hard" else "soft"}),
	1712	try std.fmt.allocPrint(arena, "-float-abi={s}", .{if (target.abi.float() == .hard) "hard" else "soft"}),
1713	1713	});
1714	1714
1715	1715	if (comp.config.lto != .none) {
...	...	@@ -2053,7 +2053,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s
2053	2053	try argv.append(lib_path);
2054	2054	}
2055	2055	try argv.append(try comp.crtFileAsString(arena, "libc_nonshared.a"));
2056		} else if (target.isMusl()) {
	2056	} else if (target.abi.isMusl()) {
2057	2057	try argv.append(try comp.crtFileAsString(arena, switch (link_mode) {
2058	2058	.static => "libc.a",
2059	2059	.dynamic => "libc.so",

src/link/MachO.zig+1-1

...	...	@@ -3548,7 +3548,7 @@ pub fn getTarget(self: MachO) std.Target {
3548	3548	pub fn invalidateKernelCache(dir: fs.Dir, sub_path: []const u8) !void {
3549	3549	const tracy = trace(@src());
3550	3550	defer tracy.end();
3551		if (builtin.target.isDarwin() and builtin.target.cpu.arch == .aarch64) {
	3551	if (builtin.target.os.tag.isDarwin() and builtin.target.cpu.arch == .aarch64) {
3552	3552	try dir.copyFile(sub_path, dir, sub_path, .{});
3553	3553	}
3554	3554	}

src/link/Wasm.zig+2-2

...	...	@@ -4600,7 +4600,7 @@ fn convertZcuFnType(
4600	4600	if (CodeGen.firstParamSRet(cc, return_type, zcu, target)) {
4601	4601	try params_buffer.append(gpa, .i32); // memory address is always a 32-bit handle
4602	4602	} else if (return_type.hasRuntimeBitsIgnoreComptime(zcu)) {
4603		if (cc == .wasm_watc) {
	4603	if (cc == .wasm_mvp) {
4604	4604	const res_classes = abi.classifyType(return_type, zcu);
4605	4605	assert(res_classes[0] == .direct and res_classes[1] == .none);
4606	4606	const scalar_type = abi.scalarType(return_type, zcu);
...	...	@@ -4618,7 +4618,7 @@ fn convertZcuFnType(
4618	4618	if (!param_type.hasRuntimeBitsIgnoreComptime(zcu)) continue;
4619	4619
4620	4620	switch (cc) {
4621		.wasm_watc => {
	4621	.wasm_mvp => {
4622	4622	const param_classes = abi.classifyType(param_type, zcu);
4623	4623	if (param_classes[1] == .none) {
4624	4624	if (param_classes[0] == .direct) {

src/main.zig+1-1

...	...	@@ -3983,7 +3983,7 @@ fn createModule(
3983	3983	}
3984	3984	create_module.lib_dir_args = undefined; // From here we use lib_directories instead.
3985	3985
3986		if (resolved_target.is_native_os and target.isDarwin()) {
	3986	if (resolved_target.is_native_os and target.os.tag.isDarwin()) {
3987	3987	// If we want to link against frameworks, we need system headers.
3988	3988	if (create_module.frameworks.count() > 0)
3989	3989	create_module.want_native_include_dirs = true;

src/target.zig+9-12

...	...	@@ -12,7 +12,7 @@ pub const default_stack_protector_buffer_size = 4;
12	12	pub fn cannotDynamicLink(target: std.Target) bool {
13	13	return switch (target.os.tag) {
14	14	.freestanding => true,
15		else => target.isSpirV(),
	15	else => target.cpu.arch.isSpirV(),
16	16	};
17	17	}
18	18
...	...	@@ -40,12 +40,12 @@ pub fn libcNeedsLibUnwind(target: std.Target) bool {
40	40	}
41	41
42	42	pub fn requiresPIE(target: std.Target) bool {
43		return target.isAndroid() or target.isDarwin() or target.os.tag == .openbsd;
	43	return target.abi.isAndroid() or target.os.tag.isDarwin() or target.os.tag == .openbsd;
44	44	}
45	45
46	46	/// This function returns whether non-pic code is completely invalid on the given target.
47	47	pub fn requiresPIC(target: std.Target, linking_libc: bool) bool {
48		return target.isAndroid() or
	48	return target.abi.isAndroid() or
49	49	target.os.tag == .windows or target.os.tag == .uefi or
50	50	osRequiresLibC(target) or
51	51	(linking_libc and target.isGnuLibC());
...	...	@@ -195,9 +195,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
195	195
196	196	// No LLVM backend exists.
197	197	.kalimba,
198		.spu_2,
199		.propeller1,
200		.propeller2,
	198	.propeller,
201	199	=> false,
202	200	};
203	201	}
...	...	@@ -247,7 +245,7 @@ pub fn clangSupportsStackProtector(target: std.Target) bool {
247	245	}
248	246
249	247	pub fn libcProvidesStackProtector(target: std.Target) bool {
250		return !target.isMinGW() and target.os.tag != .wasi and !target.isSpirV();
	248	return !target.isMinGW() and target.os.tag != .wasi and !target.cpu.arch.isSpirV();
251	249	}
252	250
253	251	pub fn supportsReturnAddress(target: std.Target) bool {
...	...	@@ -444,12 +442,11 @@ pub fn addrSpaceCastIsValid(
444	442	from: AddressSpace,
445	443	to: AddressSpace,
446	444	) bool {
447		const arch = target.cpu.arch;
448		switch (arch) {
449		.x86_64, .x86 => return arch.supportsAddressSpace(from) and arch.supportsAddressSpace(to),
	445	switch (target.cpu.arch) {
	446	.x86_64, .x86 => return target.cpu.supportsAddressSpace(from, null) and target.cpu.supportsAddressSpace(to, null),
450	447	.nvptx64, .nvptx, .amdgcn => {
451		const to_generic = arch.supportsAddressSpace(from) and to == .generic;
452		const from_generic = arch.supportsAddressSpace(to) and from == .generic;
	448	const to_generic = target.cpu.supportsAddressSpace(from, null) and to == .generic;
	449	const from_generic = target.cpu.supportsAddressSpace(to, null) and from == .generic;
453	450	return to_generic or from_generic;
454	451	},
455	452	else => return from == .generic and to == .generic,

stage1/zig.h+94-57

...	...	@@ -9,6 +9,7 @@
9	9	#define zig_clang
10	10	#define zig_gnuc
11	11	#elif defined(__GNUC__)
	12	#define zig_gcc
12	13	#define zig_gnuc
13	14	#elif defined(__IBMC__)
14	15	#define zig_xlc
...	...	@@ -171,7 +172,7 @@
171	172	#define zig_callconv(c) __attribute__((c))
172	173	#endif
173	174
174		#if zig_has_attribute(naked) \|\| defined(zig_gnuc)
	175	#if zig_has_attribute(naked) \|\| defined(zig_gcc)
175	176	#define zig_naked_decl __attribute__((naked))
176	177	#define zig_naked __attribute__((naked))
177	178	#elif defined(zig_msvc)
...	...	@@ -265,7 +266,7 @@
265	266	#define zig_linksection_fn zig_linksection
266	267	#endif
267	268
268		#if zig_has_builtin(unreachable) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	269	#if zig_has_builtin(unreachable) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
269	270	#define zig_unreachable() __builtin_unreachable()
270	271	#elif defined(zig_msvc)
271	272	#define zig_unreachable() __assume(0)
...	...	@@ -293,11 +294,11 @@
293	294	#endif /* zig_macho */
294	295	#endif /* zig_msvc */
295	296
296		#if (zig_has_attribute(alias) \|\| defined(zig_tinyc)) && !defined(zig_macho)
297		#define zig_export(symbol, name) __attribute__((alias(symbol)))
298		#elif defined(zig_msvc)
	297	#if defined(zig_msvc)
299	298	#define zig_export(symbol, name) ; \
300	299	__pragma(comment(linker, "/alternatename:" zig_mangle_c(name) "=" zig_mangle_c(symbol)))
	300	#elif (zig_has_attribute(alias) \|\| defined(zig_tinyc)) && !defined(zig_macho)
	301	#define zig_export(symbol, name) __attribute__((alias(symbol)))
301	302	#else
302	303	#define zig_export(symbol, name) ; \
303	304	__asm(zig_mangle_c(name) " = " zig_mangle_c(symbol))
...	...	@@ -321,7 +322,7 @@
321	322	#if defined(zig_msvc)
322	323	#define zig_import(Type, fn_name, libc_name, sig_args, call_args) zig_extern Type fn_name sig_args;\
323	324	__pragma(comment(linker, "/alternatename:" zig_mangle_c(#fn_name) "=" zig_mangle_c(#libc_name)));
324		#define zig_import_builtin(Type, fn_name, libc_name, sig_args, call_args) zig_import(Type, fn_name, sig_args, call_args)
	325	#define zig_import_builtin(Type, fn_name, libc_name, sig_args, call_args) zig_import(Type, fn_name, libc_name, sig_args, call_args)
325	326	#else /* zig_msvc */
326	327	#define zig_import(Type, fn_name, libc_name, sig_args, call_args) zig_extern Type fn_name sig_args __asm(zig_mangle_c(#libc_name));
327	328	#define zig_import_builtin(Type, fn_name, libc_name, sig_args, call_args) zig_extern Type libc_name sig_args; \
...	...	@@ -331,7 +332,7 @@
331	332	#define zig_expand_import_0(Type, fn_name, libc_name, sig_args, call_args) zig_import(Type, fn_name, libc_name, sig_args, call_args)
332	333	#define zig_expand_import_1(Type, fn_name, libc_name, sig_args, call_args) zig_import_builtin(Type, fn_name, libc_name, sig_args, call_args)
333	334
334		#if zig_has_attribute(weak) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	335	#if zig_has_attribute(weak) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
335	336	#define zig_weak_linkage __attribute__((weak))
336	337	#define zig_weak_linkage_fn __attribute__((weak))
337	338	#elif defined(zig_msvc)
...	...	@@ -418,7 +419,7 @@
418	419	#define zig_breakpoint() zig_breakpoint_unavailable
419	420	#endif
420	421
421		#if zig_has_builtin(return_address) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	422	#if zig_has_builtin(return_address) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
422	423	#define zig_return_address() __builtin_extract_return_addr(__builtin_return_address(0))
423	424	#elif defined(zig_msvc)
424	425	#define zig_return_address() _ReturnAddress()
...	...	@@ -426,7 +427,7 @@
426	427	#define zig_return_address() 0
427	428	#endif
428	429
429		#if zig_has_builtin(frame_address) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	430	#if zig_has_builtin(frame_address) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
430	431	#define zig_frame_address() __builtin_frame_address(0)
431	432	#elif defined(zig_msvc)
432	433	#define zig_frame_address() _AddressOfReturnAddress()
...	...	@@ -434,7 +435,7 @@
434	435	#define zig_frame_address() 0
435	436	#endif
436	437
437		#if zig_has_builtin(prefetch) \|\| defined(zig_gnuc)
	438	#if zig_has_builtin(prefetch) \|\| defined(zig_gcc)
438	439	#define zig_prefetch(addr, rw, locality) __builtin_prefetch(addr, rw, locality)
439	440	#else
440	441	#define zig_prefetch(addr, rw, locality)
...	...	@@ -452,7 +453,7 @@
452	453	#define zig_noreturn [[noreturn]]
453	454	#elif __STDC_VERSION__ >= 201112L
454	455	#define zig_noreturn _Noreturn
455		#elif zig_has_attribute(noreturn) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	456	#elif zig_has_attribute(noreturn) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
456	457	#define zig_noreturn __attribute__((noreturn))
457	458	#elif defined(zig_msvc)
458	459	#define zig_noreturn __declspec(noreturn)
...	...	@@ -650,7 +651,7 @@ typedef ptrdiff_t intptr_t;
650	651	zig_operator(Type, Type, operation, operator)
651	652	#define zig_shift_operator(Type, operation, operator) \
652	653	zig_operator(Type, uint8_t, operation, operator)
653		#define zig_int_helpers(w) \
	654	#define zig_int_helpers(w, PromotedUnsigned) \
654	655	zig_basic_operator(uint##w##_t, and_u##w, &) \
655	656	zig_basic_operator( int##w##_t, and_i##w, &) \
656	657	zig_basic_operator(uint##w##_t, or_u##w, \|) \
...	...	@@ -726,19 +727,51 @@ typedef ptrdiff_t intptr_t;
726	727	} \
727	728	\
728	729	static inline uint##w##_t zig_mulw_u##w(uint##w##_t lhs, uint##w##_t rhs, uint8_t bits) { \
729		return zig_wrap_u##w(lhs * rhs, bits); \
	730	return zig_wrap_u##w((PromotedUnsigned)lhs * rhs, bits); \
730	731	} \
731	732	\
732	733	static inline int##w##_t zig_mulw_i##w(int##w##_t lhs, int##w##_t rhs, uint8_t bits) { \
733	734	return zig_wrap_i##w((int##w##_t)((uint##w##_t)lhs * (uint##w##_t)rhs), bits); \
734	735	}
735		zig_int_helpers(8)
736		zig_int_helpers(16)
737		zig_int_helpers(32)
738		zig_int_helpers(64)
	736	#if UINT8_MAX <= UINT_MAX
	737	zig_int_helpers(8, unsigned int)
	738	#elif UINT8_MAX <= ULONG_MAX
	739	zig_int_helpers(8, unsigned long)
	740	#elif UINT8_MAX <= ULLONG_MAX
	741	zig_int_helpers(8, unsigned long long)
	742	#else
	743	zig_int_helpers(8, uint8_t)
	744	#endif
	745	#if UINT16_MAX <= UINT_MAX
	746	zig_int_helpers(16, unsigned int)
	747	#elif UINT16_MAX <= ULONG_MAX
	748	zig_int_helpers(16, unsigned long)
	749	#elif UINT16_MAX <= ULLONG_MAX
	750	zig_int_helpers(16, unsigned long long)
	751	#else
	752	zig_int_helpers(16, uint16_t)
	753	#endif
	754	#if UINT32_MAX <= UINT_MAX
	755	zig_int_helpers(32, unsigned int)
	756	#elif UINT32_MAX <= ULONG_MAX
	757	zig_int_helpers(32, unsigned long)
	758	#elif UINT32_MAX <= ULLONG_MAX
	759	zig_int_helpers(32, unsigned long long)
	760	#else
	761	zig_int_helpers(32, uint32_t)
	762	#endif
	763	#if UINT64_MAX <= UINT_MAX
	764	zig_int_helpers(64, unsigned int)
	765	#elif UINT64_MAX <= ULONG_MAX
	766	zig_int_helpers(64, unsigned long)
	767	#elif UINT64_MAX <= ULLONG_MAX
	768	zig_int_helpers(64, unsigned long long)
	769	#else
	770	zig_int_helpers(64, uint64_t)
	771	#endif
739	772
740	773	static inline bool zig_addo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8_t bits) {
741		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	774	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
742	775	uint32_t full_res;
743	776	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
744	777	*res = zig_wrap_u32(full_res, bits);
...	...	@@ -751,7 +784,7 @@ static inline bool zig_addo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8
751	784
752	785	zig_extern int32_t __addosi4(int32_t lhs, int32_t rhs, int *overflow);
753	786	static inline bool zig_addo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t bits) {
754		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	787	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
755	788	int32_t full_res;
756	789	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
757	790	#else
...	...	@@ -764,7 +797,7 @@ static inline bool zig_addo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t
764	797	}
765	798
766	799	static inline bool zig_addo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8_t bits) {
767		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	800	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
768	801	uint64_t full_res;
769	802	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
770	803	*res = zig_wrap_u64(full_res, bits);
...	...	@@ -777,7 +810,7 @@ static inline bool zig_addo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8
777	810
778	811	zig_extern int64_t __addodi4(int64_t lhs, int64_t rhs, int *overflow);
779	812	static inline bool zig_addo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t bits) {
780		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	813	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
781	814	int64_t full_res;
782	815	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
783	816	#else
...	...	@@ -790,7 +823,7 @@ static inline bool zig_addo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t
790	823	}
791	824
792	825	static inline bool zig_addo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t bits) {
793		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	826	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
794	827	uint8_t full_res;
795	828	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
796	829	*res = zig_wrap_u8(full_res, bits);
...	...	@@ -804,7 +837,7 @@ static inline bool zig_addo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t b
804	837	}
805	838
806	839	static inline bool zig_addo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits) {
807		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	840	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
808	841	int8_t full_res;
809	842	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
810	843	*res = zig_wrap_i8(full_res, bits);
...	...	@@ -818,7 +851,7 @@ static inline bool zig_addo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits
818	851	}
819	852
820	853	static inline bool zig_addo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8_t bits) {
821		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	854	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
822	855	uint16_t full_res;
823	856	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
824	857	*res = zig_wrap_u16(full_res, bits);
...	...	@@ -832,7 +865,7 @@ static inline bool zig_addo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8
832	865	}
833	866
834	867	static inline bool zig_addo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t bits) {
835		#if zig_has_builtin(add_overflow) \|\| defined(zig_gnuc)
	868	#if zig_has_builtin(add_overflow) \|\| defined(zig_gcc)
836	869	int16_t full_res;
837	870	bool overflow = __builtin_add_overflow(lhs, rhs, &full_res);
838	871	*res = zig_wrap_i16(full_res, bits);
...	...	@@ -846,7 +879,7 @@ static inline bool zig_addo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t
846	879	}
847	880
848	881	static inline bool zig_subo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8_t bits) {
849		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	882	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
850	883	uint32_t full_res;
851	884	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
852	885	*res = zig_wrap_u32(full_res, bits);
...	...	@@ -859,7 +892,7 @@ static inline bool zig_subo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8
859	892
860	893	zig_extern int32_t __subosi4(int32_t lhs, int32_t rhs, int *overflow);
861	894	static inline bool zig_subo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t bits) {
862		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	895	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
863	896	int32_t full_res;
864	897	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
865	898	#else
...	...	@@ -872,7 +905,7 @@ static inline bool zig_subo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t
872	905	}
873	906
874	907	static inline bool zig_subo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8_t bits) {
875		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	908	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
876	909	uint64_t full_res;
877	910	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
878	911	*res = zig_wrap_u64(full_res, bits);
...	...	@@ -885,7 +918,7 @@ static inline bool zig_subo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8
885	918
886	919	zig_extern int64_t __subodi4(int64_t lhs, int64_t rhs, int *overflow);
887	920	static inline bool zig_subo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t bits) {
888		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	921	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
889	922	int64_t full_res;
890	923	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
891	924	#else
...	...	@@ -898,7 +931,7 @@ static inline bool zig_subo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t
898	931	}
899	932
900	933	static inline bool zig_subo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t bits) {
901		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	934	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
902	935	uint8_t full_res;
903	936	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
904	937	*res = zig_wrap_u8(full_res, bits);
...	...	@@ -912,7 +945,7 @@ static inline bool zig_subo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t b
912	945	}
913	946
914	947	static inline bool zig_subo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits) {
915		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	948	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
916	949	int8_t full_res;
917	950	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
918	951	*res = zig_wrap_i8(full_res, bits);
...	...	@@ -926,7 +959,7 @@ static inline bool zig_subo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits
926	959	}
927	960
928	961	static inline bool zig_subo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8_t bits) {
929		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	962	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
930	963	uint16_t full_res;
931	964	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
932	965	*res = zig_wrap_u16(full_res, bits);
...	...	@@ -940,7 +973,7 @@ static inline bool zig_subo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8
940	973	}
941	974
942	975	static inline bool zig_subo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t bits) {
943		#if zig_has_builtin(sub_overflow) \|\| defined(zig_gnuc)
	976	#if zig_has_builtin(sub_overflow) \|\| defined(zig_gcc)
944	977	int16_t full_res;
945	978	bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res);
946	979	*res = zig_wrap_i16(full_res, bits);
...	...	@@ -954,7 +987,7 @@ static inline bool zig_subo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t
954	987	}
955	988
956	989	static inline bool zig_mulo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8_t bits) {
957		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	990	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
958	991	uint32_t full_res;
959	992	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
960	993	*res = zig_wrap_u32(full_res, bits);
...	...	@@ -967,7 +1000,7 @@ static inline bool zig_mulo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8
967	1000
968	1001	zig_extern int32_t __mulosi4(int32_t lhs, int32_t rhs, int *overflow);
969	1002	static inline bool zig_mulo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t bits) {
970		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1003	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
971	1004	int32_t full_res;
972	1005	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
973	1006	#else
...	...	@@ -980,7 +1013,7 @@ static inline bool zig_mulo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t
980	1013	}
981	1014
982	1015	static inline bool zig_mulo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8_t bits) {
983		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1016	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
984	1017	uint64_t full_res;
985	1018	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
986	1019	*res = zig_wrap_u64(full_res, bits);
...	...	@@ -993,7 +1026,7 @@ static inline bool zig_mulo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8
993	1026
994	1027	zig_extern int64_t __mulodi4(int64_t lhs, int64_t rhs, int *overflow);
995	1028	static inline bool zig_mulo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t bits) {
996		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1029	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
997	1030	int64_t full_res;
998	1031	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
999	1032	#else
...	...	@@ -1006,7 +1039,7 @@ static inline bool zig_mulo_i64(int64_t *res, int64_t lhs, int64_t rhs, uint8_t
1006	1039	}
1007	1040
1008	1041	static inline bool zig_mulo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t bits) {
1009		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1042	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
1010	1043	uint8_t full_res;
1011	1044	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
1012	1045	*res = zig_wrap_u8(full_res, bits);
...	...	@@ -1020,7 +1053,7 @@ static inline bool zig_mulo_u8(uint8_t *res, uint8_t lhs, uint8_t rhs, uint8_t b
1020	1053	}
1021	1054
1022	1055	static inline bool zig_mulo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits) {
1023		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1056	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
1024	1057	int8_t full_res;
1025	1058	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
1026	1059	*res = zig_wrap_i8(full_res, bits);
...	...	@@ -1034,7 +1067,7 @@ static inline bool zig_mulo_i8(int8_t *res, int8_t lhs, int8_t rhs, uint8_t bits
1034	1067	}
1035	1068
1036	1069	static inline bool zig_mulo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8_t bits) {
1037		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1070	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
1038	1071	uint16_t full_res;
1039	1072	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
1040	1073	*res = zig_wrap_u16(full_res, bits);
...	...	@@ -1048,7 +1081,7 @@ static inline bool zig_mulo_u16(uint16_t *res, uint16_t lhs, uint16_t rhs, uint8
1048	1081	}
1049	1082
1050	1083	static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t bits) {
1051		#if zig_has_builtin(mul_overflow) \|\| defined(zig_gnuc)
	1084	#if zig_has_builtin(mul_overflow) \|\| defined(zig_gcc)
1052	1085	int16_t full_res;
1053	1086	bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res);
1054	1087	*res = zig_wrap_i16(full_res, bits);
...	...	@@ -1157,7 +1190,7 @@ static inline int8_t zig_byte_swap_i8(int8_t val, uint8_t bits) {
1157	1190
1158	1191	static inline uint16_t zig_byte_swap_u16(uint16_t val, uint8_t bits) {
1159	1192	uint16_t full_res;
1160		#if zig_has_builtin(bswap16) \|\| defined(zig_gnuc)
	1193	#if zig_has_builtin(bswap16) \|\| defined(zig_gcc)
1161	1194	full_res = __builtin_bswap16(val);
1162	1195	#else
1163	1196	full_res = (uint16_t)zig_byte_swap_u8((uint8_t)(val >> 0), 8) << 8 \|
...	...	@@ -1172,7 +1205,7 @@ static inline int16_t zig_byte_swap_i16(int16_t val, uint8_t bits) {
1172	1205
1173	1206	static inline uint32_t zig_byte_swap_u32(uint32_t val, uint8_t bits) {
1174	1207	uint32_t full_res;
1175		#if zig_has_builtin(bswap32) \|\| defined(zig_gnuc)
	1208	#if zig_has_builtin(bswap32) \|\| defined(zig_gcc)
1176	1209	full_res = __builtin_bswap32(val);
1177	1210	#else
1178	1211	full_res = (uint32_t)zig_byte_swap_u16((uint16_t)(val >> 0), 16) << 16 \|
...	...	@@ -1187,7 +1220,7 @@ static inline int32_t zig_byte_swap_i32(int32_t val, uint8_t bits) {
1187	1220
1188	1221	static inline uint64_t zig_byte_swap_u64(uint64_t val, uint8_t bits) {
1189	1222	uint64_t full_res;
1190		#if zig_has_builtin(bswap64) \|\| defined(zig_gnuc)
	1223	#if zig_has_builtin(bswap64) \|\| defined(zig_gcc)
1191	1224	full_res = __builtin_bswap64(val);
1192	1225	#else
1193	1226	full_res = (uint64_t)zig_byte_swap_u32((uint32_t)(val >> 0), 32) << 32 \|
...	...	@@ -1267,7 +1300,7 @@ static inline int64_t zig_bit_reverse_i64(int64_t val, uint8_t bits) {
1267	1300	static inline uint8_t zig_popcount_i##w(int##w##_t val, uint8_t bits) { \
1268	1301	return zig_popcount_u##w((uint##w##_t)val, bits); \
1269	1302	}
1270		#if zig_has_builtin(popcount) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	1303	#if zig_has_builtin(popcount) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
1271	1304	#define zig_builtin_popcount(w) \
1272	1305	static inline uint8_t zig_popcount_u##w(uint##w##_t val, uint8_t bits) { \
1273	1306	(void)bits; \
...	...	@@ -1296,7 +1329,7 @@ zig_builtin_popcount(64)
1296	1329	static inline uint8_t zig_ctz_i##w(int##w##_t val, uint8_t bits) { \
1297	1330	return zig_ctz_u##w((uint##w##_t)val, bits); \
1298	1331	}
1299		#if zig_has_builtin(ctz) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	1332	#if zig_has_builtin(ctz) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
1300	1333	#define zig_builtin_ctz(w) \
1301	1334	static inline uint8_t zig_ctz_u##w(uint##w##_t val, uint8_t bits) { \
1302	1335	if (val == 0) return bits; \
...	...	@@ -1321,7 +1354,7 @@ zig_builtin_ctz(64)
1321	1354	static inline uint8_t zig_clz_i##w(int##w##_t val, uint8_t bits) { \
1322	1355	return zig_clz_u##w((uint##w##_t)val, bits); \
1323	1356	}
1324		#if zig_has_builtin(clz) \|\| defined(zig_gnuc) \|\| defined(zig_tinyc)
	1357	#if zig_has_builtin(clz) \|\| defined(zig_gcc) \|\| defined(zig_tinyc)
1325	1358	#define zig_builtin_clz(w) \
1326	1359	static inline uint8_t zig_clz_u##w(uint##w##_t val, uint8_t bits) { \
1327	1360	if (val == 0) return bits; \
...	...	@@ -3176,7 +3209,7 @@ long double __cdecl nanl(char const* input);
3176	3209	#define __builtin_infl() zig_msvc_flt_infl
3177	3210	#endif
3178	3211
3179		#if (zig_has_builtin(nan) && zig_has_builtin(nans) && zig_has_builtin(inf)) \|\| defined(zig_gnuc)
	3212	#if (zig_has_builtin(nan) && zig_has_builtin(nans) && zig_has_builtin(inf)) \|\| defined(zig_gcc)
3180	3213	#define zig_make_special_f16(sign, name, arg, repr) sign zig_make_f16 (__builtin_##name, )(arg)
3181	3214	#define zig_make_special_f32(sign, name, arg, repr) sign zig_make_f32 (__builtin_##name, )(arg)
3182	3215	#define zig_make_special_f64(sign, name, arg, repr) sign zig_make_f64 (__builtin_##name, )(arg)
...	...	@@ -3202,7 +3235,7 @@ typedef double zig_f16;
3202	3235	#elif LDBL_MANT_DIG == 11
3203	3236	typedef long double zig_f16;
3204	3237	#define zig_make_f16(fp, repr) fp##l
3205		#elif FLT16_MANT_DIG == 11 && (zig_has_builtin(inff16) \|\| defined(zig_gnuc))
	3238	#elif FLT16_MANT_DIG == 11 && (zig_has_builtin(inff16) \|\| defined(zig_gcc))
3206	3239	typedef _Float16 zig_f16;
3207	3240	#define zig_make_f16(fp, repr) fp##f16
3208	3241	#elif defined(__SIZEOF_FP16__)
...	...	@@ -3324,7 +3357,7 @@ typedef zig_u128 zig_f80;
3324	3357	#define zig_init_special_f80(sign, name, arg, repr) repr
3325	3358	#endif
3326	3359
3327		#if !defined(zig_clang) && defined(zig_gnuc) && defined(zig_x86)
	3360	#if defined(zig_gcc) && defined(zig_x86)
3328	3361	#define zig_f128_has_miscompilations 1
3329	3362	#else
3330	3363	#define zig_f128_has_miscompilations 0
...	...	@@ -3729,7 +3762,11 @@ zig_float_builtins(64)
3729	3762	res = zig_atomicrmw_expected; \
3730	3763	} while (0)
3731	3764
3732		#if (__STDC_VERSION__ >= 201112L \|\| (zig_has_include(<stdatomic.h>) && !defined(zig_msvc))) && !defined(__STDC_NO_ATOMICS__)
	3765	#if (__STDC_VERSION__ >= 201112L && !defined(__STDC_NO_ATOMICS__)) \|\| (zig_has_include(<stdatomic.h>) && !defined(zig_msvc))
	3766	#define zig_c11_atomics
	3767	#endif
	3768
	3769	#if defined(zig_c11_atomics)
3733	3770	#include <stdatomic.h>
3734	3771	typedef enum memory_order zig_memory_order;
3735	3772	#define zig_memory_order_relaxed memory_order_relaxed
...	...	@@ -3765,9 +3802,9 @@ typedef int zig_memory_order;
3765	3802	#define zig_memory_order_acq_rel __ATOMIC_ACQ_REL
3766	3803	#define zig_memory_order_seq_cst __ATOMIC_SEQ_CST
3767	3804	#define zig_atomic(Type) Type
3768		#define zig_cmpxchg_strong( obj, expected, desired, succ, fail, Type, ReprType) __atomic_compare_exchange(obj, &(expected), &(desired), false, succ, fail)
3769		#define zig_cmpxchg_weak( obj, expected, desired, succ, fail, Type, ReprType) __atomic_compare_exchange(obj, &(expected), &(desired), true, succ, fail)
3770		#define zig_atomicrmw_xchg(res, obj, arg, order, Type, ReprType) __atomic_exchange(obj, &(arg), &(res), order)
	3805	#define zig_cmpxchg_strong( obj, expected, desired, succ, fail, Type, ReprType) __atomic_compare_exchange(obj, (ReprType )&(expected), (ReprType )&(desired), false, succ, fail)
	3806	#define zig_cmpxchg_weak( obj, expected, desired, succ, fail, Type, ReprType) __atomic_compare_exchange(obj, (ReprType )&(expected), (ReprType )&(desired), true, succ, fail)
	3807	#define zig_atomicrmw_xchg(res, obj, arg, order, Type, ReprType) __atomic_exchange(obj, (ReprType *)&(arg), &(res), order)
3771	3808	#define zig_atomicrmw_add(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_add (obj, arg, order)
3772	3809	#define zig_atomicrmw_sub(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_sub (obj, arg, order)
3773	3810	#define zig_atomicrmw_or(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_or (obj, arg, order)
...	...	@@ -3776,7 +3813,7 @@ typedef int zig_memory_order;
3776	3813	#define zig_atomicrmw_nand(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_nand(obj, arg, order)
3777	3814	#define zig_atomicrmw_min(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_min (obj, arg, order)
3778	3815	#define zig_atomicrmw_max(res, obj, arg, order, Type, ReprType) res = __atomic_fetch_max (obj, arg, order)
3779		#define zig_atomic_store( obj, arg, order, Type, ReprType) __atomic_store (obj, &(arg), order)
	3816	#define zig_atomic_store( obj, arg, order, Type, ReprType) __atomic_store (obj, (ReprType *)&(arg), order)
3780	3817	#define zig_atomic_load(res, obj, order, Type, ReprType) __atomic_load (obj, &(res), order)
3781	3818	#undef zig_atomicrmw_xchg_float
3782	3819	#define zig_atomicrmw_xchg_float zig_atomicrmw_xchg
...	...	@@ -3823,7 +3860,7 @@ typedef int zig_memory_order;
3823	3860	#define zig_atomic_load(res, obj, order, Type, ReprType) zig_atomics_unavailable
3824	3861	#endif
3825	3862
3826		#if defined(zig_msvc) && defined(zig_x86)
	3863	#if !defined(zig_c11_atomics) && defined(zig_msvc) && defined(zig_x86)
3827	3864
3828	3865	/* TODO: zig_msvc_atomic_load should load 32 bit without interlocked on x86, and load 64 bit without interlocked on x64 */
3829	3866
...	...	@@ -4069,7 +4106,7 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a
4069	4106
4070	4107	#endif /* zig_x86_32 */
4071	4108
4072		#endif /* zig_msvc && zig_x86 */
	4109	#endif /* !zig_c11_atomics && zig_msvc && zig_x86 */
4073	4110
4074	4111	/* ======================== Special Case Intrinsics ========================= */
4075	4112

stage1/zig1.wasm

Binary files a/stage1/zig1.wasm and b/stage1/zig1.wasm differ

test/behavior/floatop.zig+2-2

...	...	@@ -126,7 +126,7 @@ test "cmp f16" {
126	126	if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
127	127	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
128	128	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
129		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	129	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
130	130
131	131	try testCmp(f16);
132	132	try comptime testCmp(f16);
...	...	@@ -135,7 +135,7 @@ test "cmp f16" {
135	135	test "cmp f32/f64" {
136	136	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
137	137	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
138		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	138	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
139	139
140	140	try testCmp(f32);
141	141	try comptime testCmp(f32);

test/behavior/math.zig+3-3

...	...	@@ -1639,7 +1639,7 @@ test "NaN comparison" {
1639	1639	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1640	1640	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1641	1641	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1642		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1642	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1643	1643
1644	1644	try testNanEqNan(f16);
1645	1645	try testNanEqNan(f32);
...	...	@@ -1795,7 +1795,7 @@ test "runtime comparison to NaN is comptime-known" {
1795	1795	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1796	1796	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1797	1797	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1798		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1798	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1799	1799
1800	1800	const S = struct {
1801	1801	fn doTheTest(comptime F: type, x: F) void {
...	...	@@ -1826,7 +1826,7 @@ test "runtime int comparison to inf is comptime-known" {
1826	1826	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1827	1827	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1828	1828	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1829		if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1829	if (builtin.cpu.arch.isArm() and builtin.target.abi.float() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1830	1830
1831	1831	const S = struct {
1832	1832	fn doTheTest(comptime F: type, x: u32) void {

test/c_abi/main.zig+4-4

...	...	@@ -135,7 +135,7 @@ export fn zig_f64(x: f64) void {
135	135	expect(x == 56.78) catch @panic("test failure: zig_f64");
136	136	}
137	137	export fn zig_longdouble(x: c_longdouble) void {
138		if (!builtin.target.isWasm()) return; // waiting for #1481
	138	if (!builtin.target.cpu.arch.isWasm()) return; // waiting for #1481
139	139	expect(x == 12.34) catch @panic("test failure: zig_longdouble");
140	140	}
141	141
...	...	@@ -1661,7 +1661,7 @@ test "bool simd vector" {
1661	1661	}
1662	1662
1663	1663	{
1664		if (!builtin.target.isWasm()) c_vector_256_bool(.{
	1664	if (!builtin.target.cpu.arch.isWasm()) c_vector_256_bool(.{
1665	1665	false,
1666	1666	true,
1667	1667	true,
...	...	@@ -2179,7 +2179,7 @@ test "bool simd vector" {
2179	2179	try expect(vec[255] == false);
2180	2180	}
2181	2181	{
2182		if (!builtin.target.isWasm()) c_vector_512_bool(.{
	2182	if (!builtin.target.cpu.arch.isWasm()) c_vector_512_bool(.{
2183	2183	true,
2184	2184	true,
2185	2185	true,
...	...	@@ -5593,7 +5593,7 @@ test "f80 extra struct" {
5593	5593
5594	5594	comptime {
5595	5595	skip: {
5596		if (builtin.target.isWasm()) break :skip;
	5596	if (builtin.target.cpu.arch.isWasm()) break :skip;
5597	5597
5598	5598	_ = struct {
5599	5599	export fn zig_f128(x: f128) f128 {

test/cases/compile_errors/@import_zon_bad_type.zig+3-3

...	...	@@ -117,9 +117,9 @@ export fn testMutablePointer() void {
117	117	// tmp.zig:37:38: note: imported here
118	118	// neg_inf.zon:1:1: error: expected type '?u8'
119	119	// tmp.zig:57:28: note: imported here
120		// neg_inf.zon:1:1: error: expected type 'tmp.testNonExhaustiveEnum__enum_490'
	120	// neg_inf.zon:1:1: error: expected type 'tmp.testNonExhaustiveEnum__enum_487'
121	121	// tmp.zig:62:39: note: imported here
122		// neg_inf.zon:1:1: error: expected type 'tmp.testUntaggedUnion__union_492'
	122	// neg_inf.zon:1:1: error: expected type 'tmp.testUntaggedUnion__union_489'
123	123	// tmp.zig:67:44: note: imported here
124		// neg_inf.zon:1:1: error: expected type 'tmp.testTaggedUnionVoid__union_495'
	124	// neg_inf.zon:1:1: error: expected type 'tmp.testTaggedUnionVoid__union_492'
125	125	// tmp.zig:72:50: note: imported here

test/cases/compile_errors/anytype_param_requires_comptime.zig+1-1

...	...	@@ -15,6 +15,6 @@ pub export fn entry() void {
15	15	// error
16	16	//
17	17	// :7:25: error: unable to resolve comptime value
18		// :7:25: note: initializer of comptime-only struct 'tmp.S.foo__anon_464.C' must be comptime-known
	18	// :7:25: note: initializer of comptime-only struct 'tmp.S.foo__anon_461.C' must be comptime-known
19	19	// :4:16: note: struct requires comptime because of this field
20	20	// :4:16: note: types are not available at runtime

test/cases/compile_errors/bogus_method_call_on_slice.zig+1-1

...	...	@@ -16,5 +16,5 @@ pub export fn entry2() void {
16	16	//
17	17	// :3:6: error: no field or member function named 'copy' in '[]const u8'
18	18	// :9:8: error: no field or member function named 'bar' in '@TypeOf(.{})'
19		// :12:18: error: no field or member function named 'bar' in 'tmp.entry2__struct_468'
	19	// :12:18: error: no field or member function named 'bar' in 'tmp.entry2__struct_465'
20	20	// :12:6: note: struct declared here

test/cases/compile_errors/callconv_apcs_aapcs_aapcsvfp_on_unsupported_platform.zig+2-4

...	...	@@ -1,10 +1,8 @@
1		export fn entry1() callconv(.APCS) void {}
2	1	export fn entry2() callconv(.AAPCS) void {}
3	2	export fn entry3() callconv(.AAPCSVFP) void {}
4	3
5	4	// error
6	5	// target=x86_64-linux-none
7	6	//
8		// :1:30: error: calling convention 'arm_apcs' only available on architectures 'arm', 'armeb', 'thumb', 'thumbeb'
9		// :2:30: error: calling convention 'arm_aapcs' only available on architectures 'arm', 'armeb', 'thumb', 'thumbeb'
10		// :3:30: error: calling convention 'arm_aapcs_vfp' only available on architectures 'arm', 'armeb', 'thumb', 'thumbeb'
	7	// :1:30: error: calling convention 'arm_aapcs' only available on architectures 'arm', 'armeb', 'thumb', 'thumbeb'
	8	// :2:30: error: calling convention 'arm_aapcs_vfp' only available on architectures 'arm', 'armeb', 'thumb', 'thumbeb'

test/cases/compile_errors/coerce_anon_struct.zig+1-1

...	...	@@ -6,6 +6,6 @@ export fn foo() void {
6	6
7	7	// error
8	8	//
9		// :4:16: error: expected type 'tmp.T', found 'tmp.foo__struct_457'
	9	// :4:16: error: expected type 'tmp.T', found 'tmp.foo__struct_454'
10	10	// :3:16: note: struct declared here
11	11	// :1:11: note: struct declared here

test/cases/compile_errors/redundant_try.zig+2-2

...	...	@@ -44,9 +44,9 @@ comptime {
44	44	//
45	45	// :5:23: error: expected error union type, found 'comptime_int'
46	46	// :10:23: error: expected error union type, found '@TypeOf(.{})'
47		// :15:23: error: expected error union type, found 'tmp.test2__struct_494'
	47	// :15:23: error: expected error union type, found 'tmp.test2__struct_491'
48	48	// :15:23: note: struct declared here
49		// :20:27: error: expected error union type, found 'tmp.test3__struct_496'
	49	// :20:27: error: expected error union type, found 'tmp.test3__struct_493'
50	50	// :20:27: note: struct declared here
51	51	// :25:23: error: expected error union type, found 'struct { comptime *const [5:0]u8 = "hello" }'
52	52	// :31:13: error: expected error union type, found 'u32'

test/standalone/stack_iterator/build.zig+2-2

...	...	@@ -24,7 +24,7 @@ pub fn build(b: *std.Build) void {
24	24	.root_source_file = b.path("unwind.zig"),
25	25	.target = target,
26	26	.optimize = optimize,
27		.unwind_tables = if (target.result.isDarwin()) .@"async" else null,
	27	.unwind_tables = if (target.result.os.tag.isDarwin()) .@"async" else null,
28	28	.omit_frame_pointer = false,
29	29	}),
30	30	});
...	...	@@ -94,7 +94,7 @@ pub fn build(b: *std.Build) void {
94	94	.root_source_file = b.path("shared_lib_unwind.zig"),
95	95	.target = target,
96	96	.optimize = optimize,
97		.unwind_tables = if (target.result.isDarwin()) .@"async" else null,
	97	.unwind_tables = if (target.result.os.tag.isDarwin()) .@"async" else null,
98	98	.omit_frame_pointer = true,
99	99	}),
100	100	});

test/standalone/stack_iterator/shared_lib_unwind.zig+2-2

...	...	@@ -36,8 +36,8 @@ extern fn frame0(
36	36
37	37	pub fn main() !void {
38	38	// Disabled until the DWARF unwinder bugs on .aarch64 are solved
39		if (builtin.omit_frame_pointer and comptime builtin.target.isDarwin() and builtin.cpu.arch == .aarch64) return;
40		if (builtin.target.isDarwin() and builtin.cpu.arch == .x86_64) return; // https://github.com/ziglang/zig/issues/21337
	39	if (builtin.omit_frame_pointer and comptime builtin.target.os.tag.isDarwin() and builtin.cpu.arch == .aarch64) return;
	40	if (builtin.target.os.tag.isDarwin() and builtin.cpu.arch == .x86_64) return; // https://github.com/ziglang/zig/issues/21337
41	41
42	42	if (!std.debug.have_ucontext or !std.debug.have_getcontext) return;
43	43

test/standalone/stack_iterator/unwind.zig+1-1

...	...	@@ -88,7 +88,7 @@ noinline fn frame0(expected: [4]usize, unwound: [4]usize) void {
88	88
89	89	pub fn main() !void {
90	90	// Disabled until the DWARF unwinder bugs on .aarch64 are solved
91		if (builtin.omit_frame_pointer and comptime builtin.target.isDarwin() and builtin.cpu.arch == .aarch64) return;
	91	if (builtin.omit_frame_pointer and comptime builtin.target.os.tag.isDarwin() and builtin.cpu.arch == .aarch64) return;
92	92
93	93	if (!std.debug.have_ucontext or !std.debug.have_getcontext) return;
94	94

tools/update_cpu_features.zig+361-281

...	...	@@ -34,10 +34,12 @@ const Feature = struct {
34	34	flatten: bool = false,
35	35	};
36	36
37		const LlvmTarget = struct {
	37	const ArchTarget = struct {
38	38	zig_name: []const u8,
39		llvm_name: []const u8,
40		td_name: []const u8,
	39	llvm: ?struct {
	40	name: []const u8,
	41	td_name: []const u8,
	42	},
41	43	feature_overrides: []const FeatureOverride = &.{},
42	44	extra_cpus: []const Cpu = &.{},
43	45	extra_features: []const Feature = &.{},
...	...	@@ -45,11 +47,13 @@ const LlvmTarget = struct {
45	47	branch_quota: ?usize = null,
46	48	};
47	49
48		const llvm_targets = [_]LlvmTarget{
	50	const targets = [_]ArchTarget{
49	51	.{
50	52	.zig_name = "aarch64",
51		.llvm_name = "AArch64",
52		.td_name = "AArch64.td",
	53	.llvm = .{
	54	.name = "AArch64",
	55	.td_name = "AArch64",
	56	},
53	57	.branch_quota = 2000,
54	58	.feature_overrides = &.{
55	59	.{
...	...	@@ -391,8 +395,10 @@ const llvm_targets = [_]LlvmTarget{
391	395	},
392	396	.{
393	397	.zig_name = "amdgcn",
394		.llvm_name = "AMDGPU",
395		.td_name = "AMDGPU.td",
	398	.llvm = .{
	399	.name = "AMDGPU",
	400	.td_name = "AMDGPU",
	401	},
396	402	.feature_overrides = &.{
397	403	.{
398	404	.llvm_name = "DumpCode",
...	...	@@ -418,13 +424,17 @@ const llvm_targets = [_]LlvmTarget{
418	424	},
419	425	.{
420	426	.zig_name = "arc",
421		.llvm_name = "ARC",
422		.td_name = "ARC.td",
	427	.llvm = .{
	428	.name = "ARC",
	429	.td_name = "ARC",
	430	},
423	431	},
424	432	.{
425	433	.zig_name = "arm",
426		.llvm_name = "ARM",
427		.td_name = "ARM.td",
	434	.llvm = .{
	435	.name = "ARM",
	436	.td_name = "ARM",
	437	},
428	438	.branch_quota = 10000,
429	439	.feature_overrides = &.{
430	440	.{
...	...	@@ -928,66 +938,113 @@ const llvm_targets = [_]LlvmTarget{
928	938	},
929	939	.{
930	940	.zig_name = "avr",
931		.llvm_name = "AVR",
932		.td_name = "AVR.td",
	941	.llvm = .{
	942	.name = "AVR",
	943	.td_name = "AVR",
	944	},
933	945	},
934	946	.{
935	947	.zig_name = "bpf",
936		.llvm_name = "BPF",
937		.td_name = "BPF.td",
	948	.llvm = .{
	949	.name = "BPF",
	950	.td_name = "BPF",
	951	},
938	952	},
939	953	.{
940	954	.zig_name = "csky",
941		.llvm_name = "CSKY",
942		.td_name = "CSKY.td",
	955	.llvm = .{
	956	.name = "CSKY",
	957	.td_name = "CSKY",
	958	},
943	959	},
944	960	.{
945	961	.zig_name = "hexagon",
946		.llvm_name = "Hexagon",
947		.td_name = "Hexagon.td",
	962	.llvm = .{
	963	.name = "Hexagon",
	964	.td_name = "Hexagon",
	965	},
948	966	},
949	967	.{
950	968	.zig_name = "lanai",
951		.llvm_name = "Lanai",
952		.td_name = "Lanai.td",
	969	.llvm = .{
	970	.name = "Lanai",
	971	.td_name = "Lanai",
	972	},
953	973	},
954	974	.{
955	975	.zig_name = "loongarch",
956		.llvm_name = "LoongArch",
957		.td_name = "LoongArch.td",
	976	.llvm = .{
	977	.name = "LoongArch",
	978	.td_name = "LoongArch",
	979	},
958	980	},
959	981	.{
960	982	.zig_name = "m68k",
961		.llvm_name = "M68k",
962		.td_name = "M68k.td",
	983	.llvm = .{
	984	.name = "M68k",
	985	.td_name = "M68k",
	986	},
963	987	},
964	988	.{
965	989	.zig_name = "msp430",
966		.llvm_name = "MSP430",
967		.td_name = "MSP430.td",
	990	.llvm = .{
	991	.name = "MSP430",
	992	.td_name = "MSP430",
	993	},
968	994	},
969	995	.{
970	996	.zig_name = "mips",
971		.llvm_name = "Mips",
972		.td_name = "Mips.td",
	997	.llvm = .{
	998	.name = "Mips",
	999	.td_name = "Mips",
	1000	},
973	1001	},
974	1002	.{
975	1003	.zig_name = "nvptx",
976		.llvm_name = "NVPTX",
977		.td_name = "NVPTX.td",
	1004	.llvm = .{
	1005	.name = "NVPTX",
	1006	.td_name = "NVPTX",
	1007	},
978	1008	},
979	1009	.{
980	1010	.zig_name = "powerpc",
981		.llvm_name = "PowerPC",
982		.td_name = "PPC.td",
	1011	.llvm = .{
	1012	.name = "PowerPC",
	1013	.td_name = "PPC",
	1014	},
983	1015	.omit_cpus = &.{
984	1016	"ppc32",
985	1017	},
986	1018	},
	1019	.{
	1020	.zig_name = "propeller",
	1021	.llvm = null,
	1022	.extra_features = &.{
	1023	.{
	1024	.zig_name = "p2",
	1025	.desc = "Enable Propeller 2",
	1026	.deps = &.{},
	1027	},
	1028	},
	1029	.extra_cpus = &.{
	1030	.{
	1031	.llvm_name = null,
	1032	.zig_name = "p1",
	1033	.features = &.{},
	1034	},
	1035	.{
	1036	.llvm_name = null,
	1037	.zig_name = "p2",
	1038	.features = &.{"p2"},
	1039	},
	1040	},
	1041	},
987	1042	.{
988	1043	.zig_name = "riscv",
989		.llvm_name = "RISCV",
990		.td_name = "RISCV.td",
	1044	.llvm = .{
	1045	.name = "RISCV",
	1046	.td_name = "RISCV",
	1047	},
991	1048	.branch_quota = 2000,
992	1049	.feature_overrides = &.{
993	1050	.{
...	...	@@ -1010,29 +1067,38 @@ const llvm_targets = [_]LlvmTarget{
1010	1067	},
1011	1068	.{
1012	1069	.zig_name = "sparc",
1013		.llvm_name = "Sparc",
1014		.td_name = "Sparc.td",
	1070	.llvm = .{
	1071	.name = "Sparc",
	1072	.td_name = "Sparc",
	1073	},
1015	1074	},
1016	1075	// TODO: merge tools/update_spirv_features.zig into this script
1017	1076	//.{
1018	1077	// .zig_name = "spirv",
1019		// .llvm_name = "SPIRV",
1020		// .td_name = "SPIRV.td",
	1078	// .llvm = .{
	1079	// .name = "SPIRV",
	1080	// },
1021	1081	//},
1022	1082	.{
1023	1083	.zig_name = "s390x",
1024		.llvm_name = "SystemZ",
1025		.td_name = "SystemZ.td",
	1084	.llvm = .{
	1085	.name = "SystemZ",
	1086	.td_name = "SystemZ",
	1087	},
1026	1088	},
1027	1089	.{
1028	1090	.zig_name = "ve",
1029		.llvm_name = "VE",
1030		.td_name = "VE.td",
	1091	.llvm = .{
	1092	.name = "VE",
	1093	.td_name = "VE",
	1094	},
1031	1095	},
1032	1096	.{
1033	1097	.zig_name = "wasm",
1034		.llvm_name = "WebAssembly",
1035		.td_name = "WebAssembly.td",
	1098	.llvm = .{
	1099	.name = "WebAssembly",
	1100	.td_name = "WebAssembly",
	1101	},
1036	1102	.extra_features = &.{
1037	1103	.{
1038	1104	.zig_name = "nontrapping_bulk_memory_len0",
...	...	@@ -1057,8 +1123,10 @@ const llvm_targets = [_]LlvmTarget{
1057	1123	},
1058	1124	.{
1059	1125	.zig_name = "x86",
1060		.llvm_name = "X86",
1061		.td_name = "X86.td",
	1126	.llvm = .{
	1127	.name = "X86",
	1128	.td_name = "X86",
	1129	},
1062	1130	.feature_overrides = &.{
1063	1131	.{
1064	1132	.llvm_name = "64bit-mode",
...	...	@@ -1362,13 +1430,17 @@ const llvm_targets = [_]LlvmTarget{
1362	1430	},
1363	1431	.{
1364	1432	.zig_name = "xcore",
1365		.llvm_name = "XCore",
1366		.td_name = "XCore.td",
	1433	.llvm = .{
	1434	.name = "XCore",
	1435	.td_name = "XCore",
	1436	},
1367	1437	},
1368	1438	.{
1369	1439	.zig_name = "xtensa",
1370		.llvm_name = "Xtensa",
1371		.td_name = "Xtensa.td",
	1440	.llvm = .{
	1441	.name = "Xtensa",
	1442	.td_name = "Xtensa",
	1443	},
1372	1444	},
1373	1445	};
1374	1446
...	...	@@ -1413,33 +1485,33 @@ pub fn main() anyerror!void {
1413	1485	var zig_src_dir = try fs.cwd().openDir(zig_src_root, .{});
1414	1486	defer zig_src_dir.close();
1415	1487
1416		const root_progress = std.Progress.start(.{ .estimated_total_items = llvm_targets.len });
	1488	const root_progress = std.Progress.start(.{ .estimated_total_items = targets.len });
1417	1489	defer root_progress.end();
1418	1490
1419	1491	if (builtin.single_threaded) {
1420		for (llvm_targets) \|llvm_target\| {
1421		if (filter) \|zig_name\| if (!std.mem.eql(u8, llvm_target.zig_name, zig_name)) continue;
	1492	for (targets) \|target\| {
	1493	if (filter) \|zig_name\| if (!std.mem.eql(u8, target.zig_name, zig_name)) continue;
1422	1494	try processOneTarget(.{
1423	1495	.llvm_tblgen_exe = llvm_tblgen_exe,
1424	1496	.llvm_src_root = llvm_src_root,
1425	1497	.zig_src_dir = zig_src_dir,
1426	1498	.root_progress = root_progress,
1427		.llvm_target = llvm_target,
	1499	.target = target,
1428	1500	});
1429	1501	}
1430	1502	} else {
1431	1503	var pool: std.Thread.Pool = undefined;
1432		try pool.init(.{ .allocator = arena, .n_jobs = llvm_targets.len });
	1504	try pool.init(.{ .allocator = arena, .n_jobs = targets.len });
1433	1505	defer pool.deinit();
1434	1506
1435		for (llvm_targets) \|llvm_target\| {
1436		if (filter) \|zig_name\| if (!std.mem.eql(u8, llvm_target.zig_name, zig_name)) continue;
	1507	for (targets) \|target\| {
	1508	if (filter) \|zig_name\| if (!std.mem.eql(u8, target.zig_name, zig_name)) continue;
1437	1509	const job = Job{
1438	1510	.llvm_tblgen_exe = llvm_tblgen_exe,
1439	1511	.llvm_src_root = llvm_src_root,
1440	1512	.zig_src_dir = zig_src_dir,
1441	1513	.root_progress = root_progress,
1442		.llvm_target = llvm_target,
	1514	.target = target,
1443	1515	};
1444	1516	try pool.spawn(processOneTarget, .{job});
1445	1517	}
...	...	@@ -1451,162 +1523,147 @@ const Job = struct {
1451	1523	llvm_src_root: []const u8,
1452	1524	zig_src_dir: std.fs.Dir,
1453	1525	root_progress: std.Progress.Node,
1454		llvm_target: LlvmTarget,
	1526	target: ArchTarget,
1455	1527	};
1456	1528
1457	1529	fn processOneTarget(job: Job) void {
1458	1530	errdefer \|err\| std.debug.panic("panic: {s}", .{@errorName(err)});
1459		const llvm_target = job.llvm_target;
	1531	const target = job.target;
1460	1532
1461	1533	var arena_state = std.heap.ArenaAllocator.init(std.heap.page_allocator);
1462	1534	defer arena_state.deinit();
1463	1535	const arena = arena_state.allocator();
1464	1536
1465		const progress_node = job.root_progress.start(llvm_target.zig_name, 3);
	1537	const progress_node = job.root_progress.start(target.zig_name, 3);
1466	1538	defer progress_node.end();
1467	1539
1468		const tblgen_progress = progress_node.start("running llvm-tblgen", 0);
1469
1470		const child_args = [_][]const u8{
1471		job.llvm_tblgen_exe,
1472		"--dump-json",
1473		try std.fmt.allocPrint(arena, "{s}/llvm/lib/Target/{s}/{s}", .{
1474		job.llvm_src_root,
1475		llvm_target.llvm_name,
1476		llvm_target.td_name,
1477		}),
1478		try std.fmt.allocPrint(arena, "-I={s}/llvm/include", .{job.llvm_src_root}),
1479		try std.fmt.allocPrint(arena, "-I={s}/llvm/lib/Target/{s}", .{
1480		job.llvm_src_root, llvm_target.llvm_name,
1481		}),
1482		};
	1540	var features_table = std.StringHashMap(Feature).init(arena);
	1541	var all_features = std.ArrayList(Feature).init(arena);
	1542	var all_cpus = std.ArrayList(Cpu).init(arena);
1483	1543
1484		const child_result = try std.process.Child.run(.{
1485		.allocator = arena,
1486		.argv = &child_args,
1487		.max_output_bytes = 500 * 1024 * 1024,
1488		});
1489		tblgen_progress.end();
1490		if (child_result.stderr.len != 0) {
1491		std.debug.print("{s}\n", .{child_result.stderr});
1492		}
	1544	if (target.llvm) \|llvm\| {
	1545	const tblgen_progress = progress_node.start("running llvm-tblgen", 0);
1493	1546
1494		const json_text = switch (child_result.term) {
1495		.Exited => \|code\| if (code == 0) child_result.stdout else {
1496		std.debug.print("llvm-tblgen exited with code {d}\n", .{code});
1497		std.process.exit(1);
1498		},
1499		else => {
1500		std.debug.print("llvm-tblgen crashed\n", .{});
1501		std.process.exit(1);
1502		},
1503		};
	1547	const child_args = [_][]const u8{
	1548	job.llvm_tblgen_exe,
	1549	"--dump-json",
	1550	try std.fmt.allocPrint(arena, "{s}/llvm/lib/Target/{s}/{s}.td", .{
	1551	job.llvm_src_root,
	1552	llvm.name,
	1553	llvm.td_name,
	1554	}),
	1555	try std.fmt.allocPrint(arena, "-I={s}/llvm/include", .{job.llvm_src_root}),
	1556	try std.fmt.allocPrint(arena, "-I={s}/llvm/lib/Target/{s}", .{
	1557	job.llvm_src_root, llvm.name,
	1558	}),
	1559	};
1504	1560
1505		const json_parse_progress = progress_node.start("parsing JSON", 0);
	1561	const child_result = try std.process.Child.run(.{
	1562	.allocator = arena,
	1563	.argv = &child_args,
	1564	.max_output_bytes = 500 * 1024 * 1024,
	1565	});
	1566	tblgen_progress.end();
	1567	if (child_result.stderr.len != 0) {
	1568	std.debug.print("{s}\n", .{child_result.stderr});
	1569	}
1506	1570
1507		const parsed = try json.parseFromSlice(json.Value, arena, json_text, .{});
1508		defer parsed.deinit();
1509		const root_map = &parsed.value.object;
1510		json_parse_progress.end();
	1571	const json_text = switch (child_result.term) {
	1572	.Exited => \|code\| if (code == 0) child_result.stdout else {
	1573	std.debug.print("llvm-tblgen exited with code {d}\n", .{code});
	1574	std.process.exit(1);
	1575	},
	1576	else => {
	1577	std.debug.print("llvm-tblgen crashed\n", .{});
	1578	std.process.exit(1);
	1579	},
	1580	};
1511	1581
1512		const render_progress = progress_node.start("rendering Zig code", 0);
	1582	const json_parse_progress = progress_node.start("parsing JSON", 0);
1513	1583
1514		// So far, LLVM only has a few aliases for the same CPU.
1515		var cpu_aliases = std.StringHashMap(std.SegmentedList(struct {
1516		llvm: []const u8,
1517		zig: []const u8,
1518		}, 4)).init(arena);
	1584	const parsed = try json.parseFromSlice(json.Value, arena, json_text, .{});
	1585	defer parsed.deinit();
	1586	const root_map = &parsed.value.object;
	1587	json_parse_progress.end();
1519	1588
1520		{
1521		var it = root_map.iterator();
1522		while (it.next()) \|kv\| {
1523		if (kv.key_ptr.len == 0) continue;
1524		if (kv.key_ptr.*[0] == '!') continue;
1525		if (kv.value_ptr.* != .object) continue;
1526		if (hasSuperclass(&kv.value_ptr.object, "ProcessorAlias")) {
1527		// Note that `Name` is actually the alias, while `Alias` is the name that will have
1528		// a full `Processor` object defined.
1529		const llvm_alias = kv.value_ptr.object.get("Name").?.string;
1530		const llvm_name = kv.value_ptr.object.get("Alias").?.string;
1531
1532		const gop = try cpu_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name));
1533
1534		if (!gop.found_existing) gop.value_ptr.* = .{};
1535
1536		try gop.value_ptr.append(arena, .{
1537		.llvm = llvm_alias,
1538		.zig = try llvmNameToZigName(arena, llvm_alias),
1539		});
	1589	const collate_progress = progress_node.start("collating LLVM data", 0);
	1590
	1591	// So far, LLVM only has a few aliases for the same CPU.
	1592	var cpu_aliases = std.StringHashMap(std.SegmentedList(struct {
	1593	llvm: []const u8,
	1594	zig: []const u8,
	1595	}, 4)).init(arena);
	1596
	1597	{
	1598	var it = root_map.iterator();
	1599	while (it.next()) \|kv\| {
	1600	if (kv.key_ptr.len == 0) continue;
	1601	if (kv.key_ptr.*[0] == '!') continue;
	1602	if (kv.value_ptr.* != .object) continue;
	1603	if (hasSuperclass(&kv.value_ptr.object, "ProcessorAlias")) {
	1604	// Note that `Name` is actually the alias, while `Alias` is the name that will have
	1605	// a full `Processor` object defined.
	1606	const llvm_alias = kv.value_ptr.object.get("Name").?.string;
	1607	const llvm_name = kv.value_ptr.object.get("Alias").?.string;
	1608
	1609	const gop = try cpu_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name));
	1610
	1611	if (!gop.found_existing) gop.value_ptr.* = .{};
	1612
	1613	try gop.value_ptr.append(arena, .{
	1614	.llvm = llvm_alias,
	1615	.zig = try llvmNameToZigName(arena, llvm_alias),
	1616	});
	1617	}
1540	1618	}
1541	1619	}
1542		}
1543	1620
1544		var features_table = std.StringHashMap(Feature).init(arena);
1545		var all_features = std.ArrayList(Feature).init(arena);
1546		var all_cpus = std.ArrayList(Cpu).init(arena);
1547		{
1548		var it = root_map.iterator();
1549		while (it.next()) \|kv\| {
1550		if (kv.key_ptr.len == 0) continue;
1551		if (kv.key_ptr.*[0] == '!') continue;
1552		if (kv.value_ptr.* != .object) continue;
1553		if (hasSuperclass(&kv.value_ptr.object, "SubtargetFeature")) {
1554		const llvm_name = kv.value_ptr.object.get("Name").?.string;
1555		if (llvm_name.len == 0) continue;
1556
1557		var zig_name = try llvmNameToZigName(arena, llvm_name);
1558		var desc = kv.value_ptr.object.get("Desc").?.string;
1559		var deps = std.ArrayList([]const u8).init(arena);
1560		var omit = false;
1561		var flatten = false;
1562		var omit_deps: []const []const u8 = &.{};
1563		var extra_deps: []const []const u8 = &.{};
1564		for (llvm_target.feature_overrides) \|feature_override\| {
1565		if (mem.eql(u8, llvm_name, feature_override.llvm_name)) {
1566		if (feature_override.omit) {
1567		// Still put the feature into the table so that we can
1568		// expand dependencies for the feature overrides marked `flatten`.
1569		omit = true;
1570		}
1571		if (feature_override.flatten) {
1572		flatten = true;
1573		}
1574		if (feature_override.zig_name) \|override_name\| {
1575		zig_name = override_name;
1576		}
1577		if (feature_override.desc) \|override_desc\| {
1578		desc = override_desc;
	1621	{
	1622	var it = root_map.iterator();
	1623	while (it.next()) \|kv\| {
	1624	if (kv.key_ptr.len == 0) continue;
	1625	if (kv.key_ptr.*[0] == '!') continue;
	1626	if (kv.value_ptr.* != .object) continue;
	1627	if (hasSuperclass(&kv.value_ptr.object, "SubtargetFeature")) {
	1628	const llvm_name = kv.value_ptr.object.get("Name").?.string;
	1629	if (llvm_name.len == 0) continue;
	1630
	1631	var zig_name = try llvmNameToZigName(arena, llvm_name);
	1632	var desc = kv.value_ptr.object.get("Desc").?.string;
	1633	var deps = std.ArrayList([]const u8).init(arena);
	1634	var omit = false;
	1635	var flatten = false;
	1636	var omit_deps: []const []const u8 = &.{};
	1637	var extra_deps: []const []const u8 = &.{};
	1638	for (target.feature_overrides) \|feature_override\| {
	1639	if (mem.eql(u8, llvm_name, feature_override.llvm_name)) {
	1640	if (feature_override.omit) {
	1641	// Still put the feature into the table so that we can
	1642	// expand dependencies for the feature overrides marked `flatten`.
	1643	omit = true;
	1644	}
	1645	if (feature_override.flatten) {
	1646	flatten = true;
	1647	}
	1648	if (feature_override.zig_name) \|override_name\| {
	1649	zig_name = override_name;
	1650	}
	1651	if (feature_override.desc) \|override_desc\| {
	1652	desc = override_desc;
	1653	}
	1654	omit_deps = feature_override.omit_deps;
	1655	extra_deps = feature_override.extra_deps;
	1656	break;
1579	1657	}
1580		omit_deps = feature_override.omit_deps;
1581		extra_deps = feature_override.extra_deps;
1582		break;
1583	1658	}
1584		}
1585		const implies = kv.value_ptr.object.get("Implies").?.array;
1586		for (implies.items) \|imply\| {
1587		const other_key = imply.object.get("def").?.string;
1588		const other_obj = root_map.get(other_key).?.object;
1589		const other_llvm_name = other_obj.get("Name").?.string;
1590		const other_zig_name = (try llvmFeatureNameToZigNameOmit(
1591		arena,
1592		llvm_target,
1593		other_llvm_name,
1594		)) orelse continue;
1595		for (omit_deps) \|omit_dep\| {
1596		if (mem.eql(u8, other_zig_name, omit_dep)) break;
1597		} else {
1598		try deps.append(other_zig_name);
1599		}
1600		}
1601		// This is used by AArch64.
1602		if (kv.value_ptr.object.get("DefaultExts")) \|exts_val\| {
1603		for (exts_val.array.items) \|ext\| {
1604		const other_key = ext.object.get("def").?.string;
	1659	const implies = kv.value_ptr.object.get("Implies").?.array;
	1660	for (implies.items) \|imply\| {
	1661	const other_key = imply.object.get("def").?.string;
1605	1662	const other_obj = root_map.get(other_key).?.object;
1606	1663	const other_llvm_name = other_obj.get("Name").?.string;
1607	1664	const other_zig_name = (try llvmFeatureNameToZigNameOmit(
1608	1665	arena,
1609		llvm_target,
	1666	target,
1610	1667	other_llvm_name,
1611	1668	)) orelse continue;
1612	1669	for (omit_deps) \|omit_dep\| {
...	...	@@ -1615,118 +1672,141 @@ fn processOneTarget(job: Job) void {
1615	1672	try deps.append(other_zig_name);
1616	1673	}
1617	1674	}
	1675	// This is used by AArch64.
	1676	if (kv.value_ptr.object.get("DefaultExts")) \|exts_val\| {
	1677	for (exts_val.array.items) \|ext\| {
	1678	const other_key = ext.object.get("def").?.string;
	1679	const other_obj = root_map.get(other_key).?.object;
	1680	const other_llvm_name = other_obj.get("Name").?.string;
	1681	const other_zig_name = (try llvmFeatureNameToZigNameOmit(
	1682	arena,
	1683	target,
	1684	other_llvm_name,
	1685	)) orelse continue;
	1686	for (omit_deps) \|omit_dep\| {
	1687	if (mem.eql(u8, other_zig_name, omit_dep)) break;
	1688	} else {
	1689	try deps.append(other_zig_name);
	1690	}
	1691	}
	1692	}
	1693	for (extra_deps) \|extra_dep\| {
	1694	try deps.append(extra_dep);
	1695	}
	1696	const feature: Feature = .{
	1697	.llvm_name = llvm_name,
	1698	.zig_name = zig_name,
	1699	.desc = desc,
	1700	.deps = deps.items,
	1701	.flatten = flatten,
	1702	};
	1703	try features_table.put(zig_name, feature);
	1704	if (!omit and !flatten) {
	1705	try all_features.append(feature);
	1706	}
1618	1707	}
1619		for (extra_deps) \|extra_dep\| {
1620		try deps.append(extra_dep);
1621		}
1622		const feature: Feature = .{
1623		.llvm_name = llvm_name,
1624		.zig_name = zig_name,
1625		.desc = desc,
1626		.deps = deps.items,
1627		.flatten = flatten,
1628		};
1629		try features_table.put(zig_name, feature);
1630		if (!omit and !flatten) {
1631		try all_features.append(feature);
1632		}
1633		}
1634		if (hasSuperclass(&kv.value_ptr.object, "Processor")) {
1635		const llvm_name = kv.value_ptr.object.get("Name").?.string;
1636		if (llvm_name.len == 0) continue;
1637		const omitted = for (llvm_target.omit_cpus) \|omit_cpu_name\| {
1638		if (mem.eql(u8, omit_cpu_name, llvm_name)) break true;
1639		} else false;
1640		if (omitted) continue;
1641
1642		var zig_name = try llvmNameToZigName(arena, llvm_name);
1643		var deps = std.ArrayList([]const u8).init(arena);
1644		var omit_deps: []const []const u8 = &.{};
1645		var extra_deps: []const []const u8 = &.{};
1646		for (llvm_target.feature_overrides) \|feature_override\| {
1647		if (mem.eql(u8, llvm_name, feature_override.llvm_name)) {
1648		if (feature_override.omit) {
1649		continue;
	1708	if (hasSuperclass(&kv.value_ptr.object, "Processor")) {
	1709	const llvm_name = kv.value_ptr.object.get("Name").?.string;
	1710	if (llvm_name.len == 0) continue;
	1711	const omitted = for (target.omit_cpus) \|omit_cpu_name\| {
	1712	if (mem.eql(u8, omit_cpu_name, llvm_name)) break true;
	1713	} else false;
	1714	if (omitted) continue;
	1715
	1716	var zig_name = try llvmNameToZigName(arena, llvm_name);
	1717	var deps = std.ArrayList([]const u8).init(arena);
	1718	var omit_deps: []const []const u8 = &.{};
	1719	var extra_deps: []const []const u8 = &.{};
	1720	for (target.feature_overrides) \|feature_override\| {
	1721	if (mem.eql(u8, llvm_name, feature_override.llvm_name)) {
	1722	if (feature_override.omit) {
	1723	continue;
	1724	}
	1725	if (feature_override.zig_name) \|override_name\| {
	1726	zig_name = override_name;
	1727	}
	1728	omit_deps = feature_override.omit_deps;
	1729	extra_deps = feature_override.extra_deps;
	1730	break;
1650	1731	}
1651		if (feature_override.zig_name) \|override_name\| {
1652		zig_name = override_name;
	1732	}
	1733	const features = kv.value_ptr.object.get("Features").?.array;
	1734	for (features.items) \|feature\| {
	1735	const feature_key = feature.object.get("def").?.string;
	1736	const feature_obj = root_map.get(feature_key).?.object;
	1737	const feature_llvm_name = feature_obj.get("Name").?.string;
	1738	if (feature_llvm_name.len == 0) continue;
	1739	const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
	1740	arena,
	1741	target,
	1742	feature_llvm_name,
	1743	)) orelse continue;
	1744	for (omit_deps) \|omit_dep\| {
	1745	if (mem.eql(u8, feature_zig_name, omit_dep)) break;
	1746	} else {
	1747	try deps.append(feature_zig_name);
1653	1748	}
1654		omit_deps = feature_override.omit_deps;
1655		extra_deps = feature_override.extra_deps;
1656		break;
1657	1749	}
1658		}
1659		const features = kv.value_ptr.object.get("Features").?.array;
1660		for (features.items) \|feature\| {
1661		const feature_key = feature.object.get("def").?.string;
1662		const feature_obj = root_map.get(feature_key).?.object;
1663		const feature_llvm_name = feature_obj.get("Name").?.string;
1664		if (feature_llvm_name.len == 0) continue;
1665		const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
1666		arena,
1667		llvm_target,
1668		feature_llvm_name,
1669		)) orelse continue;
1670		for (omit_deps) \|omit_dep\| {
1671		if (mem.eql(u8, feature_zig_name, omit_dep)) break;
1672		} else {
	1750	for (extra_deps) \|extra_dep\| {
	1751	try deps.append(extra_dep);
	1752	}
	1753	const tune_features = kv.value_ptr.object.get("TuneFeatures").?.array;
	1754	for (tune_features.items) \|feature\| {
	1755	const feature_key = feature.object.get("def").?.string;
	1756	const feature_obj = root_map.get(feature_key).?.object;
	1757	const feature_llvm_name = feature_obj.get("Name").?.string;
	1758	if (feature_llvm_name.len == 0) continue;
	1759	const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
	1760	arena,
	1761	target,
	1762	feature_llvm_name,
	1763	)) orelse continue;
1673	1764	try deps.append(feature_zig_name);
1674	1765	}
1675		}
1676		for (extra_deps) \|extra_dep\| {
1677		try deps.append(extra_dep);
1678		}
1679		const tune_features = kv.value_ptr.object.get("TuneFeatures").?.array;
1680		for (tune_features.items) \|feature\| {
1681		const feature_key = feature.object.get("def").?.string;
1682		const feature_obj = root_map.get(feature_key).?.object;
1683		const feature_llvm_name = feature_obj.get("Name").?.string;
1684		if (feature_llvm_name.len == 0) continue;
1685		const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
1686		arena,
1687		llvm_target,
1688		feature_llvm_name,
1689		)) orelse continue;
1690		try deps.append(feature_zig_name);
1691		}
1692		try all_cpus.append(.{
1693		.llvm_name = llvm_name,
1694		.zig_name = zig_name,
1695		.features = deps.items,
1696		});
1697
1698		if (cpu_aliases.get(zig_name)) \|aliases\| {
1699		var alias_it = aliases.constIterator(0);
1700
1701		alias_it: while (alias_it.next()) \|alias\| {
1702		for (llvm_target.omit_cpus) \|omit_cpu_name\| {
1703		if (mem.eql(u8, omit_cpu_name, alias.llvm)) continue :alias_it;
1704		}
	1766	try all_cpus.append(.{
	1767	.llvm_name = llvm_name,
	1768	.zig_name = zig_name,
	1769	.features = deps.items,
	1770	});
	1771
	1772	if (cpu_aliases.get(zig_name)) \|aliases\| {
	1773	var alias_it = aliases.constIterator(0);
1705	1774
1706		try all_cpus.append(.{
1707		.llvm_name = alias.llvm,
1708		.zig_name = alias.zig,
1709		.features = deps.items,
1710		});
	1775	alias_it: while (alias_it.next()) \|alias\| {
	1776	for (target.omit_cpus) \|omit_cpu_name\| {
	1777	if (mem.eql(u8, omit_cpu_name, alias.llvm)) continue :alias_it;
	1778	}
	1779
	1780	try all_cpus.append(.{
	1781	.llvm_name = alias.llvm,
	1782	.zig_name = alias.zig,
	1783	.features = deps.items,
	1784	});
	1785	}
1711	1786	}
1712	1787	}
1713	1788	}
1714	1789	}
	1790
	1791	collate_progress.end();
1715	1792	}
1716		for (llvm_target.extra_features) \|extra_feature\| {
	1793
	1794	for (target.extra_features) \|extra_feature\| {
1717	1795	try features_table.put(extra_feature.zig_name, extra_feature);
1718	1796	try all_features.append(extra_feature);
1719	1797	}
1720		for (llvm_target.extra_cpus) \|extra_cpu\| {
	1798	for (target.extra_cpus) \|extra_cpu\| {
1721	1799	try all_cpus.append(extra_cpu);
1722	1800	}
1723	1801	mem.sort(Feature, all_features.items, {}, featureLessThan);
1724	1802	mem.sort(Cpu, all_cpus.items, {}, cpuLessThan);
1725	1803
	1804	const render_progress = progress_node.start("rendering Zig code", 0);
	1805
1726	1806	var target_dir = try job.zig_src_dir.openDir("lib/std/Target", .{});
1727	1807	defer target_dir.close();
1728	1808
1729		const zig_code_basename = try std.fmt.allocPrint(arena, "{s}.zig", .{llvm_target.zig_name});
	1809	const zig_code_basename = try std.fmt.allocPrint(arena, "{s}.zig", .{target.zig_name});
1730	1810	var zig_code_file = try target_dir.createFile(zig_code_basename, .{});
1731	1811	defer zig_code_file.close();
1732	1812
...	...	@@ -1760,7 +1840,7 @@ fn processOneTarget(job: Job) void {
1760	1840	\\pub const all_features = blk: {
1761	1841	\\
1762	1842	);
1763		if (llvm_target.branch_quota) \|branch_quota\| {
	1843	if (target.branch_quota) \|branch_quota\| {
1764	1844	try w.print(" @setEvalBranchQuota({d});\n", .{branch_quota});
1765	1845	}
1766	1846	try w.writeAll(
...	...	@@ -1941,10 +2021,10 @@ fn llvmNameToZigName(arena: mem.Allocator, llvm_name: []const u8) ![]const u8 {
1941	2021
1942	2022	fn llvmFeatureNameToZigNameOmit(
1943	2023	arena: mem.Allocator,
1944		llvm_target: LlvmTarget,
	2024	target: ArchTarget,
1945	2025	llvm_name: []const u8,
1946	2026	) !?[]const u8 {
1947		for (llvm_target.feature_overrides) \|feature_override\| {
	2027	for (target.feature_overrides) \|feature_override\| {
1948	2028	if (mem.eql(u8, feature_override.llvm_name, llvm_name)) {
1949	2029	if (feature_override.omit) return null;
1950	2030	return feature_override.zig_name orelse break;

author	Alex Rønne Petersen <alex@alexrp.com> 2025-02-18 00:51:59+01:00
committer	GitHub <noreply@github.com> 2025-02-18 00:51:59+01:00
log	b732070fd36267fb055347e3aa8a1851e4054d50
tree	9851eb03564eff472bbb4a605e13e4058baed4c6
parent	55c46870b23ac16670beaa3ff1c082b703738307
parent	faccd79ca5debbe22fe168193b8de54393257604
signature	Signed by PGP key B5690EEEBB952194

Merge pull request #22589 from alexrp/target-changes