| ... | @@ -1267,7 +1267,7 @@ extern fn c_ret_vector_256_bool() Vector256Bool; | ... | @@ -1267,7 +1267,7 @@ extern fn c_ret_vector_256_bool() Vector256Bool; |
| 1267 | extern fn c_ret_vector_512_bool() Vector512Bool; | 1267 | extern fn c_ret_vector_512_bool() Vector512Bool; |
| 1268 | | 1268 | |
| 1269 | test "bool simd vector" { | 1269 | test "bool simd vector" { |
| 1270 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch != .wasm32) return error.SkipZigTest; | 1270 | if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest; |
| 1271 | | 1271 | |
| 1272 | { | 1272 | { |
| 1273 | c_vector_2_bool(.{ | 1273 | c_vector_2_bool(.{ |
| ... | @@ -3373,7 +3373,7 @@ test "bool simd vector" { | ... | @@ -3373,7 +3373,7 @@ test "bool simd vector" { |
| 3373 | comptime { | 3373 | comptime { |
| 3374 | skip: { | 3374 | skip: { |
| 3375 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip; | 3375 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip; |
| 3376 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC()) break :skip; | 3376 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip; |
| 3377 | | 3377 | |
| 3378 | _ = struct { | 3378 | _ = struct { |
| 3379 | export fn zig_vector_2_bool(vec: Vector2Bool) void { | 3379 | export fn zig_vector_2_bool(vec: Vector2Bool) void { |