| ... | ... | @@ -16085,6 +16085,181 @@ test "struct f32, f32, f32, f32, f32" { |
| 16085 | 16085 | c_test_struct_f32_f32_f32_f32_f32(); |
| 16086 | 16086 | } |
| 16087 | 16087 | |
| 16088 | const Struct_array_1_f32 = extern struct { |
| 16089 | a: [1]f32, |
| 16090 | }; |
| 16091 | |
| 16092 | comptime { |
| 16093 | skip: { |
| 16094 | if (builtin.cpu.arch.isWasm()) break :skip; |
| 16095 | |
| 16096 | _ = struct { |
| 16097 | export fn zig_ret_struct_array_1_f32() Struct_array_1_f32 { |
| 16098 | return .{ .a = .{1} }; |
| 16099 | } |
| 16100 | export fn zig_struct_array_1_f32(s: Struct_array_1_f32, i: usize) void { |
| 16101 | expect(s.a[0] == 2) catch @panic("test failure"); |
| 16102 | expect(i == 3) catch @panic("test failure"); |
| 16103 | } |
| 16104 | }; |
| 16105 | } |
| 16106 | } |
| 16107 | |
| 16108 | extern fn c_ret_struct_array_1_f32() Struct_array_1_f32; |
| 16109 | extern fn c_struct_array_1_f32(Struct_array_1_f32, usize) void; |
| 16110 | extern fn c_test_struct_array_1_f32() void; |
| 16111 | |
| 16112 | test "struct [1]f32" { |
| 16113 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16114 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16115 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16116 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16117 | if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest; |
| 16118 | if (builtin.cpu.arch == .s390x) return error.SkipZigTest; |
| 16119 | if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; |
| 16120 | |
| 16121 | const s = c_ret_struct_array_1_f32(); |
| 16122 | try expect(s.a[0] == 4); |
| 16123 | c_struct_array_1_f32(.{ .a = .{5} }, 6); |
| 16124 | c_test_struct_array_1_f32(); |
| 16125 | } |
| 16126 | |
| 16127 | const Struct_array_2_f32 = extern struct { |
| 16128 | a: [2]f32, |
| 16129 | }; |
| 16130 | |
| 16131 | export fn zig_ret_struct_array_2_f32() Struct_array_2_f32 { |
| 16132 | return .{ .a = .{ 1, 2 } }; |
| 16133 | } |
| 16134 | export fn zig_struct_array_2_f32(s: Struct_array_2_f32, i: usize) void { |
| 16135 | expect(s.a[0] == 3) catch @panic("test failure"); |
| 16136 | expect(s.a[1] == 4) catch @panic("test failure"); |
| 16137 | expect(i == 5) catch @panic("test failure"); |
| 16138 | } |
| 16139 | |
| 16140 | extern fn c_ret_struct_array_2_f32() Struct_array_2_f32; |
| 16141 | extern fn c_struct_array_2_f32(Struct_array_2_f32, usize) void; |
| 16142 | extern fn c_test_struct_array_2_f32() void; |
| 16143 | |
| 16144 | test "struct [2]f32" { |
| 16145 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16146 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16147 | if (builtin.cpu.arch == .loongarch64 and builtin.abi.float() == .hard) return error.SkipZigTest; |
| 16148 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16149 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16150 | if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest; |
| 16151 | |
| 16152 | const s = c_ret_struct_array_2_f32(); |
| 16153 | try expect(s.a[0] == 6); |
| 16154 | try expect(s.a[1] == 7); |
| 16155 | c_struct_array_2_f32(.{ .a = .{ 8, 9 } }, 10); |
| 16156 | c_test_struct_array_2_f32(); |
| 16157 | } |
| 16158 | |
| 16159 | const Struct_array_3_f32 = extern struct { |
| 16160 | a: [3]f32, |
| 16161 | }; |
| 16162 | |
| 16163 | export fn zig_ret_struct_array_3_f32() Struct_array_3_f32 { |
| 16164 | return .{ .a = .{ 1, 2, 3 } }; |
| 16165 | } |
| 16166 | export fn zig_struct_array_3_f32(s: Struct_array_3_f32, i: usize) void { |
| 16167 | expect(s.a[0] == 4) catch @panic("test failure"); |
| 16168 | expect(s.a[1] == 5) catch @panic("test failure"); |
| 16169 | expect(s.a[2] == 6) catch @panic("test failure"); |
| 16170 | expect(i == 7) catch @panic("test failure"); |
| 16171 | } |
| 16172 | |
| 16173 | extern fn c_ret_struct_array_3_f32() Struct_array_3_f32; |
| 16174 | extern fn c_struct_array_3_f32(Struct_array_3_f32, usize) void; |
| 16175 | extern fn c_test_struct_array_3_f32() void; |
| 16176 | |
| 16177 | test "struct [3]f32" { |
| 16178 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16179 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16180 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16181 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16182 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16183 | |
| 16184 | const s = c_ret_struct_array_3_f32(); |
| 16185 | try expect(s.a[0] == 8); |
| 16186 | try expect(s.a[1] == 9); |
| 16187 | try expect(s.a[2] == 10); |
| 16188 | c_struct_array_3_f32(.{ .a = .{ 11, 12, 13 } }, 14); |
| 16189 | c_test_struct_array_3_f32(); |
| 16190 | } |
| 16191 | |
| 16192 | const Struct_array_4_f32 = extern struct { |
| 16193 | a: [4]f32, |
| 16194 | }; |
| 16195 | |
| 16196 | export fn zig_ret_struct_array_4_f32() Struct_array_4_f32 { |
| 16197 | return .{ .a = .{ 1, 2, 3, 4 } }; |
| 16198 | } |
| 16199 | export fn zig_struct_array_4_f32(s: Struct_array_4_f32, i: usize) void { |
| 16200 | expect(s.a[0] == 5) catch @panic("test failure"); |
| 16201 | expect(s.a[1] == 6) catch @panic("test failure"); |
| 16202 | expect(s.a[2] == 7) catch @panic("test failure"); |
| 16203 | expect(s.a[3] == 8) catch @panic("test failure"); |
| 16204 | expect(i == 9) catch @panic("test failure"); |
| 16205 | } |
| 16206 | |
| 16207 | extern fn c_ret_struct_array_4_f32() Struct_array_4_f32; |
| 16208 | extern fn c_struct_array_4_f32(Struct_array_4_f32, usize) void; |
| 16209 | extern fn c_test_struct_array_4_f32() void; |
| 16210 | |
| 16211 | test "struct [4]f32" { |
| 16212 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16213 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16214 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16215 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16216 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16217 | |
| 16218 | const s = c_ret_struct_array_4_f32(); |
| 16219 | try expect(s.a[0] == 10); |
| 16220 | try expect(s.a[1] == 11); |
| 16221 | try expect(s.a[2] == 12); |
| 16222 | try expect(s.a[3] == 13); |
| 16223 | c_struct_array_4_f32(.{ .a = .{ 14, 15, 16, 17 } }, 18); |
| 16224 | c_test_struct_array_4_f32(); |
| 16225 | } |
| 16226 | |
| 16227 | const Struct_array_5_f32 = extern struct { |
| 16228 | a: [5]f32, |
| 16229 | }; |
| 16230 | |
| 16231 | export fn zig_ret_struct_array_5_f32() Struct_array_5_f32 { |
| 16232 | return .{ .a = .{ 1, 2, 3, 4, 5 } }; |
| 16233 | } |
| 16234 | export fn zig_struct_array_5_f32(s: Struct_array_5_f32, i: usize) void { |
| 16235 | expect(s.a[0] == 6) catch @panic("test failure"); |
| 16236 | expect(s.a[1] == 7) catch @panic("test failure"); |
| 16237 | expect(s.a[2] == 8) catch @panic("test failure"); |
| 16238 | expect(s.a[3] == 9) catch @panic("test failure"); |
| 16239 | expect(s.a[4] == 10) catch @panic("test failure"); |
| 16240 | expect(i == 11) catch @panic("test failure"); |
| 16241 | } |
| 16242 | |
| 16243 | extern fn c_ret_struct_array_5_f32() Struct_array_5_f32; |
| 16244 | extern fn c_struct_array_5_f32(Struct_array_5_f32, usize) void; |
| 16245 | extern fn c_test_struct_array_5_f32() void; |
| 16246 | |
| 16247 | test "struct [5]f32" { |
| 16248 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16249 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16250 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16251 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16252 | |
| 16253 | const s = c_ret_struct_array_5_f32(); |
| 16254 | try expect(s.a[0] == 12); |
| 16255 | try expect(s.a[1] == 13); |
| 16256 | try expect(s.a[2] == 14); |
| 16257 | try expect(s.a[3] == 15); |
| 16258 | try expect(s.a[4] == 16); |
| 16259 | c_struct_array_5_f32(.{ .a = .{ 17, 18, 19, 20, 21 } }, 22); |
| 16260 | c_test_struct_array_5_f32(); |
| 16261 | } |
| 16262 | |
| 16088 | 16263 | const Struct_f32a8 = extern struct { |
| 16089 | 16264 | a: f32 align(8), |
| 16090 | 16265 | }; |
| ... | ... | @@ -16382,6 +16557,181 @@ test "struct f64, f64, f64, f64, f64" { |
| 16382 | 16557 | c_test_struct_f64_f64_f64_f64_f64(); |
| 16383 | 16558 | } |
| 16384 | 16559 | |
| 16560 | const Struct_array_1_f64 = extern struct { |
| 16561 | a: [1]f64, |
| 16562 | }; |
| 16563 | |
| 16564 | comptime { |
| 16565 | skip: { |
| 16566 | if (builtin.cpu.arch.isWasm()) break :skip; |
| 16567 | |
| 16568 | _ = struct { |
| 16569 | export fn zig_ret_struct_array_1_f64() Struct_array_1_f64 { |
| 16570 | return .{ .a = .{1} }; |
| 16571 | } |
| 16572 | export fn zig_struct_array_1_f64(s: Struct_array_1_f64, i: usize) void { |
| 16573 | expect(s.a[0] == 2) catch @panic("test failure"); |
| 16574 | expect(i == 3) catch @panic("test failure"); |
| 16575 | } |
| 16576 | }; |
| 16577 | } |
| 16578 | } |
| 16579 | |
| 16580 | extern fn c_ret_struct_array_1_f64() Struct_array_1_f64; |
| 16581 | extern fn c_struct_array_1_f64(Struct_array_1_f64, usize) void; |
| 16582 | extern fn c_test_struct_array_1_f64() void; |
| 16583 | |
| 16584 | test "struct [1]f64" { |
| 16585 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16586 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16587 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16588 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16589 | if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest; |
| 16590 | if (builtin.cpu.arch == .s390x) return error.SkipZigTest; |
| 16591 | if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; |
| 16592 | |
| 16593 | const s = c_ret_struct_array_1_f64(); |
| 16594 | try expect(s.a[0] == 4); |
| 16595 | c_struct_array_1_f64(.{ .a = .{5} }, 6); |
| 16596 | c_test_struct_array_1_f64(); |
| 16597 | } |
| 16598 | |
| 16599 | const Struct_array_2_f64 = extern struct { |
| 16600 | a: [2]f64, |
| 16601 | }; |
| 16602 | |
| 16603 | export fn zig_ret_struct_array_2_f64() Struct_array_2_f64 { |
| 16604 | return .{ .a = .{ 1, 2 } }; |
| 16605 | } |
| 16606 | export fn zig_struct_array_2_f64(s: Struct_array_2_f64, i: usize) void { |
| 16607 | expect(s.a[0] == 3) catch @panic("test failure"); |
| 16608 | expect(s.a[1] == 4) catch @panic("test failure"); |
| 16609 | expect(i == 5) catch @panic("test failure"); |
| 16610 | } |
| 16611 | |
| 16612 | extern fn c_ret_struct_array_2_f64() Struct_array_2_f64; |
| 16613 | extern fn c_struct_array_2_f64(Struct_array_2_f64, usize) void; |
| 16614 | extern fn c_test_struct_array_2_f64() void; |
| 16615 | |
| 16616 | test "struct [2]f64" { |
| 16617 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16618 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16619 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16620 | if (builtin.cpu.arch == .loongarch64 and builtin.abi.float() == .hard) return error.SkipZigTest; |
| 16621 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16622 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16623 | if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest; |
| 16624 | |
| 16625 | const s = c_ret_struct_array_2_f64(); |
| 16626 | try expect(s.a[0] == 6); |
| 16627 | try expect(s.a[1] == 7); |
| 16628 | c_struct_array_2_f64(.{ .a = .{ 8, 9 } }, 10); |
| 16629 | c_test_struct_array_2_f64(); |
| 16630 | } |
| 16631 | |
| 16632 | const Struct_array_3_f64 = extern struct { |
| 16633 | a: [3]f64, |
| 16634 | }; |
| 16635 | |
| 16636 | export fn zig_ret_struct_array_3_f64() Struct_array_3_f64 { |
| 16637 | return .{ .a = .{ 1, 2, 3 } }; |
| 16638 | } |
| 16639 | export fn zig_struct_array_3_f64(s: Struct_array_3_f64, i: usize) void { |
| 16640 | expect(s.a[0] == 4) catch @panic("test failure"); |
| 16641 | expect(s.a[1] == 5) catch @panic("test failure"); |
| 16642 | expect(s.a[2] == 6) catch @panic("test failure"); |
| 16643 | expect(i == 7) catch @panic("test failure"); |
| 16644 | } |
| 16645 | |
| 16646 | extern fn c_ret_struct_array_3_f64() Struct_array_3_f64; |
| 16647 | extern fn c_struct_array_3_f64(Struct_array_3_f64, usize) void; |
| 16648 | extern fn c_test_struct_array_3_f64() void; |
| 16649 | |
| 16650 | test "struct [3]f64" { |
| 16651 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16652 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16653 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16654 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16655 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16656 | |
| 16657 | const s = c_ret_struct_array_3_f64(); |
| 16658 | try expect(s.a[0] == 8); |
| 16659 | try expect(s.a[1] == 9); |
| 16660 | try expect(s.a[2] == 10); |
| 16661 | c_struct_array_3_f64(.{ .a = .{ 11, 12, 13 } }, 14); |
| 16662 | c_test_struct_array_3_f64(); |
| 16663 | } |
| 16664 | |
| 16665 | const Struct_array_4_f64 = extern struct { |
| 16666 | a: [4]f64, |
| 16667 | }; |
| 16668 | |
| 16669 | export fn zig_ret_struct_array_4_f64() Struct_array_4_f64 { |
| 16670 | return .{ .a = .{ 1, 2, 3, 4 } }; |
| 16671 | } |
| 16672 | export fn zig_struct_array_4_f64(s: Struct_array_4_f64, i: usize) void { |
| 16673 | expect(s.a[0] == 5) catch @panic("test failure"); |
| 16674 | expect(s.a[1] == 6) catch @panic("test failure"); |
| 16675 | expect(s.a[2] == 7) catch @panic("test failure"); |
| 16676 | expect(s.a[3] == 8) catch @panic("test failure"); |
| 16677 | expect(i == 9) catch @panic("test failure"); |
| 16678 | } |
| 16679 | |
| 16680 | extern fn c_ret_struct_array_4_f64() Struct_array_4_f64; |
| 16681 | extern fn c_struct_array_4_f64(Struct_array_4_f64, usize) void; |
| 16682 | extern fn c_test_struct_array_4_f64() void; |
| 16683 | |
| 16684 | test "struct [4]f64" { |
| 16685 | if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest; |
| 16686 | if (builtin.cpu.arch.isArm()) return error.SkipZigTest; |
| 16687 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16688 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16689 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16690 | |
| 16691 | const s = c_ret_struct_array_4_f64(); |
| 16692 | try expect(s.a[0] == 10); |
| 16693 | try expect(s.a[1] == 11); |
| 16694 | try expect(s.a[2] == 12); |
| 16695 | try expect(s.a[3] == 13); |
| 16696 | c_struct_array_4_f64(.{ .a = .{ 14, 15, 16, 17 } }, 18); |
| 16697 | c_test_struct_array_4_f64(); |
| 16698 | } |
| 16699 | |
| 16700 | const Struct_array_5_f64 = extern struct { |
| 16701 | a: [5]f64, |
| 16702 | }; |
| 16703 | |
| 16704 | export fn zig_ret_struct_array_5_f64() Struct_array_5_f64 { |
| 16705 | return .{ .a = .{ 1, 2, 3, 4, 5 } }; |
| 16706 | } |
| 16707 | export fn zig_struct_array_5_f64(s: Struct_array_5_f64, i: usize) void { |
| 16708 | expect(s.a[0] == 6) catch @panic("test failure"); |
| 16709 | expect(s.a[1] == 7) catch @panic("test failure"); |
| 16710 | expect(s.a[2] == 8) catch @panic("test failure"); |
| 16711 | expect(s.a[3] == 9) catch @panic("test failure"); |
| 16712 | expect(s.a[4] == 10) catch @panic("test failure"); |
| 16713 | expect(i == 11) catch @panic("test failure"); |
| 16714 | } |
| 16715 | |
| 16716 | extern fn c_ret_struct_array_5_f64() Struct_array_5_f64; |
| 16717 | extern fn c_struct_array_5_f64(Struct_array_5_f64, usize) void; |
| 16718 | extern fn c_test_struct_array_5_f64() void; |
| 16719 | |
| 16720 | test "struct [5]f64" { |
| 16721 | if (builtin.cpu.arch == .hexagon) return error.SkipZigTest; |
| 16722 | if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; |
| 16723 | if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest; |
| 16724 | |
| 16725 | const s = c_ret_struct_array_5_f64(); |
| 16726 | try expect(s.a[0] == 12); |
| 16727 | try expect(s.a[1] == 13); |
| 16728 | try expect(s.a[2] == 14); |
| 16729 | try expect(s.a[3] == 15); |
| 16730 | try expect(s.a[4] == 16); |
| 16731 | c_struct_array_5_f64(.{ .a = .{ 17, 18, 19, 20, 21 } }, 22); |
| 16732 | c_test_struct_array_5_f64(); |
| 16733 | } |
| 16734 | |
| 16385 | 16735 | const Struct_u32_Union_u32_u32u32 = extern struct { |
| 16386 | 16736 | a: u32, |
| 16387 | 16737 | b: extern union { |