authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-05-09 23:58:46+02:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-05-09 23:58:46+02:00
logc3b7a5cc26d11a0349ff1d7812b00687cfa41c2e
tree78db1ef862fc73c093b39f3805f82b93b03b11a5
parent7b9f8bfbd80aa37afc160c39b341c59fdd3cbad8

x64: pass tag and maybe_inst explictly to genBinOp


1 files changed, 36 insertions(+), 32 deletions(-)

src/arch/x86_64/CodeGen.zig+36-32
......@@ -1122,7 +1122,7 @@ fn airNot(self: *Self, inst: Air.Inst.Index) !void {
11221122 },
11231123 else => {},
11241124 }
1125 break :result try self.genBinOp(inst, ty_op.operand, .bool_true, true);
1125 break :result try self.genBinOp(.not, inst, ty_op.operand, .bool_true);
11261126 };
11271127 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
11281128}
......@@ -1208,10 +1208,13 @@ fn airSlice(self: *Self, inst: Air.Inst.Index) !void {
12081208
12091209fn airBinOp(self: *Self, inst: Air.Inst.Index) !void {
12101210 const bin_op = self.air.instructions.items(.data)[inst].bin_op;
1211 const result: MCValue = if (self.liveness.isUnused(inst))
1212 .dead
1213 else
1214 try self.genBinOp(inst, bin_op.lhs, bin_op.rhs, true);
1211
1212 if (self.liveness.isUnused(inst)) {
1213 return self.finishAir(inst, .dead, .{ bin_op.lhs, bin_op.rhs, .none });
1214 }
1215
1216 const tag = self.air.instructions.items(.tag)[inst];
1217 const result = try self.genBinOp(tag, inst, bin_op.lhs, bin_op.rhs);
12151218 return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
12161219}
12171220
......@@ -1260,7 +1263,7 @@ fn airAddWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
12601263 try self.spillCompareFlagsIfOccupied();
12611264 self.compare_flags_inst = inst;
12621265
1263 const partial = try self.genBinOp(inst, bin_op.lhs, bin_op.rhs, true);
1266 const partial = try self.genBinOp(.add, inst, bin_op.lhs, bin_op.rhs);
12641267 const result: MCValue = switch (int_info.signedness) {
12651268 .signed => .{ .register_overflow_signed = partial.register },
12661269 .unsigned => .{ .register_overflow_unsigned = partial.register },
......@@ -1292,7 +1295,7 @@ fn airSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
12921295 try self.spillCompareFlagsIfOccupied();
12931296 self.compare_flags_inst = inst;
12941297
1295 const partial = try self.genBinOp(inst, bin_op.lhs, bin_op.rhs, true);
1298 const partial = try self.genBinOp(.sub, inst, bin_op.lhs, bin_op.rhs);
12961299 const result: MCValue = switch (int_info.signedness) {
12971300 .signed => .{ .register_overflow_signed = partial.register },
12981301 .unsigned => .{ .register_overflow_unsigned = partial.register },
......@@ -1329,7 +1332,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
13291332
13301333 if (math.isPowerOfTwo(int_info.bits)) {
13311334 self.compare_flags_inst = inst;
1332 const partial = try self.genBinOp(inst, bin_op.lhs, bin_op.rhs, true);
1335 const partial = try self.genBinOp(.mul, inst, bin_op.lhs, bin_op.rhs);
13331336 break :result switch (int_info.signedness) {
13341337 .signed => MCValue{ .register_overflow_signed = partial.register },
13351338 .unsigned => MCValue{ .register_overflow_unsigned = partial.register },
......@@ -1372,7 +1375,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
13721375 break :dst_reg dst_reg;
13731376 },
13741377 .unsigned => {
1375 const dst_mcv = try self.genBinOp(inst, bin_op.lhs, bin_op.rhs, false);
1378 const dst_mcv = try self.genBinOp(.mul, null, bin_op.lhs, bin_op.rhs);
13761379 break :dst_reg dst_mcv.register;
13771380 },
13781381 }
......@@ -3211,16 +3214,14 @@ fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void {
32113214/// Result is always a register.
32123215fn genBinOp(
32133216 self: *Self,
3214 inst: Air.Inst.Index,
3217 tag: Air.Inst.Tag,
3218 maybe_inst: ?Air.Inst.Index,
32153219 op_lhs: Air.Inst.Ref,
32163220 op_rhs: Air.Inst.Ref,
3217 track: bool,
32183221) !MCValue {
3219 const tag = self.air.instructions.items(.tag)[inst];
32203222 const is_commutative: bool = switch (tag) {
32213223 .add,
32223224 .addwrap,
3223 .add_with_overflow,
32243225 .bool_or,
32253226 .bit_or,
32263227 .bool_and,
......@@ -3231,10 +3232,8 @@ fn genBinOp(
32313232
32323233 .sub,
32333234 .subwrap,
3234 .sub_with_overflow,
32353235 .mul,
32363236 .mulwrap,
3237 .mul_with_overflow,
32383237 .shl,
32393238 .shr,
32403239 .ptr_add,
......@@ -3256,10 +3255,9 @@ fn genBinOp(
32563255 switch (tag) {
32573256 .mul,
32583257 .mulwrap,
3259 .mul_with_overflow,
32603258 => {
32613259 // Spill .rax and .rdx upfront to ensure we don't spill the operands too late.
3262 try self.register_manager.getReg(.rax, if (track) inst else null);
3260 try self.register_manager.getReg(.rax, maybe_inst);
32633261 try self.register_manager.getReg(.rdx, null);
32643262 const reg_locks = self.register_manager.lockRegsAssumeUnused(2, .{ .rax, .rdx });
32653263 defer for (reg_locks) |reg| {
......@@ -3299,18 +3297,17 @@ fn genBinOp(
32993297
33003298 var flipped: bool = false;
33013299 const dst_mcv: MCValue = blk: {
3302 if (self.reuseOperand(inst, op_lhs, 0, lhs) and lhs.isRegister()) {
3303 break :blk lhs;
3304 }
3305 if (is_commutative and self.reuseOperand(inst, op_rhs, 1, rhs) and rhs.isRegister()) {
3306 flipped = true;
3307 break :blk rhs;
3308 }
3309 if (track) {
3300 if (maybe_inst) |inst| {
3301 if (self.reuseOperand(inst, op_lhs, 0, lhs) and lhs.isRegister()) {
3302 break :blk lhs;
3303 }
3304 if (is_commutative and self.reuseOperand(inst, op_rhs, 1, rhs) and rhs.isRegister()) {
3305 flipped = true;
3306 break :blk rhs;
3307 }
33103308 break :blk try self.copyToRegisterWithInstTracking(inst, dst_ty, lhs);
3311 } else {
3312 break :blk MCValue{ .register = try self.copyToTmpRegister(dst_ty, lhs) };
33133309 }
3310 break :blk MCValue{ .register = try self.copyToTmpRegister(dst_ty, lhs) };
33143311 };
33153312 const dst_mcv_lock: ?RegisterLock = switch (dst_mcv) {
33163313 .register => |reg| self.register_manager.lockReg(reg),
......@@ -3332,12 +3329,10 @@ fn genBinOp(
33323329 switch (tag) {
33333330 .add,
33343331 .addwrap,
3335 .add_with_overflow,
33363332 => try self.genBinOpMir(.add, dst_ty, dst_mcv, src_mcv),
33373333
33383334 .sub,
33393335 .subwrap,
3340 .sub_with_overflow,
33413336 => try self.genBinOpMir(.sub, dst_ty, dst_mcv, src_mcv),
33423337
33433338 .ptr_add,
......@@ -3353,9 +3348,18 @@ fn genBinOp(
33533348 try self.genBinOpMir(mir_tag, dst_ty, dst_mcv, src_mcv);
33543349 },
33553350
3356 .bool_or, .bit_or => try self.genBinOpMir(.@"or", dst_ty, dst_mcv, src_mcv),
3357 .bool_and, .bit_and => try self.genBinOpMir(.@"and", dst_ty, dst_mcv, src_mcv),
3358 .xor, .not => try self.genBinOpMir(.xor, dst_ty, dst_mcv, src_mcv),
3351 .bool_or,
3352 .bit_or,
3353 => try self.genBinOpMir(.@"or", dst_ty, dst_mcv, src_mcv),
3354
3355 .bool_and,
3356 .bit_and,
3357 => try self.genBinOpMir(.@"and", dst_ty, dst_mcv, src_mcv),
3358
3359 .xor,
3360 .not,
3361 => try self.genBinOpMir(.xor, dst_ty, dst_mcv, src_mcv),
3362
33593363 else => unreachable,
33603364 }
33613365 return dst_mcv;