Commit c52d437224fcf126acf99868c86baae724915a60 | zig

author	Andrew Kelley <andrew@ziglang.org> 2022-03-06 16:04:02-07:00
committer	Andrew Kelley <andrew@ziglang.org> 2022-03-06 16:11:39-07:00
log	c52d437224fcf126acf99868c86baae724915a60
tree	c261e7fc47422aaf4e99b8de83b9b88837fa3e79
parent	c68d9773dfa87b07b217f4ad761e779a23ab55d4

1 files changed, 10 insertions(+), 0 deletions(-)

src/stage1/target.cpp+10

...	...	@@ -1004,6 +1004,9 @@ bool target_has_debug_info(const ZigTarget *target) {
1004	1004	}
1005	1005
1006	1006	bool target_long_double_is_f128(const ZigTarget *target) {
	1007	if (target->abi == ZigLLVM_MSVC) {
	1008	return false;
	1009	}
1007	1010	switch (target->arch) {
1008	1011	case ZigLLVM_riscv64:
1009	1012	case ZigLLVM_aarch64:
...	...	@@ -1012,6 +1015,13 @@ bool target_long_double_is_f128(const ZigTarget *target) {
1012	1015	case ZigLLVM_systemz:
1013	1016	case ZigLLVM_mips64:
1014	1017	case ZigLLVM_mips64el:
	1018	case ZigLLVM_sparc:
	1019	case ZigLLVM_sparcv9:
	1020	case ZigLLVM_sparcel:
	1021	case ZigLLVM_ppc:
	1022	case ZigLLVM_ppcle:
	1023	case ZigLLVM_ppc64:
	1024	case ZigLLVM_ppc64le:
1015	1025	return true;
1016	1026
1017	1027	default: