authorgravatar for iridescentrosesfall@gmail.comNathan Bourgeois <iridescentrosesfall@gmail.com> 2026-03-21 19:39:04-04:00
committergravatar for iridescentrosesfall@gmail.comNathan Bourgeois <iridescentrosesfall@gmail.com> 2026-03-21 19:39:04-04:00
logc824ce954ee81d438613ea7cf1e9a8111f730732
tree1dd798b3bc97a5200ddf23e9bd7fd43bad29fe64
parent2037dba90f5815f6fc3137c2485e908700c009e5

misc: Add allegrex CPU & features, run tool, update semver


3 files changed, 33 insertions(+), 2 deletions(-)

lib/std/Target.zig+4-2
...@@ -616,7 +616,9 @@ pub const Os = struct {...@@ -616,7 +616,9 @@ pub const Os = struct {
616616
617 .psp => .{617 .psp => .{
618 .semver = .{618 .semver = .{
619 .min = .{ .major = 1, .minor = 0, .patch = 0 },619 // https://www.psdevwiki.com/psp/Official_Firmware_(OFW)#1.XX_Kernel
620 // It appears that the kernel started with semver for 1.XX before later changing to MAJ.MINPATCH in later releases (e.g. 3.60, 6.61)
621 .min = .{ .major = 1, .minor = 0, .patch = 3 },
620 .max = .{ .major = 6, .minor = 61, .patch = 0 },622 .max = .{ .major = 6, .minor = 61, .patch = 0 },
621 },623 },
622 },624 },
...@@ -2034,7 +2036,7 @@ pub const Cpu = struct {...@@ -2034,7 +2036,7 @@ pub const Cpu = struct {
2034 .loongarch64 => &loongarch.cpu.la64v1_0,2036 .loongarch64 => &loongarch.cpu.la64v1_0,
2035 .m68k => &m68k.cpu.M68000,2037 .m68k => &m68k.cpu.M68000,
2036 .mips, .mipsel => switch (os.tag) {2038 .mips, .mipsel => switch (os.tag) {
2037 .psp => &mips.cpu.mips2, // mips2 with some custom instructions, no trap instructions2039 .psp => &mips.cpu.allegrex,
2038 else => &mips.cpu.mips32r2,2040 else => &mips.cpu.mips32r2,
2039 },2041 },
2040 .mips64, .mips64el => &mips.cpu.mips64r2,2042 .mips64, .mips64el => &mips.cpu.mips64r2,
lib/std/Target/mips.zig+15
...@@ -49,6 +49,7 @@ pub const Feature = enum {...@@ -49,6 +49,7 @@ pub const Feature = enum {
49 noabicalls,49 noabicalls,
50 nomadd4,50 nomadd4,
51 nooddspreg,51 nooddspreg,
52 notraps,
52 p5600,53 p5600,
53 ptr64,54 ptr64,
54 single_float,55 single_float,
...@@ -353,6 +354,11 @@ pub const all_features = blk: {...@@ -353,6 +354,11 @@ pub const all_features = blk: {
353 .description = "Disable odd numbered single-precision registers",354 .description = "Disable odd numbered single-precision registers",
354 .dependencies = featureSet(&[_]Feature{}),355 .dependencies = featureSet(&[_]Feature{}),
355 };356 };
357 result[@intFromEnum(Feature.notraps)] = .{
358 .llvm_name = null,
359 .description = "Disable trap instructions",
360 .dependencies = featureSet(&[_]Feature{}),
361 };
356 result[@intFromEnum(Feature.p5600)] = .{362 result[@intFromEnum(Feature.p5600)] = .{
357 .llvm_name = "p5600",363 .llvm_name = "p5600",
358 .description = "The P5600 Processor",364 .description = "The P5600 Processor",
...@@ -419,6 +425,15 @@ pub const all_features = blk: {...@@ -419,6 +425,15 @@ pub const all_features = blk: {
419};425};
420426
421pub const cpu = struct {427pub const cpu = struct {
428 pub const allegrex: CpuModel = .{
429 .name = "allegrex",
430 .llvm_name = null,
431 .features = featureSet(&[_]Feature{
432 .mips2,
433 .notraps,
434 .single_float,
435 }),
436 };
422 pub const generic: CpuModel = .{437 pub const generic: CpuModel = .{
423 .name = "generic",438 .name = "generic",
424 .llvm_name = "generic",439 .llvm_name = "generic",
tools/update_cpu_features.zig+14
...@@ -1299,6 +1299,20 @@ const targets = [_]ArchTarget{...@@ -1299,6 +1299,20 @@ const targets = [_]ArchTarget{
1299 .name = "Mips",1299 .name = "Mips",
1300 .td_name = "Mips",1300 .td_name = "Mips",
1301 },1301 },
1302 .extra_features = &.{
1303 .{
1304 .zig_name = "notraps",
1305 .desc = "Disable trap instructions",
1306 .deps = &.{},
1307 },
1308 },
1309 .extra_cpus = &.{
1310 .{
1311 .llvm_name = null,
1312 .zig_name = "allegrex",
1313 .features = &.{ "mips2", "single_float", "notraps" },
1314 },
1315 },
1302 },1316 },
1303 .{1317 .{
1304 .zig_name = "nvptx",1318 .zig_name = "nvptx",