| author |  LeRoyce Pearson <contact@leroycepearson.dev> 2022-08-15 02:28:42-06:00 |
| committer |  GitHub <noreply@github.com> 2022-08-15 11:28:42+03:00 |
| log | cb901e578cbc321003d5e4327d51d349d91f6dd6 |
| tree | adf78eb78930dddab4c9c92637bdb571b3cdb152 |
| parent | 764cf4e53ffc29bbd39c636020019ae419135d82 |
| signature |  Signed by PGP key 4AEE18F83AFDEB23 |
stage2: add compile errors for comptime `@shrExact` and `@divExact` failures
5 files changed, 39 insertions(+), 13 deletions(-)
src- test
src/Sema.zig+9-3
| ... | ... | @@ -10441,7 +10441,7 @@ fn zirShr( |
| 10441 | 10441 | // Detect if any ones would be shifted out. |
| 10442 | 10442 | const truncated = try lhs_val.intTruncBitsAsValue(lhs_ty, sema.arena, .unsigned, rhs_val, target); |
| 10443 | 10443 | if (!(try truncated.compareWithZeroAdvanced(.eq, sema.kit(block, src)))) { |
| 10444 | return sema.addConstUndef(lhs_ty); | |
| 10444 | return sema.fail(block, src, "exact shift shifted out 1 bits", .{}); | |
| 10445 | 10445 | } |
| 10446 | 10446 | } |
| 10447 | 10447 | const val = try lhs_val.shr(rhs_val, lhs_ty, sema.arena, target); |
| ... | ... | @@ -11346,13 +11346,19 @@ fn zirDivExact(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Ai |
| 11346 | 11346 | if (maybe_lhs_val) |lhs_val| { |
| 11347 | 11347 | if (maybe_rhs_val) |rhs_val| { |
| 11348 | 11348 | if (is_int) { |
| 11349 | // TODO: emit compile error if there is a remainder | |
| 11349 | const modulus_val = try lhs_val.intMod(rhs_val, resolved_type, sema.arena, target); | |
| 11350 | if (modulus_val.compareWithZero(.neq)) { | |
| 11351 | return sema.fail(block, src, "exact division produced remainder", .{}); | |
| 11352 | } | |
| 11350 | 11353 | return sema.addConstant( |
| 11351 | 11354 | resolved_type, |
| 11352 | 11355 | try lhs_val.intDiv(rhs_val, resolved_type, sema.arena, target), |
| 11353 | 11356 | ); |
| 11354 | 11357 | } else { |
| 11355 | // TODO: emit compile error if there is a remainder | |
| 11358 | const modulus_val = try lhs_val.floatMod(rhs_val, resolved_type, sema.arena, target); | |
| 11359 | if (modulus_val.compareWithZero(.neq)) { | |
| 11360 | return sema.fail(block, src, "exact division produced remainder", .{}); | |
| 11361 | } | |
| 11356 | 11362 | return sema.addConstant( |
| 11357 | 11363 | resolved_type, |
| 11358 | 11364 | try lhs_val.floatDiv(rhs_val, resolved_type, sema.arena, target), |
test/cases/compile_errors/exact division failure.zig created+10
| ... | ... | @@ -0,0 +1,10 @@ |
| 1 | comptime { | |
| 2 | const x = @divExact(10, 3); | |
| 3 | _ = x; | |
| 4 | } | |
| 5 | ||
| 6 | // error | |
| 7 | // backend=llvm | |
| 8 | // target=native | |
| 9 | // | |
| 10 | // :2:15: error: exact division produced remainder |
test/cases/compile_errors/float exact division failure.zig created+10
| ... | ... | @@ -0,0 +1,10 @@ |
| 1 | comptime { | |
| 2 | const x = @divExact(10.0, 3.0); | |
| 3 | _ = x; | |
| 4 | } | |
| 5 | ||
| 6 | // error | |
| 7 | // backend=llvm | |
| 8 | // target=native | |
| 9 | // | |
| 10 | // :2:15: error: exact division produced remainder |
test/cases/compile_errors/shrExact_shifts_out_1_bits.zig created+10
| ... | ... | @@ -0,0 +1,10 @@ |
| 1 | comptime { | |
| 2 | const x = @shrExact(@as(u8, 0b10101010), 2); | |
| 3 | _ = x; | |
| 4 | } | |
| 5 | ||
| 6 | // error | |
| 7 | // backend=llvm | |
| 8 | // target=native | |
| 9 | // | |
| 10 | // :2:15: error: exact shift shifted out 1 bits |
test/cases/compile_errors/stage1/obj/shrExact_shifts_out_1_bits.zig deleted-10
| ... | ... | @@ -1,10 +0,0 @@ |
| 1 | comptime { | |
| 2 | const x = @shrExact(@as(u8, 0b10101010), 2); | |
| 3 | _ = x; | |
| 4 | } | |
| 5 | ||
| 6 | // error | |
| 7 | // backend=stage1 | |
| 8 | // target=native | |
| 9 | // | |
| 10 | // tmp.zig:2:15: error: exact shift shifted out 1 bits |