authorgravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-04-13 11:52:17-07:00
committergravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-05-11 02:17:11-07:00
logcc204e2365547c19f7c9e1a836a3ea8c18e3a6ea
tree9d28f5c8ef7866df1fa0e63bc0e633214ab865e0
parent6740c1f0849dd2615859e4d65df355087165e073

riscv: spill args immediately to prevent clobbers


1 files changed, 14 insertions(+), 16 deletions(-)

src/arch/riscv64/CodeGen.zig+14-16
......@@ -1696,17 +1696,8 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void {
16961696 const dst_ty = self.typeOfIndex(inst);
16971697
16981698 const result: MCValue = result: {
1699 const dst_abi_size: u32 = @intCast(dst_ty.abiSize(zcu));
1700
17011699 const src_int_info = src_ty.intInfo(zcu);
17021700 const dst_int_info = dst_ty.intInfo(zcu);
1703 const extend = switch (src_int_info.signedness) {
1704 .signed => dst_int_info,
1705 .unsigned => src_int_info,
1706 }.signedness;
1707
1708 _ = dst_abi_size;
1709 _ = extend;
17101701
17111702 const min_ty = if (dst_int_info.bits < src_int_info.bits) dst_ty else src_ty;
17121703
......@@ -1727,13 +1718,11 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void {
17271718 break :dst dst_mcv;
17281719 };
17291720
1730 if (dst_int_info.bits <= src_int_info.bits) {
1721 if (dst_int_info.bits <= src_int_info.bits)
17311722 break :result dst_mcv;
1732 }
17331723
1734 if (dst_int_info.bits > 64 or src_int_info.bits > 64) {
1724 if (dst_int_info.bits > 64 or src_int_info.bits > 64)
17351725 break :result null; // TODO
1736 }
17371726
17381727 break :result dst_mcv;
17391728 } orelse return self.fail("TODO implement airIntCast from {} to {}", .{
......@@ -3435,6 +3424,7 @@ fn genArgDbgInfo(self: Self, inst: Air.Inst.Index, mcv: MCValue) !void {
34353424}
34363425
34373426fn airArg(self: *Self, inst: Air.Inst.Index) !void {
3427 const zcu = self.bin_file.comp.module.?;
34383428 var arg_index = self.arg_index;
34393429
34403430 // we skip over args that have no bits
......@@ -3445,10 +3435,18 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void {
34453435 const src_mcv = self.args[arg_index];
34463436
34473437 const dst_mcv = switch (src_mcv) {
3448 .register, .register_pair, .load_frame => dst: {
3449 for (src_mcv.getRegs()) |reg| self.register_manager.getRegAssumeFree(reg, inst);
3450 break :dst src_mcv;
3438 .register => dst: {
3439 const frame = try self.allocFrameIndex(FrameAlloc.init(.{
3440 .size = Type.usize.abiSize(zcu),
3441 .alignment = Type.usize.abiAlignment(zcu),
3442 }));
3443 const dst_mcv: MCValue = .{ .load_frame = .{ .index = frame } };
3444
3445 try self.genCopy(Type.usize, dst_mcv, src_mcv);
3446
3447 break :dst dst_mcv;
34513448 },
3449 .load_frame => src_mcv,
34523450 else => return self.fail("TODO: airArg {s}", .{@tagName(src_mcv)}),
34533451 };
34543452