Commit d55d98919dd03ac8dcaa787409cacb895dd105d9 | zig

author	Andrew Kelley <andrew@ziglang.org> 2022-07-01 21:35:19-07:00
committer	Andrew Kelley <andrew@ziglang.org> 2022-07-01 21:35:19-07:00
log	d55d98919dd03ac8dcaa787409cacb895dd105d9
tree	faa2f6788f648dfe728b131ca6f192bbfefe3ec2
parent	d19290e603833a197bc8bfc8315561ec77291225

update CPU features to LLVM 14

Notable changes:

`_i386`, `_i486`, and `_i686` are renamed to `i386`, `i486`,
and `i686` respectively. `std.zig.fmtId` is enhanced to support
formatting `i386` as `@"i386"`.

Some CPU features which are actually CPU models have been
properly flattened, such as `apple_a12`, `apple_a13`, `apple_a7`,
`cortex_a78c`, `exynos_m4`, `neoverse_e1`, `neoverse_n1`,
`neoverse_n2`, `neoverse_v1`.

Some CPU features have been added and some have been removed, following
LLVM's lead.

CSky CPU features support is added.

15 files changed, 1885 insertions(+), 395 deletions(-)

lib
- std
  - target.zig
  - target
    aarch64.zig
    amdgpu.zig
    arm.zig
    avr.zig
    csky.zig
    hexagon.zig
    nvptx.zig
    powerpc.zig
    riscv.zig
    wasm.zig
    x86.zig
  - zig
    fmt.zig
    system
    x86.zig
tools
- update_cpu_features.zig

lib/std/target.zig+2-1

...	...	@@ -444,6 +444,7 @@ pub const Target = struct {
444	444	pub const arm = @import("target/arm.zig");
445	445	pub const avr = @import("target/avr.zig");
446	446	pub const bpf = @import("target/bpf.zig");
	447	pub const csky = @import("target/csky.zig");
447	448	pub const hexagon = @import("target/hexagon.zig");
448	449	pub const mips = @import("target/mips.zig");
449	450	pub const msp430 = @import("target/msp430.zig");
...	...	@@ -1287,7 +1288,7 @@ pub const Target = struct {
1287	1288	.sparc, .sparcel => &sparc.cpu.generic,
1288	1289	.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
1289	1290	.s390x => &systemz.cpu.generic,
1290		.i386 => &x86.cpu._i386,
	1291	.i386 => &x86.cpu.i386,
1291	1292	.x86_64 => &x86.cpu.x86_64,
1292	1293	.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
1293	1294	.ve => &ve.cpu.generic,

lib/std/target/aarch64.zig+477-227

...	...	@@ -5,17 +5,18 @@ const CpuFeature = std.Target.Cpu.Feature;
5	5	const CpuModel = std.Target.Cpu.Model;
6	6
7	7	pub const Feature = enum {
	8	a510,
8	9	a65,
	10	a710,
9	11	a76,
	12	a78,
	13	a78c,
10	14	aes,
11	15	aggressive_fma,
12	16	alternate_sextload_cvt_f32_pattern,
13	17	altnzcv,
14	18	am,
15	19	amvs,
16		apple_a12,
17		apple_a13,
18		apple_a7,
19	20	arith_bcc_fusion,
20	21	arith_cbz_fusion,
21	22	balance_fp_ops,
...	...	@@ -37,7 +38,6 @@ pub const Feature = enum {
37	38	cmp_bcc_fusion,
38	39	complxnum,
39	40	contextidr_el2,
40		cortex_a78c,
41	41	cortex_r82,
42	42	crc,
43	43	crypto,
...	...	@@ -46,12 +46,14 @@ pub const Feature = enum {
46	46	dit,
47	47	dotprod,
48	48	ecv,
	49	el2vmsa,
	50	el3,
49	51	ete,
50	52	exynos_cheap_as_move,
51		exynos_m4,
52	53	f32mm,
53	54	f64mm,
54	55	fgt,
	56	fix_cortex_a53_835769,
55	57	flagm,
56	58	force_32bit_jump_tables,
57	59	fp16fml,
...	...	@@ -67,20 +69,20 @@ pub const Feature = enum {
67	69	harden_sls_blr,
68	70	harden_sls_nocomdat,
69	71	harden_sls_retbr,
	72	hbc,
70	73	hcx,
71	74	i8mm,
72	75	jsconv,
73	76	lor,
74	77	ls64,
75	78	lse,
	79	lse2,
76	80	lsl_fast,
	81	mops,
77	82	mpam,
78	83	mte,
79	84	neon,
80		neoverse_e1,
81		neoverse_n1,
82		neoverse_n2,
83		neoverse_v1,
	85	no_bti_at_return_twice,
84	86	no_neg_immediates,
85	87	no_zcz_fp,
86	88	nv,
...	...	@@ -89,7 +91,6 @@ pub const Feature = enum {
89	91	pan_rwv,
90	92	pauth,
91	93	perfmon,
92		pmu,
93	94	predictable_select_expensive,
94	95	predres,
95	96	rand,
...	...	@@ -138,6 +139,7 @@ pub const Feature = enum {
138	139	spe_eef,
139	140	specrestrict,
140	141	ssbs,
	142	streaming_sve,
141	143	strict_align,
142	144	sve,
143	145	sve2,
...	...	@@ -157,6 +159,7 @@ pub const Feature = enum {
157	159	use_experimental_zeroing_pseudos,
158	160	use_postra_scheduler,
159	161	use_reciprocal_square_root,
	162	use_scalar_inc_vl,
160	163	v8_1a,
161	164	v8_2a,
162	165	v8_3a,
...	...	@@ -164,8 +167,13 @@ pub const Feature = enum {
164	167	v8_5a,
165	168	v8_6a,
166	169	v8_7a,
	170	v8_8a,
167	171	v8a,
168	172	v8r,
	173	v9_1a,
	174	v9_2a,
	175	v9_3a,
	176	v9a,
169	177	vh,
170	178	wfxt,
171	179	xs,
...	...	@@ -185,32 +193,55 @@ pub const all_features = blk: {
185	193	const len = @typeInfo(Feature).Enum.fields.len;
186	194	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
187	195	var result: [len]CpuFeature = undefined;
	196	result[@enumToInt(Feature.a510)] = .{
	197	.llvm_name = "a510",
	198	.description = "Cortex-A510 ARM processors",
	199	.dependencies = featureSet(&[_]Feature{
	200	.fuse_aes,
	201	.use_postra_scheduler,
	202	}),
	203	};
188	204	result[@enumToInt(Feature.a65)] = .{
189	205	.llvm_name = "a65",
190	206	.description = "Cortex-A65 ARM processors",
191	207	.dependencies = featureSet(&[_]Feature{
192		.crypto,
193		.dotprod,
194		.fullfp16,
195	208	.fuse_address,
196	209	.fuse_aes,
197	210	.fuse_literals,
198		.rcpc,
199		.ssbs,
200		.v8_2a,
	211	}),
	212	};
	213	result[@enumToInt(Feature.a710)] = .{
	214	.llvm_name = "a710",
	215	.description = "Cortex-A710 ARM processors",
	216	.dependencies = featureSet(&[_]Feature{
	217	.cmp_bcc_fusion,
	218	.fuse_aes,
	219	.use_postra_scheduler,
201	220	}),
202	221	};
203	222	result[@enumToInt(Feature.a76)] = .{
204	223	.llvm_name = "a76",
205	224	.description = "Cortex-A76 ARM processors",
206	225	.dependencies = featureSet(&[_]Feature{
207		.crypto,
208		.dotprod,
209		.fullfp16,
210	226	.fuse_aes,
211		.rcpc,
212		.ssbs,
213		.v8_2a,
	227	}),
	228	};
	229	result[@enumToInt(Feature.a78)] = .{
	230	.llvm_name = "a78",
	231	.description = "Cortex-A78 ARM processors",
	232	.dependencies = featureSet(&[_]Feature{
	233	.cmp_bcc_fusion,
	234	.fuse_aes,
	235	.use_postra_scheduler,
	236	}),
	237	};
	238	result[@enumToInt(Feature.a78c)] = .{
	239	.llvm_name = "a78c",
	240	.description = "Cortex-A78C ARM processors",
	241	.dependencies = featureSet(&[_]Feature{
	242	.cmp_bcc_fusion,
	243	.fuse_aes,
	244	.use_postra_scheduler,
214	245	}),
215	246	};
216	247	result[@enumToInt(Feature.aes)] = .{
...	...	@@ -247,60 +278,6 @@ pub const all_features = blk: {
247	278	.am,
248	279	}),
249	280	};
250		result[@enumToInt(Feature.apple_a12)] = .{
251		.llvm_name = "apple-a12",
252		.description = "Apple A12",
253		.dependencies = featureSet(&[_]Feature{
254		.alternate_sextload_cvt_f32_pattern,
255		.arith_bcc_fusion,
256		.arith_cbz_fusion,
257		.crypto,
258		.disable_latency_sched_heuristic,
259		.fullfp16,
260		.fuse_aes,
261		.fuse_crypto_eor,
262		.perfmon,
263		.v8_3a,
264		.zcm,
265		.zcz,
266		}),
267		};
268		result[@enumToInt(Feature.apple_a13)] = .{
269		.llvm_name = "apple-a13",
270		.description = "Apple A13",
271		.dependencies = featureSet(&[_]Feature{
272		.alternate_sextload_cvt_f32_pattern,
273		.arith_bcc_fusion,
274		.arith_cbz_fusion,
275		.crypto,
276		.disable_latency_sched_heuristic,
277		.fp16fml,
278		.fuse_aes,
279		.fuse_crypto_eor,
280		.perfmon,
281		.sha3,
282		.v8_4a,
283		.zcm,
284		.zcz,
285		}),
286		};
287		result[@enumToInt(Feature.apple_a7)] = .{
288		.llvm_name = "apple-a7",
289		.description = "Apple A7 (the CPU formerly known as Cyclone)",
290		.dependencies = featureSet(&[_]Feature{
291		.alternate_sextload_cvt_f32_pattern,
292		.arith_bcc_fusion,
293		.arith_cbz_fusion,
294		.crypto,
295		.disable_latency_sched_heuristic,
296		.fuse_aes,
297		.fuse_crypto_eor,
298		.perfmon,
299		.zcm,
300		.zcz,
301		.zcz_fp_workaround,
302		}),
303		};
304	281	result[@enumToInt(Feature.arith_bcc_fusion)] = .{
305	282	.llvm_name = "arith-bcc-fusion",
306	283	.description = "CPU fuses arithmetic+bcc operations",
...	...	@@ -408,31 +385,11 @@ pub const all_features = blk: {
408	385	.description = "Enable RW operand Context ID Register (EL2)",
409	386	.dependencies = featureSet(&[_]Feature{}),
410	387	};
411		result[@enumToInt(Feature.cortex_a78c)] = .{
412		.llvm_name = "cortex-a78c",
413		.description = "Cortex-A78C ARM processors",
414		.dependencies = featureSet(&[_]Feature{
415		.cmp_bcc_fusion,
416		.crypto,
417		.dotprod,
418		.flagm,
419		.fp16fml,
420		.fuse_aes,
421		.pauth,
422		.perfmon,
423		.rcpc,
424		.spe,
425		.ssbs,
426		.use_postra_scheduler,
427		.v8_2a,
428		}),
429		};
430	388	result[@enumToInt(Feature.cortex_r82)] = .{
431	389	.llvm_name = "cortex-r82",
432		.description = "Cortex-R82 ARM Processors",
	390	.description = "Cortex-R82 ARM processors",
433	391	.dependencies = featureSet(&[_]Feature{
434	392	.use_postra_scheduler,
435		.v8r,
436	393	}),
437	394	};
438	395	result[@enumToInt(Feature.crc)] = .{
...	...	@@ -473,6 +430,16 @@ pub const all_features = blk: {
473	430	.description = "Enable enhanced counter virtualization extension",
474	431	.dependencies = featureSet(&[_]Feature{}),
475	432	};
	433	result[@enumToInt(Feature.el2vmsa)] = .{
	434	.llvm_name = "el2vmsa",
	435	.description = "Enable Exception Level 2 Virtual Memory System Architecture",
	436	.dependencies = featureSet(&[_]Feature{}),
	437	};
	438	result[@enumToInt(Feature.el3)] = .{
	439	.llvm_name = "el3",
	440	.description = "Enable Exception Level 3",
	441	.dependencies = featureSet(&[_]Feature{}),
	442	};
476	443	result[@enumToInt(Feature.ete)] = .{
477	444	.llvm_name = "ete",
478	445	.description = "Enable Embedded Trace Extension",
...	...	@@ -487,29 +454,6 @@ pub const all_features = blk: {
487	454	.custom_cheap_as_move,
488	455	}),
489	456	};
490		result[@enumToInt(Feature.exynos_m4)] = .{
491		.llvm_name = "exynosm4",
492		.description = "Samsung Exynos-M4 processors",
493		.dependencies = featureSet(&[_]Feature{
494		.arith_bcc_fusion,
495		.arith_cbz_fusion,
496		.crypto,
497		.dotprod,
498		.exynos_cheap_as_move,
499		.force_32bit_jump_tables,
500		.fullfp16,
501		.fuse_address,
502		.fuse_aes,
503		.fuse_arith_logic,
504		.fuse_csel,
505		.fuse_literals,
506		.lsl_fast,
507		.perfmon,
508		.use_postra_scheduler,
509		.v8_2a,
510		.zcz,
511		}),
512		};
513	457	result[@enumToInt(Feature.f32mm)] = .{
514	458	.llvm_name = "f32mm",
515	459	.description = "Enable Matrix Multiply FP32 Extension",
...	...	@@ -529,6 +473,11 @@ pub const all_features = blk: {
529	473	.description = "Enable fine grained virtualization traps extension",
530	474	.dependencies = featureSet(&[_]Feature{}),
531	475	};
	476	result[@enumToInt(Feature.fix_cortex_a53_835769)] = .{
	477	.llvm_name = "fix-cortex-a53-835769",
	478	.description = "Mitigate Cortex-A53 Erratum 835769",
	479	.dependencies = featureSet(&[_]Feature{}),
	480	};
532	481	result[@enumToInt(Feature.flagm)] = .{
533	482	.llvm_name = "flagm",
534	483	.description = "Enable v8.4-A Flag Manipulation Instructions",
...	...	@@ -608,6 +557,11 @@ pub const all_features = blk: {
608	557	.description = "Harden against straight line speculation across RET and BR instructions",
609	558	.dependencies = featureSet(&[_]Feature{}),
610	559	};
	560	result[@enumToInt(Feature.hbc)] = .{
	561	.llvm_name = "hbc",
	562	.description = "Enable Armv8.8-A Hinted Conditional Branches Extension",
	563	.dependencies = featureSet(&[_]Feature{}),
	564	};
611	565	result[@enumToInt(Feature.hcx)] = .{
612	566	.llvm_name = "hcx",
613	567	.description = "Enable Armv8.7-A HCRX_EL2 system register",
...	...	@@ -640,11 +594,21 @@ pub const all_features = blk: {
640	594	.description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
641	595	.dependencies = featureSet(&[_]Feature{}),
642	596	};
	597	result[@enumToInt(Feature.lse2)] = .{
	598	.llvm_name = "lse2",
	599	.description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules",
	600	.dependencies = featureSet(&[_]Feature{}),
	601	};
643	602	result[@enumToInt(Feature.lsl_fast)] = .{
644	603	.llvm_name = "lsl-fast",
645	604	.description = "CPU has a fastpath logical shift of up to 3 places",
646	605	.dependencies = featureSet(&[_]Feature{}),
647	606	};
	607	result[@enumToInt(Feature.mops)] = .{
	608	.llvm_name = "mops",
	609	.description = "Enable Armv8.8-A memcpy and memset acceleration instructions",
	610	.dependencies = featureSet(&[_]Feature{}),
	611	};
648	612	result[@enumToInt(Feature.mpam)] = .{
649	613	.llvm_name = "mpam",
650	614	.description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
...	...	@@ -662,68 +626,10 @@ pub const all_features = blk: {
662	626	.fp_armv8,
663	627	}),
664	628	};
665		result[@enumToInt(Feature.neoverse_e1)] = .{
666		.llvm_name = "neoversee1",
667		.description = "Neoverse E1 ARM processors",
668		.dependencies = featureSet(&[_]Feature{
669		.crypto,
670		.dotprod,
671		.fullfp16,
672		.fuse_aes,
673		.rcpc,
674		.ssbs,
675		.use_postra_scheduler,
676		.v8_2a,
677		}),
678		};
679		result[@enumToInt(Feature.neoverse_n1)] = .{
680		.llvm_name = "neoversen1",
681		.description = "Neoverse N1 ARM processors",
682		.dependencies = featureSet(&[_]Feature{
683		.crypto,
684		.dotprod,
685		.fullfp16,
686		.fuse_aes,
687		.rcpc,
688		.spe,
689		.ssbs,
690		.use_postra_scheduler,
691		.v8_2a,
692		}),
693		};
694		result[@enumToInt(Feature.neoverse_n2)] = .{
695		.llvm_name = "neoversen2",
696		.description = "Neoverse N2 ARM processors",
697		.dependencies = featureSet(&[_]Feature{
698		.bf16,
699		.crypto,
700		.ete,
701		.fuse_aes,
702		.i8mm,
703		.mte,
704		.sve2_bitperm,
705		.use_postra_scheduler,
706		.v8_5a,
707		}),
708		};
709		result[@enumToInt(Feature.neoverse_v1)] = .{
710		.llvm_name = "neoversev1",
711		.description = "Neoverse V1 ARM processors",
712		.dependencies = featureSet(&[_]Feature{
713		.bf16,
714		.ccdp,
715		.crypto,
716		.fp16fml,
717		.fuse_aes,
718		.i8mm,
719		.perfmon,
720		.rand,
721		.spe,
722		.ssbs,
723		.sve,
724		.use_postra_scheduler,
725		.v8_4a,
726		}),
	629	result[@enumToInt(Feature.no_bti_at_return_twice)] = .{
	630	.llvm_name = "no-bti-at-return-twice",
	631	.description = "Don't place a BTI instruction after a return-twice",
	632	.dependencies = featureSet(&[_]Feature{}),
727	633	};
728	634	result[@enumToInt(Feature.no_neg_immediates)] = .{
729	635	.llvm_name = "no-neg-immediates",
...	...	@@ -767,11 +673,6 @@ pub const all_features = blk: {
767	673	.description = "Enable ARMv8 PMUv3 Performance Monitors extension",
768	674	.dependencies = featureSet(&[_]Feature{}),
769	675	};
770		result[@enumToInt(Feature.pmu)] = .{
771		.llvm_name = "pmu",
772		.description = "Enable v8.4-A PMU extension",
773		.dependencies = featureSet(&[_]Feature{}),
774		};
775	676	result[@enumToInt(Feature.predictable_select_expensive)] = .{
776	677	.llvm_name = "predictable-select-expensive",
777	678	.description = "Prefer likely predicted branches over selects",
...	...	@@ -990,7 +891,7 @@ pub const all_features = blk: {
990	891	.description = "Enable Scalable Matrix Extension (SME)",
991	892	.dependencies = featureSet(&[_]Feature{
992	893	.bf16,
993		.sve2,
	894	.streaming_sve,
994	895	}),
995	896	};
996	897	result[@enumToInt(Feature.sme_f64)] = .{
...	...	@@ -1027,6 +928,11 @@ pub const all_features = blk: {
1027	928	.description = "Enable Speculative Store Bypass Safe bit",
1028	929	.dependencies = featureSet(&[_]Feature{}),
1029	930	};
	931	result[@enumToInt(Feature.streaming_sve)] = .{
	932	.llvm_name = "streaming-sve",
	933	.description = "Enable subset of SVE(2) instructions for Streaming SVE execution mode",
	934	.dependencies = featureSet(&[_]Feature{}),
	935	};
1030	936	result[@enumToInt(Feature.strict_align)] = .{
1031	937	.llvm_name = "strict-align",
1032	938	.description = "Disallow all unaligned memory access",
...	...	@@ -1044,6 +950,7 @@ pub const all_features = blk: {
1044	950	.description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
1045	951	.dependencies = featureSet(&[_]Feature{
1046	952	.sve,
	953	.use_scalar_inc_vl,
1047	954	}),
1048	955	};
1049	956	result[@enumToInt(Feature.sve2_aes)] = .{
...	...	@@ -1137,6 +1044,11 @@ pub const all_features = blk: {
1137	1044	.description = "Use the reciprocal square root approximation",
1138	1045	.dependencies = featureSet(&[_]Feature{}),
1139	1046	};
	1047	result[@enumToInt(Feature.use_scalar_inc_vl)] = .{
	1048	.llvm_name = "use-scalar-inc-vl",
	1049	.description = "Prefer inc/dec over add+cnt",
	1050	.dependencies = featureSet(&[_]Feature{}),
	1051	};
1140	1052	result[@enumToInt(Feature.v8_1a)] = .{
1141	1053	.llvm_name = "v8.1a",
1142	1054	.description = "Support ARM v8.1a instructions",
...	...	@@ -1181,9 +1093,9 @@ pub const all_features = blk: {
1181	1093	.dit,
1182	1094	.dotprod,
1183	1095	.flagm,
	1096	.lse2,
1184	1097	.mpam,
1185	1098	.nv,
1186		.pmu,
1187	1099	.rcpc_immo,
1188	1100	.sel2,
1189	1101	.tlb_rmi,
...	...	@@ -1228,10 +1140,21 @@ pub const all_features = blk: {
1228	1140	.xs,
1229	1141	}),
1230	1142	};
	1143	result[@enumToInt(Feature.v8_8a)] = .{
	1144	.llvm_name = "v8.8a",
	1145	.description = "Support ARM v8.8a instructions",
	1146	.dependencies = featureSet(&[_]Feature{
	1147	.hbc,
	1148	.mops,
	1149	.v8_7a,
	1150	}),
	1151	};
1231	1152	result[@enumToInt(Feature.v8a)] = .{
1232		.llvm_name = null,
1233		.description = "Support ARM v8a instructions",
	1153	.llvm_name = "v8a",
	1154	.description = "Support ARM v8.0a instructions",
1234	1155	.dependencies = featureSet(&[_]Feature{
	1156	.el2vmsa,
	1157	.el3,
1235	1158	.neon,
1236	1159	}),
1237	1160	};
...	...	@@ -1247,27 +1170,51 @@ pub const all_features = blk: {
1247	1170	.dit,
1248	1171	.dotprod,
1249	1172	.flagm,
1250		.fp16fml,
1251	1173	.jsconv,
1252	1174	.lse,
1253	1175	.pan_rwv,
1254	1176	.pauth,
1255		.perfmon,
1256		.predres,
1257	1177	.ras,
1258	1178	.rcpc_immo,
1259	1179	.rdm,
1260		.sb,
1261	1180	.sel2,
1262		.sha3,
1263		.sm4,
1264		.specrestrict,
1265		.ssbs,
1266	1181	.tlb_rmi,
1267	1182	.tracev8_4,
1268	1183	.uaops,
1269	1184	}),
1270	1185	};
	1186	result[@enumToInt(Feature.v9_1a)] = .{
	1187	.llvm_name = "v9.1a",
	1188	.description = "Support ARM v9.1a instructions",
	1189	.dependencies = featureSet(&[_]Feature{
	1190	.v8_6a,
	1191	.v9a,
	1192	}),
	1193	};
	1194	result[@enumToInt(Feature.v9_2a)] = .{
	1195	.llvm_name = "v9.2a",
	1196	.description = "Support ARM v9.2a instructions",
	1197	.dependencies = featureSet(&[_]Feature{
	1198	.v8_7a,
	1199	.v9_1a,
	1200	}),
	1201	};
	1202	result[@enumToInt(Feature.v9_3a)] = .{
	1203	.llvm_name = "v9.3a",
	1204	.description = "Support ARM v9.3a instructions",
	1205	.dependencies = featureSet(&[_]Feature{
	1206	.v8_8a,
	1207	.v9_2a,
	1208	}),
	1209	};
	1210	result[@enumToInt(Feature.v9a)] = .{
	1211	.llvm_name = "v9a",
	1212	.description = "Support ARM v9a instructions",
	1213	.dependencies = featureSet(&[_]Feature{
	1214	.sve2,
	1215	.v8_5a,
	1216	}),
	1217	};
1271	1218	result[@enumToInt(Feature.vh)] = .{
1272	1219	.llvm_name = "vh",
1273	1220	.description = "Enables ARM v8.1 Virtual Host extension",
...	...	@@ -1331,6 +1278,23 @@ pub const cpu = struct {
1331	1278	.v8_2a,
1332	1279	}),
1333	1280	};
	1281	pub const ampere1 = CpuModel{
	1282	.name = "ampere1",
	1283	.llvm_name = "ampere1",
	1284	.features = featureSet(&[_]Feature{
	1285	.aggressive_fma,
	1286	.arith_bcc_fusion,
	1287	.cmp_bcc_fusion,
	1288	.fuse_address,
	1289	.fuse_aes,
	1290	.fuse_literals,
	1291	.lsl_fast,
	1292	.mte,
	1293	.perfmon,
	1294	.use_postra_scheduler,
	1295	.v8_6a,
	1296	}),
	1297	};
1334	1298	pub const apple_a10 = CpuModel{
1335	1299	.name = "apple_a10",
1336	1300	.llvm_name = "apple-a10",
...	...	@@ -1347,6 +1311,7 @@ pub const cpu = struct {
1347	1311	.pan,
1348	1312	.perfmon,
1349	1313	.rdm,
	1314	.v8a,
1350	1315	.vh,
1351	1316	.zcm,
1352	1317	.zcz,
...	...	@@ -1374,26 +1339,49 @@ pub const cpu = struct {
1374	1339	.name = "apple_a12",
1375	1340	.llvm_name = "apple-a12",
1376	1341	.features = featureSet(&[_]Feature{
1377		.apple_a12,
	1342	.alternate_sextload_cvt_f32_pattern,
	1343	.arith_bcc_fusion,
	1344	.arith_cbz_fusion,
	1345	.crypto,
	1346	.disable_latency_sched_heuristic,
	1347	.fullfp16,
	1348	.fuse_aes,
	1349	.fuse_crypto_eor,
	1350	.perfmon,
	1351	.v8_3a,
	1352	.zcm,
	1353	.zcz,
1378	1354	}),
1379	1355	};
1380	1356	pub const apple_a13 = CpuModel{
1381	1357	.name = "apple_a13",
1382	1358	.llvm_name = "apple-a13",
1383	1359	.features = featureSet(&[_]Feature{
1384		.apple_a13,
1385		}),
1386		};
1387		pub const apple_a14 = CpuModel{
1388		.name = "apple_a14",
1389		.llvm_name = "apple-a14",
1390		.features = featureSet(&[_]Feature{
1391		.aggressive_fma,
1392	1360	.alternate_sextload_cvt_f32_pattern,
1393		.altnzcv,
1394	1361	.arith_bcc_fusion,
1395	1362	.arith_cbz_fusion,
1396		.ccdp,
	1363	.crypto,
	1364	.disable_latency_sched_heuristic,
	1365	.fp16fml,
	1366	.fuse_aes,
	1367	.fuse_crypto_eor,
	1368	.perfmon,
	1369	.sha3,
	1370	.v8_4a,
	1371	.zcm,
	1372	.zcz,
	1373	}),
	1374	};
	1375	pub const apple_a14 = CpuModel{
	1376	.name = "apple_a14",
	1377	.llvm_name = "apple-a14",
	1378	.features = featureSet(&[_]Feature{
	1379	.aggressive_fma,
	1380	.alternate_sextload_cvt_f32_pattern,
	1381	.altnzcv,
	1382	.arith_bcc_fusion,
	1383	.arith_cbz_fusion,
	1384	.ccdp,
1397	1385	.crypto,
1398	1386	.disable_latency_sched_heuristic,
1399	1387	.fp16fml,
...	...	@@ -1419,21 +1407,54 @@ pub const cpu = struct {
1419	1407	.name = "apple_a7",
1420	1408	.llvm_name = "apple-a7",
1421	1409	.features = featureSet(&[_]Feature{
1422		.apple_a7,
	1410	.alternate_sextload_cvt_f32_pattern,
	1411	.arith_bcc_fusion,
	1412	.arith_cbz_fusion,
	1413	.crypto,
	1414	.disable_latency_sched_heuristic,
	1415	.fuse_aes,
	1416	.fuse_crypto_eor,
	1417	.perfmon,
	1418	.v8a,
	1419	.zcm,
	1420	.zcz,
	1421	.zcz_fp_workaround,
1423	1422	}),
1424	1423	};
1425	1424	pub const apple_a8 = CpuModel{
1426	1425	.name = "apple_a8",
1427	1426	.llvm_name = "apple-a8",
1428	1427	.features = featureSet(&[_]Feature{
1429		.apple_a7,
	1428	.alternate_sextload_cvt_f32_pattern,
	1429	.arith_bcc_fusion,
	1430	.arith_cbz_fusion,
	1431	.crypto,
	1432	.disable_latency_sched_heuristic,
	1433	.fuse_aes,
	1434	.fuse_crypto_eor,
	1435	.perfmon,
	1436	.v8a,
	1437	.zcm,
	1438	.zcz,
	1439	.zcz_fp_workaround,
1430	1440	}),
1431	1441	};
1432	1442	pub const apple_a9 = CpuModel{
1433	1443	.name = "apple_a9",
1434	1444	.llvm_name = "apple-a9",
1435	1445	.features = featureSet(&[_]Feature{
1436		.apple_a7,
	1446	.alternate_sextload_cvt_f32_pattern,
	1447	.arith_bcc_fusion,
	1448	.arith_cbz_fusion,
	1449	.crypto,
	1450	.disable_latency_sched_heuristic,
	1451	.fuse_aes,
	1452	.fuse_crypto_eor,
	1453	.perfmon,
	1454	.v8a,
	1455	.zcm,
	1456	.zcz,
	1457	.zcz_fp_workaround,
1437	1458	}),
1438	1459	};
1439	1460	pub const apple_latest = CpuModel{
...	...	@@ -1502,14 +1523,36 @@ pub const cpu = struct {
1502	1523	.name = "apple_s4",
1503	1524	.llvm_name = "apple-s4",
1504	1525	.features = featureSet(&[_]Feature{
1505		.apple_a12,
	1526	.alternate_sextload_cvt_f32_pattern,
	1527	.arith_bcc_fusion,
	1528	.arith_cbz_fusion,
	1529	.crypto,
	1530	.disable_latency_sched_heuristic,
	1531	.fullfp16,
	1532	.fuse_aes,
	1533	.fuse_crypto_eor,
	1534	.perfmon,
	1535	.v8_3a,
	1536	.zcm,
	1537	.zcz,
1506	1538	}),
1507	1539	};
1508	1540	pub const apple_s5 = CpuModel{
1509	1541	.name = "apple_s5",
1510	1542	.llvm_name = "apple-s5",
1511	1543	.features = featureSet(&[_]Feature{
1512		.apple_a12,
	1544	.alternate_sextload_cvt_f32_pattern,
	1545	.arith_bcc_fusion,
	1546	.arith_cbz_fusion,
	1547	.crypto,
	1548	.disable_latency_sched_heuristic,
	1549	.fullfp16,
	1550	.fuse_aes,
	1551	.fuse_crypto_eor,
	1552	.perfmon,
	1553	.v8_3a,
	1554	.zcm,
	1555	.zcz,
1513	1556	}),
1514	1557	};
1515	1558	pub const carmel = CpuModel{
...	...	@@ -1541,6 +1584,21 @@ pub const cpu = struct {
1541	1584	.v8a,
1542	1585	}),
1543	1586	};
	1587	pub const cortex_a510 = CpuModel{
	1588	.name = "cortex_a510",
	1589	.llvm_name = "cortex-a510",
	1590	.features = featureSet(&[_]Feature{
	1591	.a510,
	1592	.bf16,
	1593	.ete,
	1594	.fp16fml,
	1595	.i8mm,
	1596	.mte,
	1597	.perfmon,
	1598	.sve2_bitperm,
	1599	.v9a,
	1600	}),
	1601	};
1544	1602	pub const cortex_a53 = CpuModel{
1545	1603	.name = "cortex_a53",
1546	1604	.llvm_name = "cortex-a53",
...	...	@@ -1562,6 +1620,7 @@ pub const cpu = struct {
1562	1620	.crypto,
1563	1621	.dotprod,
1564	1622	.fullfp16,
	1623	.fuse_address,
1565	1624	.fuse_aes,
1566	1625	.perfmon,
1567	1626	.rcpc,
...	...	@@ -1590,6 +1649,12 @@ pub const cpu = struct {
1590	1649	.llvm_name = "cortex-a65",
1591	1650	.features = featureSet(&[_]Feature{
1592	1651	.a65,
	1652	.crypto,
	1653	.dotprod,
	1654	.fullfp16,
	1655	.rcpc,
	1656	.ssbs,
	1657	.v8_2a,
1593	1658	}),
1594	1659	};
1595	1660	pub const cortex_a65ae = CpuModel{
...	...	@@ -1597,6 +1662,27 @@ pub const cpu = struct {
1597	1662	.llvm_name = "cortex-a65ae",
1598	1663	.features = featureSet(&[_]Feature{
1599	1664	.a65,
	1665	.crypto,
	1666	.dotprod,
	1667	.fullfp16,
	1668	.rcpc,
	1669	.ssbs,
	1670	.v8_2a,
	1671	}),
	1672	};
	1673	pub const cortex_a710 = CpuModel{
	1674	.name = "cortex_a710",
	1675	.llvm_name = "cortex-a710",
	1676	.features = featureSet(&[_]Feature{
	1677	.a710,
	1678	.bf16,
	1679	.ete,
	1680	.fp16fml,
	1681	.i8mm,
	1682	.mte,
	1683	.perfmon,
	1684	.sve2_bitperm,
	1685	.v9a,
1600	1686	}),
1601	1687	};
1602	1688	pub const cortex_a72 = CpuModel{
...	...	@@ -1640,6 +1726,12 @@ pub const cpu = struct {
1640	1726	.llvm_name = "cortex-a76",
1641	1727	.features = featureSet(&[_]Feature{
1642	1728	.a76,
	1729	.crypto,
	1730	.dotprod,
	1731	.fullfp16,
	1732	.rcpc,
	1733	.ssbs,
	1734	.v8_2a,
1643	1735	}),
1644	1736	};
1645	1737	pub const cortex_a76ae = CpuModel{
...	...	@@ -1647,6 +1739,12 @@ pub const cpu = struct {
1647	1739	.llvm_name = "cortex-a76ae",
1648	1740	.features = featureSet(&[_]Feature{
1649	1741	.a76,
	1742	.crypto,
	1743	.dotprod,
	1744	.fullfp16,
	1745	.rcpc,
	1746	.ssbs,
	1747	.v8_2a,
1650	1748	}),
1651	1749	};
1652	1750	pub const cortex_a77 = CpuModel{
...	...	@@ -1659,6 +1757,7 @@ pub const cpu = struct {
1659	1757	.fullfp16,
1660	1758	.fuse_aes,
1661	1759	.rcpc,
	1760	.ssbs,
1662	1761	.v8_2a,
1663	1762	}),
1664	1763	};
...	...	@@ -1666,16 +1765,14 @@ pub const cpu = struct {
1666	1765	.name = "cortex_a78",
1667	1766	.llvm_name = "cortex-a78",
1668	1767	.features = featureSet(&[_]Feature{
1669		.cmp_bcc_fusion,
	1768	.a78,
1670	1769	.crypto,
1671	1770	.dotprod,
1672	1771	.fullfp16,
1673		.fuse_aes,
1674	1772	.perfmon,
1675	1773	.rcpc,
1676	1774	.spe,
1677	1775	.ssbs,
1678		.use_postra_scheduler,
1679	1776	.v8_2a,
1680	1777	}),
1681	1778	};
...	...	@@ -1683,7 +1780,17 @@ pub const cpu = struct {
1683	1780	.name = "cortex_a78c",
1684	1781	.llvm_name = "cortex-a78c",
1685	1782	.features = featureSet(&[_]Feature{
1686		.cortex_a78c,
	1783	.a78c,
	1784	.crypto,
	1785	.dotprod,
	1786	.flagm,
	1787	.fp16fml,
	1788	.pauth,
	1789	.perfmon,
	1790	.rcpc,
	1791	.spe,
	1792	.ssbs,
	1793	.v8_2a,
1687	1794	}),
1688	1795	};
1689	1796	pub const cortex_r82 = CpuModel{
...	...	@@ -1691,6 +1798,13 @@ pub const cpu = struct {
1691	1798	.llvm_name = "cortex-r82",
1692	1799	.features = featureSet(&[_]Feature{
1693	1800	.cortex_r82,
	1801	.fp16fml,
	1802	.perfmon,
	1803	.predres,
	1804	.sb,
	1805	.specrestrict,
	1806	.ssbs,
	1807	.v8r,
1694	1808	}),
1695	1809	};
1696	1810	pub const cortex_x1 = CpuModel{
...	...	@@ -1705,15 +1819,62 @@ pub const cpu = struct {
1705	1819	.perfmon,
1706	1820	.rcpc,
1707	1821	.spe,
	1822	.ssbs,
	1823	.use_postra_scheduler,
	1824	.v8_2a,
	1825	}),
	1826	};
	1827	pub const cortex_x1c = CpuModel{
	1828	.name = "cortex_x1c",
	1829	.llvm_name = "cortex-x1c",
	1830	.features = featureSet(&[_]Feature{
	1831	.cmp_bcc_fusion,
	1832	.crypto,
	1833	.dotprod,
	1834	.fullfp16,
	1835	.fuse_aes,
	1836	.pauth,
	1837	.perfmon,
	1838	.rcpc,
	1839	.spe,
	1840	.ssbs,
1708	1841	.use_postra_scheduler,
1709	1842	.v8_2a,
1710	1843	}),
1711	1844	};
	1845	pub const cortex_x2 = CpuModel{
	1846	.name = "cortex_x2",
	1847	.llvm_name = "cortex-x2",
	1848	.features = featureSet(&[_]Feature{
	1849	.bf16,
	1850	.cmp_bcc_fusion,
	1851	.ete,
	1852	.fp16fml,
	1853	.fuse_aes,
	1854	.i8mm,
	1855	.mte,
	1856	.perfmon,
	1857	.sve2_bitperm,
	1858	.use_postra_scheduler,
	1859	.v9a,
	1860	}),
	1861	};
1712	1862	pub const cyclone = CpuModel{
1713	1863	.name = "cyclone",
1714	1864	.llvm_name = "cyclone",
1715	1865	.features = featureSet(&[_]Feature{
1716		.apple_a7,
	1866	.alternate_sextload_cvt_f32_pattern,
	1867	.arith_bcc_fusion,
	1868	.arith_cbz_fusion,
	1869	.crypto,
	1870	.disable_latency_sched_heuristic,
	1871	.fuse_aes,
	1872	.fuse_crypto_eor,
	1873	.perfmon,
	1874	.v8a,
	1875	.zcm,
	1876	.zcz,
	1877	.zcz_fp_workaround,
1717	1878	}),
1718	1879	};
1719	1880	pub const emag = CpuModel{
...	...	@@ -1763,33 +1924,68 @@ pub const cpu = struct {
1763	1924	.name = "exynos_m3",
1764	1925	.llvm_name = "exynos-m3",
1765	1926	.features = featureSet(&[_]Feature{
	1927	.arith_bcc_fusion,
	1928	.arith_cbz_fusion,
1766	1929	.crc,
1767	1930	.crypto,
1768	1931	.exynos_cheap_as_move,
1769	1932	.force_32bit_jump_tables,
1770	1933	.fuse_address,
1771	1934	.fuse_aes,
	1935	.fuse_arith_logic,
1772	1936	.fuse_csel,
1773	1937	.fuse_literals,
1774	1938	.lsl_fast,
1775	1939	.perfmon,
1776		.predictable_select_expensive,
1777	1940	.use_postra_scheduler,
1778	1941	.v8a,
	1942	.zcz,
1779	1943	}),
1780	1944	};
1781	1945	pub const exynos_m4 = CpuModel{
1782	1946	.name = "exynos_m4",
1783	1947	.llvm_name = "exynos-m4",
1784	1948	.features = featureSet(&[_]Feature{
1785		.exynos_m4,
	1949	.arith_bcc_fusion,
	1950	.arith_cbz_fusion,
	1951	.crypto,
	1952	.dotprod,
	1953	.exynos_cheap_as_move,
	1954	.force_32bit_jump_tables,
	1955	.fullfp16,
	1956	.fuse_address,
	1957	.fuse_aes,
	1958	.fuse_arith_logic,
	1959	.fuse_csel,
	1960	.fuse_literals,
	1961	.lsl_fast,
	1962	.perfmon,
	1963	.use_postra_scheduler,
	1964	.v8_2a,
	1965	.zcz,
1786	1966	}),
1787	1967	};
1788	1968	pub const exynos_m5 = CpuModel{
1789	1969	.name = "exynos_m5",
1790	1970	.llvm_name = "exynos-m5",
1791	1971	.features = featureSet(&[_]Feature{
1792		.exynos_m4,
	1972	.arith_bcc_fusion,
	1973	.arith_cbz_fusion,
	1974	.crypto,
	1975	.dotprod,
	1976	.exynos_cheap_as_move,
	1977	.force_32bit_jump_tables,
	1978	.fullfp16,
	1979	.fuse_address,
	1980	.fuse_aes,
	1981	.fuse_arith_logic,
	1982	.fuse_csel,
	1983	.fuse_literals,
	1984	.lsl_fast,
	1985	.perfmon,
	1986	.use_postra_scheduler,
	1987	.v8_2a,
	1988	.zcz,
1793	1989	}),
1794	1990	};
1795	1991	pub const falkor = CpuModel{
...	...	@@ -1835,32 +2031,86 @@ pub const cpu = struct {
1835	2031	.zcz,
1836	2032	}),
1837	2033	};
	2034	pub const neoverse_512tvb = CpuModel{
	2035	.name = "neoverse_512tvb",
	2036	.llvm_name = "neoverse-512tvb",
	2037	.features = featureSet(&[_]Feature{
	2038	.bf16,
	2039	.ccdp,
	2040	.crypto,
	2041	.fp16fml,
	2042	.fuse_aes,
	2043	.i8mm,
	2044	.perfmon,
	2045	.rand,
	2046	.spe,
	2047	.ssbs,
	2048	.sve,
	2049	.use_postra_scheduler,
	2050	.v8_4a,
	2051	}),
	2052	};
1838	2053	pub const neoverse_e1 = CpuModel{
1839	2054	.name = "neoverse_e1",
1840	2055	.llvm_name = "neoverse-e1",
1841	2056	.features = featureSet(&[_]Feature{
1842		.neoverse_e1,
	2057	.crypto,
	2058	.dotprod,
	2059	.fullfp16,
	2060	.fuse_aes,
	2061	.rcpc,
	2062	.ssbs,
	2063	.use_postra_scheduler,
	2064	.v8_2a,
1843	2065	}),
1844	2066	};
1845	2067	pub const neoverse_n1 = CpuModel{
1846	2068	.name = "neoverse_n1",
1847	2069	.llvm_name = "neoverse-n1",
1848	2070	.features = featureSet(&[_]Feature{
1849		.neoverse_n1,
	2071	.crypto,
	2072	.dotprod,
	2073	.fullfp16,
	2074	.fuse_aes,
	2075	.rcpc,
	2076	.spe,
	2077	.ssbs,
	2078	.use_postra_scheduler,
	2079	.v8_2a,
1850	2080	}),
1851	2081	};
1852	2082	pub const neoverse_n2 = CpuModel{
1853	2083	.name = "neoverse_n2",
1854	2084	.llvm_name = "neoverse-n2",
1855	2085	.features = featureSet(&[_]Feature{
1856		.neoverse_n2,
	2086	.bf16,
	2087	.crypto,
	2088	.ete,
	2089	.fuse_aes,
	2090	.i8mm,
	2091	.mte,
	2092	.sve2_bitperm,
	2093	.use_postra_scheduler,
	2094	.v8_5a,
1857	2095	}),
1858	2096	};
1859	2097	pub const neoverse_v1 = CpuModel{
1860	2098	.name = "neoverse_v1",
1861	2099	.llvm_name = "neoverse-v1",
1862	2100	.features = featureSet(&[_]Feature{
1863		.neoverse_v1,
	2101	.bf16,
	2102	.ccdp,
	2103	.crypto,
	2104	.fp16fml,
	2105	.fuse_aes,
	2106	.i8mm,
	2107	.perfmon,
	2108	.rand,
	2109	.spe,
	2110	.ssbs,
	2111	.sve,
	2112	.use_postra_scheduler,
	2113	.v8_4a,
1864	2114	}),
1865	2115	};
1866	2116	pub const saphira = CpuModel{

lib/std/target/amdgpu.zig-13

...	...	@@ -65,7 +65,6 @@ pub const Feature = enum {
65	65	ldsbankcount16,
66	66	ldsbankcount32,
67	67	load_store_opt,
68		localmemorysize0,
69	68	localmemorysize32768,
70	69	localmemorysize65536,
71	70	mad_mac_f32_insts,
...	...	@@ -92,7 +91,6 @@ pub const Feature = enum {
92	91	pk_fmac_f16_inst,
93	92	promote_alloca,
94	93	r128_a16,
95		register_banking,
96	94	s_memrealtime,
97	95	s_memtime_inst,
98	96	scalar_atomics,
...	...	@@ -374,7 +372,6 @@ pub const all_features = blk: {
374	372	.no_data_dep_hazard,
375	373	.no_sdst_cmpx,
376	374	.pk_fmac_f16_inst,
377		.register_banking,
378	375	.s_memrealtime,
379	376	.s_memtime_inst,
380	377	.sdwa,
...	...	@@ -525,11 +522,6 @@ pub const all_features = blk: {
525	522	.description = "Enable SI load/store optimizer pass",
526	523	.dependencies = featureSet(&[_]Feature{}),
527	524	};
528		result[@enumToInt(Feature.localmemorysize0)] = .{
529		.llvm_name = "localmemorysize0",
530		.description = "The size of local memory in bytes",
531		.dependencies = featureSet(&[_]Feature{}),
532		};
533	525	result[@enumToInt(Feature.localmemorysize32768)] = .{
534	526	.llvm_name = "localmemorysize32768",
535	527	.description = "The size of local memory in bytes",
...	...	@@ -660,11 +652,6 @@ pub const all_features = blk: {
660	652	.description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128",
661	653	.dependencies = featureSet(&[_]Feature{}),
662	654	};
663		result[@enumToInt(Feature.register_banking)] = .{
664		.llvm_name = "register-banking",
665		.description = "Has register banking",
666		.dependencies = featureSet(&[_]Feature{}),
667		};
668	655	result[@enumToInt(Feature.s_memrealtime)] = .{
669	656	.llvm_name = "s-memrealtime",
670	657	.description = "Has s_memrealtime instruction",

lib/std/target/arm.zig+174-1

...	...	@@ -36,6 +36,7 @@ pub const Feature = enum {
36	36	execute_only,
37	37	expand_fp_mlx,
38	38	exynos,
	39	fix_cmse_cve_2021_35465,
39	40	fp16,
40	41	fp16fml,
41	42	fp64,
...	...	@@ -71,8 +72,13 @@ pub const Feature = enum {
71	72	has_v8_5a,
72	73	has_v8_6a,
73	74	has_v8_7a,
	75	has_v8_8a,
74	76	has_v8m,
75	77	has_v8m_main,
	78	has_v9_1a,
	79	has_v9_2a,
	80	has_v9_3a,
	81	has_v9a,
76	82	hwdiv,
77	83	hwdiv_arm,
78	84	i8mm,
...	...	@@ -95,10 +101,12 @@ pub const Feature = enum {
95	101	neon_fpmovs,
96	102	neonfp,
97	103	no_branch_predictor,
	104	no_bti_at_return_twice,
98	105	no_movt,
99	106	no_neg_immediates,
100	107	noarm,
101	108	nonpipelined_vfp,
	109	pacbti,
102	110	perfmon,
103	111	prefer_ishst,
104	112	prefer_vmovsr,
...	...	@@ -157,10 +165,15 @@ pub const Feature = enum {
157	165	v8_5a,
158	166	v8_6a,
159	167	v8_7a,
	168	v8_8a,
160	169	v8a,
161	170	v8m,
162	171	v8m_main,
163	172	v8r,
	173	v9_1a,
	174	v9_2a,
	175	v9_3a,
	176	v9a,
164	177	vfp2,
165	178	vfp2sp,
166	179	vfp3,
...	...	@@ -390,6 +403,11 @@ pub const all_features = blk: {
390	403	.zcz,
391	404	}),
392	405	};
	406	result[@enumToInt(Feature.fix_cmse_cve_2021_35465)] = .{
	407	.llvm_name = "fix-cmse-cve-2021-35465",
	408	.description = "Mitigate against the cve-2021-35465 security vulnurability",
	409	.dependencies = featureSet(&[_]Feature{}),
	410	};
393	411	result[@enumToInt(Feature.fp16)] = .{
394	412	.llvm_name = "fp16",
395	413	.description = "Enable half-precision floating point",
...	...	@@ -553,7 +571,6 @@ pub const all_features = blk: {
553	571	.dependencies = featureSet(&[_]Feature{
554	572	.has_v6t2,
555	573	.has_v7clrex,
556		.perfmon,
557	574	}),
558	575	};
559	576	result[@enumToInt(Feature.has_v7clrex)] = .{
...	...	@@ -567,6 +584,7 @@ pub const all_features = blk: {
567	584	.dependencies = featureSet(&[_]Feature{
568	585	.acquire_release,
569	586	.has_v7,
	587	.perfmon,
570	588	}),
571	589	};
572	590	result[@enumToInt(Feature.has_v8_1a)] = .{
...	...	@@ -629,6 +647,13 @@ pub const all_features = blk: {
629	647	.has_v8_6a,
630	648	}),
631	649	};
	650	result[@enumToInt(Feature.has_v8_8a)] = .{
	651	.llvm_name = "v8.8a",
	652	.description = "Support ARM v8.8a instructions",
	653	.dependencies = featureSet(&[_]Feature{
	654	.has_v8_7a,
	655	}),
	656	};
632	657	result[@enumToInt(Feature.has_v8m)] = .{
633	658	.llvm_name = "v8m",
634	659	.description = "Support ARM v8M Baseline instructions",
...	...	@@ -643,6 +668,37 @@ pub const all_features = blk: {
643	668	.has_v7,
644	669	}),
645	670	};
	671	result[@enumToInt(Feature.has_v9_1a)] = .{
	672	.llvm_name = "v9.1a",
	673	.description = "Support ARM v9.1a instructions",
	674	.dependencies = featureSet(&[_]Feature{
	675	.has_v8_6a,
	676	.has_v9a,
	677	}),
	678	};
	679	result[@enumToInt(Feature.has_v9_2a)] = .{
	680	.llvm_name = "v9.2a",
	681	.description = "Support ARM v9.2a instructions",
	682	.dependencies = featureSet(&[_]Feature{
	683	.has_v8_7a,
	684	.has_v9_1a,
	685	}),
	686	};
	687	result[@enumToInt(Feature.has_v9_3a)] = .{
	688	.llvm_name = "v9.3a",
	689	.description = "Support ARM v9.3a instructions",
	690	.dependencies = featureSet(&[_]Feature{
	691	.has_v8_8a,
	692	.has_v9_2a,
	693	}),
	694	};
	695	result[@enumToInt(Feature.has_v9a)] = .{
	696	.llvm_name = "v9a",
	697	.description = "Support ARM v9a instructions",
	698	.dependencies = featureSet(&[_]Feature{
	699	.has_v8_5a,
	700	}),
	701	};
646	702	result[@enumToInt(Feature.hwdiv)] = .{
647	703	.llvm_name = "hwdiv",
648	704	.description = "Enable divide instructions in Thumb",
...	...	@@ -769,6 +825,11 @@ pub const all_features = blk: {
769	825	.description = "Has no branch predictor",
770	826	.dependencies = featureSet(&[_]Feature{}),
771	827	};
	828	result[@enumToInt(Feature.no_bti_at_return_twice)] = .{
	829	.llvm_name = "no-bti-at-return-twice",
	830	.description = "Don't place a BTI instruction after a return-twice",
	831	.dependencies = featureSet(&[_]Feature{}),
	832	};
772	833	result[@enumToInt(Feature.no_movt)] = .{
773	834	.llvm_name = "no-movt",
774	835	.description = "Don't use movt/movw pairs for 32-bit imms",
...	...	@@ -789,6 +850,11 @@ pub const all_features = blk: {
789	850	.description = "VFP instructions are not pipelined",
790	851	.dependencies = featureSet(&[_]Feature{}),
791	852	};
	853	result[@enumToInt(Feature.pacbti)] = .{
	854	.llvm_name = "pacbti",
	855	.description = "Enable Pointer Authentication and Branch Target Identification",
	856	.dependencies = featureSet(&[_]Feature{}),
	857	};
792	858	result[@enumToInt(Feature.perfmon)] = .{
793	859	.llvm_name = "perfmon",
794	860	.description = "Enable support for Performance Monitor extensions",
...	...	@@ -1066,6 +1132,7 @@ pub const all_features = blk: {
1066	1132	.dsp,
1067	1133	.has_v7,
1068	1134	.neon,
	1135	.perfmon,
1069	1136	}),
1070	1137	};
1071	1138	result[@enumToInt(Feature.v7em)] = .{
...	...	@@ -1108,6 +1175,7 @@ pub const all_features = blk: {
1108	1175	.dsp,
1109	1176	.has_v7,
1110	1177	.hwdiv,
	1178	.perfmon,
1111	1179	.rclass,
1112	1180	}),
1113	1181	};
...	...	@@ -1128,6 +1196,7 @@ pub const all_features = blk: {
1128	1196	.has_v7,
1129	1197	.mp,
1130	1198	.neon,
	1199	.perfmon,
1131	1200	.trustzone,
1132	1201	.virtualization,
1133	1202	}),
...	...	@@ -1266,6 +1335,23 @@ pub const all_features = blk: {
1266	1335	.virtualization,
1267	1336	}),
1268	1337	};
	1338	result[@enumToInt(Feature.v8_8a)] = .{
	1339	.llvm_name = "armv8.8-a",
	1340	.description = "ARMv88a architecture",
	1341	.dependencies = featureSet(&[_]Feature{
	1342	.aclass,
	1343	.crc,
	1344	.crypto,
	1345	.db,
	1346	.dsp,
	1347	.fp_armv8,
	1348	.has_v8_8a,
	1349	.mp,
	1350	.ras,
	1351	.trustzone,
	1352	.virtualization,
	1353	}),
	1354	};
1269	1355	result[@enumToInt(Feature.v8a)] = .{
1270	1356	.llvm_name = "armv8-a",
1271	1357	.description = "ARMv8a architecture",
...	...	@@ -1328,6 +1414,71 @@ pub const all_features = blk: {
1328	1414	.virtualization,
1329	1415	}),
1330	1416	};
	1417	result[@enumToInt(Feature.v9_1a)] = .{
	1418	.llvm_name = "armv9.1-a",
	1419	.description = "ARMv91a architecture",
	1420	.dependencies = featureSet(&[_]Feature{
	1421	.aclass,
	1422	.crc,
	1423	.db,
	1424	.dsp,
	1425	.fp_armv8,
	1426	.has_v9_1a,
	1427	.mp,
	1428	.ras,
	1429	.trustzone,
	1430	.virtualization,
	1431	}),
	1432	};
	1433	result[@enumToInt(Feature.v9_2a)] = .{
	1434	.llvm_name = "armv9.2-a",
	1435	.description = "ARMv92a architecture",
	1436	.dependencies = featureSet(&[_]Feature{
	1437	.aclass,
	1438	.crc,
	1439	.db,
	1440	.dsp,
	1441	.fp_armv8,
	1442	.has_v9_2a,
	1443	.mp,
	1444	.ras,
	1445	.trustzone,
	1446	.virtualization,
	1447	}),
	1448	};
	1449	result[@enumToInt(Feature.v9_3a)] = .{
	1450	.llvm_name = "armv9.3-a",
	1451	.description = "ARMv93a architecture",
	1452	.dependencies = featureSet(&[_]Feature{
	1453	.aclass,
	1454	.crc,
	1455	.crypto,
	1456	.db,
	1457	.dsp,
	1458	.fp_armv8,
	1459	.has_v9_3a,
	1460	.mp,
	1461	.ras,
	1462	.trustzone,
	1463	.virtualization,
	1464	}),
	1465	};
	1466	result[@enumToInt(Feature.v9a)] = .{
	1467	.llvm_name = "armv9-a",
	1468	.description = "ARMv9a architecture",
	1469	.dependencies = featureSet(&[_]Feature{
	1470	.aclass,
	1471	.crc,
	1472	.db,
	1473	.dsp,
	1474	.fp_armv8,
	1475	.has_v9a,
	1476	.mp,
	1477	.ras,
	1478	.trustzone,
	1479	.virtualization,
	1480	}),
	1481	};
1331	1482	result[@enumToInt(Feature.vfp2)] = .{
1332	1483	.llvm_name = "vfp2",
1333	1484	.description = "Enable VFP2 instructions",
...	...	@@ -1781,6 +1932,16 @@ pub const cpu = struct {
1781	1932	.vmlx_hazards,
1782	1933	}),
1783	1934	};
	1935	pub const cortex_a710 = CpuModel{
	1936	.name = "cortex_a710",
	1937	.llvm_name = "cortex-a710",
	1938	.features = featureSet(&[_]Feature{
	1939	.bf16,
	1940	.fp16fml,
	1941	.i8mm,
	1942	.v9a,
	1943	}),
	1944	};
1784	1945	pub const cortex_a72 = CpuModel{
1785	1946	.name = "cortex_a72",
1786	1947	.llvm_name = "cortex-a72",
...	...	@@ -1933,6 +2094,7 @@ pub const cpu = struct {
1933	2094	.llvm_name = "cortex-m33",
1934	2095	.features = featureSet(&[_]Feature{
1935	2096	.dsp,
	2097	.fix_cmse_cve_2021_35465,
1936	2098	.fp_armv8d16sp,
1937	2099	.loop_align,
1938	2100	.no_branch_predictor,
...	...	@@ -1947,6 +2109,7 @@ pub const cpu = struct {
1947	2109	.llvm_name = "cortex-m35p",
1948	2110	.features = featureSet(&[_]Feature{
1949	2111	.dsp,
	2112	.fix_cmse_cve_2021_35465,
1950	2113	.fp_armv8d16sp,
1951	2114	.loop_align,
1952	2115	.no_branch_predictor,
...	...	@@ -1973,6 +2136,7 @@ pub const cpu = struct {
1973	2136	.name = "cortex_m55",
1974	2137	.llvm_name = "cortex-m55",
1975	2138	.features = featureSet(&[_]Feature{
	2139	.fix_cmse_cve_2021_35465,
1976	2140	.fp_armv8d16,
1977	2141	.loop_align,
1978	2142	.mve_fp,
...	...	@@ -2079,6 +2243,15 @@ pub const cpu = struct {
2079	2243	.v8_2a,
2080	2244	}),
2081	2245	};
	2246	pub const cortex_x1c = CpuModel{
	2247	.name = "cortex_x1c",
	2248	.llvm_name = "cortex-x1c",
	2249	.features = featureSet(&[_]Feature{
	2250	.dotprod,
	2251	.fullfp16,
	2252	.v8_2a,
	2253	}),
	2254	};
2082	2255	pub const cyclone = CpuModel{
2083	2256	.name = "cyclone",
2084	2257	.llvm_name = "cyclone",

lib/std/target/avr.zig+280

...	...	@@ -583,6 +583,20 @@ pub const cpu = struct {
583	583	.avr35,
584	584	}),
585	585	};
	586	pub const ata5702m322 = CpuModel{
	587	.name = "ata5702m322",
	588	.llvm_name = "ata5702m322",
	589	.features = featureSet(&[_]Feature{
	590	.avr5,
	591	}),
	592	};
	593	pub const ata5782 = CpuModel{
	594	.name = "ata5782",
	595	.llvm_name = "ata5782",
	596	.features = featureSet(&[_]Feature{
	597	.avr5,
	598	}),
	599	};
586	600	pub const ata5790 = CpuModel{
587	601	.name = "ata5790",
588	602	.llvm_name = "ata5790",
...	...	@@ -590,6 +604,20 @@ pub const cpu = struct {
590	604	.avr5,
591	605	}),
592	606	};
	607	pub const ata5790n = CpuModel{
	608	.name = "ata5790n",
	609	.llvm_name = "ata5790n",
	610	.features = featureSet(&[_]Feature{
	611	.avr5,
	612	}),
	613	};
	614	pub const ata5791 = CpuModel{
	615	.name = "ata5791",
	616	.llvm_name = "ata5791",
	617	.features = featureSet(&[_]Feature{
	618	.avr5,
	619	}),
	620	};
593	621	pub const ata5795 = CpuModel{
594	622	.name = "ata5795",
595	623	.llvm_name = "ata5795",
...	...	@@ -597,6 +625,13 @@ pub const cpu = struct {
597	625	.avr5,
598	626	}),
599	627	};
	628	pub const ata5831 = CpuModel{
	629	.name = "ata5831",
	630	.llvm_name = "ata5831",
	631	.features = featureSet(&[_]Feature{
	632	.avr5,
	633	}),
	634	};
600	635	pub const ata6285 = CpuModel{
601	636	.name = "ata6285",
602	637	.llvm_name = "ata6285",
...	...	@@ -618,6 +653,55 @@ pub const cpu = struct {
618	653	.avr4,
619	654	}),
620	655	};
	656	pub const ata6612c = CpuModel{
	657	.name = "ata6612c",
	658	.llvm_name = "ata6612c",
	659	.features = featureSet(&[_]Feature{
	660	.avr4,
	661	}),
	662	};
	663	pub const ata6613c = CpuModel{
	664	.name = "ata6613c",
	665	.llvm_name = "ata6613c",
	666	.features = featureSet(&[_]Feature{
	667	.avr5,
	668	}),
	669	};
	670	pub const ata6614q = CpuModel{
	671	.name = "ata6614q",
	672	.llvm_name = "ata6614q",
	673	.features = featureSet(&[_]Feature{
	674	.avr5,
	675	}),
	676	};
	677	pub const ata6617c = CpuModel{
	678	.name = "ata6617c",
	679	.llvm_name = "ata6617c",
	680	.features = featureSet(&[_]Feature{
	681	.avr35,
	682	}),
	683	};
	684	pub const ata664251 = CpuModel{
	685	.name = "ata664251",
	686	.llvm_name = "ata664251",
	687	.features = featureSet(&[_]Feature{
	688	.avr35,
	689	}),
	690	};
	691	pub const ata8210 = CpuModel{
	692	.name = "ata8210",
	693	.llvm_name = "ata8210",
	694	.features = featureSet(&[_]Feature{
	695	.avr5,
	696	}),
	697	};
	698	pub const ata8510 = CpuModel{
	699	.name = "ata8510",
	700	.llvm_name = "ata8510",
	701	.features = featureSet(&[_]Feature{
	702	.avr5,
	703	}),
	704	};
621	705	pub const atmega103 = CpuModel{
622	706	.name = "atmega103",
623	707	.llvm_name = "atmega103",
...	...	@@ -1347,6 +1431,13 @@ pub const cpu = struct {
1347	1431	.avr5,
1348	1432	}),
1349	1433	};
	1434	pub const atmega64hve2 = CpuModel{
	1435	.name = "atmega64hve2",
	1436	.llvm_name = "atmega64hve2",
	1437	.features = featureSet(&[_]Feature{
	1438	.avr5,
	1439	}),
	1440	};
1350	1441	pub const atmega64m1 = CpuModel{
1351	1442	.name = "atmega64m1",
1352	1443	.llvm_name = "atmega64m1",
...	...	@@ -1510,6 +1601,48 @@ pub const cpu = struct {
1510	1601	.avr1,
1511	1602	}),
1512	1603	};
	1604	pub const attiny1604 = CpuModel{
	1605	.name = "attiny1604",
	1606	.llvm_name = "attiny1604",
	1607	.features = featureSet(&[_]Feature{
	1608	.xmega,
	1609	}),
	1610	};
	1611	pub const attiny1606 = CpuModel{
	1612	.name = "attiny1606",
	1613	.llvm_name = "attiny1606",
	1614	.features = featureSet(&[_]Feature{
	1615	.xmega,
	1616	}),
	1617	};
	1618	pub const attiny1607 = CpuModel{
	1619	.name = "attiny1607",
	1620	.llvm_name = "attiny1607",
	1621	.features = featureSet(&[_]Feature{
	1622	.xmega,
	1623	}),
	1624	};
	1625	pub const attiny1614 = CpuModel{
	1626	.name = "attiny1614",
	1627	.llvm_name = "attiny1614",
	1628	.features = featureSet(&[_]Feature{
	1629	.xmega,
	1630	}),
	1631	};
	1632	pub const attiny1616 = CpuModel{
	1633	.name = "attiny1616",
	1634	.llvm_name = "attiny1616",
	1635	.features = featureSet(&[_]Feature{
	1636	.xmega,
	1637	}),
	1638	};
	1639	pub const attiny1617 = CpuModel{
	1640	.name = "attiny1617",
	1641	.llvm_name = "attiny1617",
	1642	.features = featureSet(&[_]Feature{
	1643	.xmega,
	1644	}),
	1645	};
1513	1646	pub const attiny1634 = CpuModel{
1514	1647	.name = "attiny1634",
1515	1648	.llvm_name = "attiny1634",
...	...	@@ -1531,6 +1664,34 @@ pub const cpu = struct {
1531	1664	.avrtiny,
1532	1665	}),
1533	1666	};
	1667	pub const attiny202 = CpuModel{
	1668	.name = "attiny202",
	1669	.llvm_name = "attiny202",
	1670	.features = featureSet(&[_]Feature{
	1671	.xmega,
	1672	}),
	1673	};
	1674	pub const attiny204 = CpuModel{
	1675	.name = "attiny204",
	1676	.llvm_name = "attiny204",
	1677	.features = featureSet(&[_]Feature{
	1678	.xmega,
	1679	}),
	1680	};
	1681	pub const attiny212 = CpuModel{
	1682	.name = "attiny212",
	1683	.llvm_name = "attiny212",
	1684	.features = featureSet(&[_]Feature{
	1685	.xmega,
	1686	}),
	1687	};
	1688	pub const attiny214 = CpuModel{
	1689	.name = "attiny214",
	1690	.llvm_name = "attiny214",
	1691	.features = featureSet(&[_]Feature{
	1692	.xmega,
	1693	}),
	1694	};
1534	1695	pub const attiny22 = CpuModel{
1535	1696	.name = "attiny22",
1536	1697	.llvm_name = "attiny22",
...	...	@@ -1602,6 +1763,20 @@ pub const cpu = struct {
1602	1763	.avr1,
1603	1764	}),
1604	1765	};
	1766	pub const attiny3216 = CpuModel{
	1767	.name = "attiny3216",
	1768	.llvm_name = "attiny3216",
	1769	.features = featureSet(&[_]Feature{
	1770	.xmega,
	1771	}),
	1772	};
	1773	pub const attiny3217 = CpuModel{
	1774	.name = "attiny3217",
	1775	.llvm_name = "attiny3217",
	1776	.features = featureSet(&[_]Feature{
	1777	.xmega,
	1778	}),
	1779	};
1605	1780	pub const attiny4 = CpuModel{
1606	1781	.name = "attiny4",
1607	1782	.llvm_name = "attiny4",
...	...	@@ -1616,6 +1791,55 @@ pub const cpu = struct {
1616	1791	.avrtiny,
1617	1792	}),
1618	1793	};
	1794	pub const attiny402 = CpuModel{
	1795	.name = "attiny402",
	1796	.llvm_name = "attiny402",
	1797	.features = featureSet(&[_]Feature{
	1798	.xmega,
	1799	}),
	1800	};
	1801	pub const attiny404 = CpuModel{
	1802	.name = "attiny404",
	1803	.llvm_name = "attiny404",
	1804	.features = featureSet(&[_]Feature{
	1805	.xmega,
	1806	}),
	1807	};
	1808	pub const attiny406 = CpuModel{
	1809	.name = "attiny406",
	1810	.llvm_name = "attiny406",
	1811	.features = featureSet(&[_]Feature{
	1812	.xmega,
	1813	}),
	1814	};
	1815	pub const attiny412 = CpuModel{
	1816	.name = "attiny412",
	1817	.llvm_name = "attiny412",
	1818	.features = featureSet(&[_]Feature{
	1819	.xmega,
	1820	}),
	1821	};
	1822	pub const attiny414 = CpuModel{
	1823	.name = "attiny414",
	1824	.llvm_name = "attiny414",
	1825	.features = featureSet(&[_]Feature{
	1826	.xmega,
	1827	}),
	1828	};
	1829	pub const attiny416 = CpuModel{
	1830	.name = "attiny416",
	1831	.llvm_name = "attiny416",
	1832	.features = featureSet(&[_]Feature{
	1833	.xmega,
	1834	}),
	1835	};
	1836	pub const attiny417 = CpuModel{
	1837	.name = "attiny417",
	1838	.llvm_name = "attiny417",
	1839	.features = featureSet(&[_]Feature{
	1840	.xmega,
	1841	}),
	1842	};
1619	1843	pub const attiny4313 = CpuModel{
1620	1844	.name = "attiny4313",
1621	1845	.llvm_name = "attiny4313",
...	...	@@ -1686,6 +1910,48 @@ pub const cpu = struct {
1686	1910	.avrtiny,
1687	1911	}),
1688	1912	};
	1913	pub const attiny804 = CpuModel{
	1914	.name = "attiny804",
	1915	.llvm_name = "attiny804",
	1916	.features = featureSet(&[_]Feature{
	1917	.xmega,
	1918	}),
	1919	};
	1920	pub const attiny806 = CpuModel{
	1921	.name = "attiny806",
	1922	.llvm_name = "attiny806",
	1923	.features = featureSet(&[_]Feature{
	1924	.xmega,
	1925	}),
	1926	};
	1927	pub const attiny807 = CpuModel{
	1928	.name = "attiny807",
	1929	.llvm_name = "attiny807",
	1930	.features = featureSet(&[_]Feature{
	1931	.xmega,
	1932	}),
	1933	};
	1934	pub const attiny814 = CpuModel{
	1935	.name = "attiny814",
	1936	.llvm_name = "attiny814",
	1937	.features = featureSet(&[_]Feature{
	1938	.xmega,
	1939	}),
	1940	};
	1941	pub const attiny816 = CpuModel{
	1942	.name = "attiny816",
	1943	.llvm_name = "attiny816",
	1944	.features = featureSet(&[_]Feature{
	1945	.xmega,
	1946	}),
	1947	};
	1948	pub const attiny817 = CpuModel{
	1949	.name = "attiny817",
	1950	.llvm_name = "attiny817",
	1951	.features = featureSet(&[_]Feature{
	1952	.xmega,
	1953	}),
	1954	};
1689	1955	pub const attiny828 = CpuModel{
1690	1956	.name = "attiny828",
1691	1957	.llvm_name = "attiny828",
...	...	@@ -1945,6 +2211,13 @@ pub const cpu = struct {
1945	2211	.xmegau,
1946	2212	}),
1947	2213	};
	2214	pub const atxmega32c3 = CpuModel{
	2215	.name = "atxmega32c3",
	2216	.llvm_name = "atxmega32c3",
	2217	.features = featureSet(&[_]Feature{
	2218	.xmegau,
	2219	}),
	2220	};
1948	2221	pub const atxmega32c4 = CpuModel{
1949	2222	.name = "atxmega32c4",
1950	2223	.llvm_name = "atxmega32c4",
...	...	@@ -1952,6 +2225,13 @@ pub const cpu = struct {
1952	2225	.xmegau,
1953	2226	}),
1954	2227	};
	2228	pub const atxmega32d3 = CpuModel{
	2229	.name = "atxmega32d3",
	2230	.llvm_name = "atxmega32d3",
	2231	.features = featureSet(&[_]Feature{
	2232	.xmega,
	2233	}),
	2234	};
1955	2235	pub const atxmega32d4 = CpuModel{
1956	2236	.name = "atxmega32d4",
1957	2237	.llvm_name = "atxmega32d4",

lib/std/target/csky.zig created+163

...	...	@@ -0,0 +1,163 @@
	1	//! This file is auto-generated by tools/update_cpu_features.zig.
	2
	3	const std = @import("../std.zig");
	4	const CpuFeature = std.Target.Cpu.Feature;
	5	const CpuModel = std.Target.Cpu.Model;
	6
	7	pub const Feature = enum {
	8	@"10e60",
	9	@"2e3",
	10	@"3e3r1",
	11	@"3e3r3",
	12	@"3e7",
	13	@"7e10",
	14	btst16,
	15	doloop,
	16	e1,
	17	e2,
	18	elrw,
	19	fpuv2_df,
	20	fpuv2_sf,
	21	fpuv3_df,
	22	fpuv3_sf,
	23	hard_float,
	24	hard_float_abi,
	25	java,
	26	mp1e2,
	27	};
	28
	29	pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
	30	pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
	31	pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
	32	pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
	33
	34	pub const all_features = blk: {
	35	const len = @typeInfo(Feature).Enum.fields.len;
	36	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
	37	var result: [len]CpuFeature = undefined;
	38	result[@enumToInt(Feature.@"10e60")] = .{
	39	.llvm_name = "10e60",
	40	.description = "Support CSKY 10e60 instructions",
	41	.dependencies = featureSet(&[_]Feature{
	42	.@"7e10",
	43	}),
	44	};
	45	result[@enumToInt(Feature.@"2e3")] = .{
	46	.llvm_name = "2e3",
	47	.description = "Support CSKY 2e3 instructions",
	48	.dependencies = featureSet(&[_]Feature{
	49	.e2,
	50	}),
	51	};
	52	result[@enumToInt(Feature.@"3e3r1")] = .{
	53	.llvm_name = "3e3r1",
	54	.description = "Support CSKY 3e3r1 instructions",
	55	.dependencies = featureSet(&[_]Feature{}),
	56	};
	57	result[@enumToInt(Feature.@"3e3r3")] = .{
	58	.llvm_name = "3e3r3",
	59	.description = "Support CSKY 3e3r3 instructions",
	60	.dependencies = featureSet(&[_]Feature{
	61	.doloop,
	62	}),
	63	};
	64	result[@enumToInt(Feature.@"3e7")] = .{
	65	.llvm_name = "3e7",
	66	.description = "Support CSKY 3e7 instructions",
	67	.dependencies = featureSet(&[_]Feature{
	68	.@"2e3",
	69	}),
	70	};
	71	result[@enumToInt(Feature.@"7e10")] = .{
	72	.llvm_name = "7e10",
	73	.description = "Support CSKY 7e10 instructions",
	74	.dependencies = featureSet(&[_]Feature{
	75	.@"3e7",
	76	}),
	77	};
	78	result[@enumToInt(Feature.btst16)] = .{
	79	.llvm_name = "btst16",
	80	.description = "Use the 16-bit btsti instruction",
	81	.dependencies = featureSet(&[_]Feature{}),
	82	};
	83	result[@enumToInt(Feature.doloop)] = .{
	84	.llvm_name = "doloop",
	85	.description = "Enable doloop instructions",
	86	.dependencies = featureSet(&[_]Feature{}),
	87	};
	88	result[@enumToInt(Feature.e1)] = .{
	89	.llvm_name = "e1",
	90	.description = "Support CSKY e1 instructions",
	91	.dependencies = featureSet(&[_]Feature{
	92	.elrw,
	93	}),
	94	};
	95	result[@enumToInt(Feature.e2)] = .{
	96	.llvm_name = "e2",
	97	.description = "Support CSKY e2 instructions",
	98	.dependencies = featureSet(&[_]Feature{
	99	.e1,
	100	}),
	101	};
	102	result[@enumToInt(Feature.elrw)] = .{
	103	.llvm_name = "elrw",
	104	.description = "Use the extend LRW instruction",
	105	.dependencies = featureSet(&[_]Feature{}),
	106	};
	107	result[@enumToInt(Feature.fpuv2_df)] = .{
	108	.llvm_name = "fpuv2_df",
	109	.description = "Enable FPUv2 double float instructions",
	110	.dependencies = featureSet(&[_]Feature{}),
	111	};
	112	result[@enumToInt(Feature.fpuv2_sf)] = .{
	113	.llvm_name = "fpuv2_sf",
	114	.description = "Enable FPUv2 single float instructions",
	115	.dependencies = featureSet(&[_]Feature{}),
	116	};
	117	result[@enumToInt(Feature.fpuv3_df)] = .{
	118	.llvm_name = "fpuv3_df",
	119	.description = "Enable FPUv3 double float instructions",
	120	.dependencies = featureSet(&[_]Feature{}),
	121	};
	122	result[@enumToInt(Feature.fpuv3_sf)] = .{
	123	.llvm_name = "fpuv3_sf",
	124	.description = "Enable FPUv3 single float instructions",
	125	.dependencies = featureSet(&[_]Feature{}),
	126	};
	127	result[@enumToInt(Feature.hard_float)] = .{
	128	.llvm_name = "hard-float",
	129	.description = "Use hard floating point features",
	130	.dependencies = featureSet(&[_]Feature{}),
	131	};
	132	result[@enumToInt(Feature.hard_float_abi)] = .{
	133	.llvm_name = "hard-float-abi",
	134	.description = "Use hard floating point ABI to pass args",
	135	.dependencies = featureSet(&[_]Feature{}),
	136	};
	137	result[@enumToInt(Feature.java)] = .{
	138	.llvm_name = "java",
	139	.description = "Enable java instructions",
	140	.dependencies = featureSet(&[_]Feature{}),
	141	};
	142	result[@enumToInt(Feature.mp1e2)] = .{
	143	.llvm_name = "mp1e2",
	144	.description = "Support CSKY mp1e2 instructions",
	145	.dependencies = featureSet(&[_]Feature{
	146	.@"3e7",
	147	}),
	148	};
	149	const ti = @typeInfo(Feature);
	150	for (result) \|*elem, i\| {
	151	elem.index = i;
	152	elem.name = ti.Enum.fields[i].name;
	153	}
	154	break :blk result;
	155	};
	156
	157	pub const cpu = struct {
	158	pub const generic = CpuModel{
	159	.name = "generic",
	160	.llvm_name = "generic",
	161	.features = featureSet(&[_]Feature{}),
	162	};
	163	};

lib/std/target/hexagon.zig+64

...	...	@@ -6,17 +6,21 @@ const CpuModel = std.Target.Cpu.Model;
6	6
7	7	pub const Feature = enum {
8	8	audio,
	9	cabac,
9	10	compound,
10	11	duplex,
11	12	hvx,
	13	hvx_ieee_fp,
12	14	hvx_length128b,
13	15	hvx_length64b,
	16	hvx_qfloat,
14	17	hvxv60,
15	18	hvxv62,
16	19	hvxv65,
17	20	hvxv66,
18	21	hvxv67,
19	22	hvxv68,
	23	hvxv69,
20	24	long_calls,
21	25	mem_noshuf,
22	26	memops,
...	...	@@ -37,6 +41,7 @@ pub const Feature = enum {
37	41	v66,
38	42	v67,
39	43	v68,
	44	v69,
40	45	zreg,
41	46	};
42	47
...	...	@@ -54,6 +59,11 @@ pub const all_features = blk: {
54	59	.description = "Hexagon Audio extension instructions",
55	60	.dependencies = featureSet(&[_]Feature{}),
56	61	};
	62	result[@enumToInt(Feature.cabac)] = .{
	63	.llvm_name = "cabac",
	64	.description = "Emit the CABAC instruction",
	65	.dependencies = featureSet(&[_]Feature{}),
	66	};
57	67	result[@enumToInt(Feature.compound)] = .{
58	68	.llvm_name = "compound",
59	69	.description = "Use compound instructions",
...	...	@@ -69,6 +79,11 @@ pub const all_features = blk: {
69	79	.description = "Hexagon HVX instructions",
70	80	.dependencies = featureSet(&[_]Feature{}),
71	81	};
	82	result[@enumToInt(Feature.hvx_ieee_fp)] = .{
	83	.llvm_name = "hvx-ieee-fp",
	84	.description = "Hexagon HVX IEEE floating point instructions",
	85	.dependencies = featureSet(&[_]Feature{}),
	86	};
72	87	result[@enumToInt(Feature.hvx_length128b)] = .{
73	88	.llvm_name = "hvx-length128b",
74	89	.description = "Hexagon HVX 128B instructions",
...	...	@@ -83,6 +98,11 @@ pub const all_features = blk: {
83	98	.hvx,
84	99	}),
85	100	};
	101	result[@enumToInt(Feature.hvx_qfloat)] = .{
	102	.llvm_name = "hvx-qfloat",
	103	.description = "Hexagon HVX QFloating point instructions",
	104	.dependencies = featureSet(&[_]Feature{}),
	105	};
86	106	result[@enumToInt(Feature.hvxv60)] = .{
87	107	.llvm_name = "hvxv60",
88	108	.description = "Hexagon HVX instructions",
...	...	@@ -126,6 +146,13 @@ pub const all_features = blk: {
126	146	.hvxv67,
127	147	}),
128	148	};
	149	result[@enumToInt(Feature.hvxv69)] = .{
	150	.llvm_name = "hvxv69",
	151	.description = "Hexagon HVX instructions",
	152	.dependencies = featureSet(&[_]Feature{
	153	.hvxv68,
	154	}),
	155	};
129	156	result[@enumToInt(Feature.long_calls)] = .{
130	157	.llvm_name = "long-calls",
131	158	.description = "Use constant-extended calls",
...	...	@@ -230,6 +257,11 @@ pub const all_features = blk: {
230	257	.description = "Enable Hexagon V68 architecture",
231	258	.dependencies = featureSet(&[_]Feature{}),
232	259	};
	260	result[@enumToInt(Feature.v69)] = .{
	261	.llvm_name = "v69",
	262	.description = "Enable Hexagon V69 architecture",
	263	.dependencies = featureSet(&[_]Feature{}),
	264	};
233	265	result[@enumToInt(Feature.zreg)] = .{
234	266	.llvm_name = "zreg",
235	267	.description = "Hexagon ZReg extension instructions",
...	...	@@ -248,6 +280,7 @@ pub const cpu = struct {
248	280	.name = "generic",
249	281	.llvm_name = "generic",
250	282	.features = featureSet(&[_]Feature{
	283	.cabac,
251	284	.compound,
252	285	.duplex,
253	286	.memops,
...	...	@@ -264,6 +297,7 @@ pub const cpu = struct {
264	297	.name = "hexagonv5",
265	298	.llvm_name = "hexagonv5",
266	299	.features = featureSet(&[_]Feature{
	300	.cabac,
267	301	.compound,
268	302	.duplex,
269	303	.memops,
...	...	@@ -278,6 +312,7 @@ pub const cpu = struct {
278	312	.name = "hexagonv55",
279	313	.llvm_name = "hexagonv55",
280	314	.features = featureSet(&[_]Feature{
	315	.cabac,
281	316	.compound,
282	317	.duplex,
283	318	.memops,
...	...	@@ -293,6 +328,7 @@ pub const cpu = struct {
293	328	.name = "hexagonv60",
294	329	.llvm_name = "hexagonv60",
295	330	.features = featureSet(&[_]Feature{
	331	.cabac,
296	332	.compound,
297	333	.duplex,
298	334	.memops,
...	...	@@ -309,6 +345,7 @@ pub const cpu = struct {
309	345	.name = "hexagonv62",
310	346	.llvm_name = "hexagonv62",
311	347	.features = featureSet(&[_]Feature{
	348	.cabac,
312	349	.compound,
313	350	.duplex,
314	351	.memops,
...	...	@@ -326,6 +363,7 @@ pub const cpu = struct {
326	363	.name = "hexagonv65",
327	364	.llvm_name = "hexagonv65",
328	365	.features = featureSet(&[_]Feature{
	366	.cabac,
329	367	.compound,
330	368	.duplex,
331	369	.mem_noshuf,
...	...	@@ -344,6 +382,7 @@ pub const cpu = struct {
344	382	.name = "hexagonv66",
345	383	.llvm_name = "hexagonv66",
346	384	.features = featureSet(&[_]Feature{
	385	.cabac,
347	386	.compound,
348	387	.duplex,
349	388	.mem_noshuf,
...	...	@@ -363,6 +402,7 @@ pub const cpu = struct {
363	402	.name = "hexagonv67",
364	403	.llvm_name = "hexagonv67",
365	404	.features = featureSet(&[_]Feature{
	405	.cabac,
366	406	.compound,
367	407	.duplex,
368	408	.mem_noshuf,
...	...	@@ -403,6 +443,29 @@ pub const cpu = struct {
403	443	.name = "hexagonv68",
404	444	.llvm_name = "hexagonv68",
405	445	.features = featureSet(&[_]Feature{
	446	.cabac,
	447	.compound,
	448	.duplex,
	449	.mem_noshuf,
	450	.memops,
	451	.nvj,
	452	.nvs,
	453	.small_data,
	454	.v5,
	455	.v55,
	456	.v60,
	457	.v62,
	458	.v65,
	459	.v66,
	460	.v67,
	461	.v68,
	462	}),
	463	};
	464	pub const hexagonv69 = CpuModel{
	465	.name = "hexagonv69",
	466	.llvm_name = "hexagonv69",
	467	.features = featureSet(&[_]Feature{
	468	.cabac,
406	469	.compound,
407	470	.duplex,
408	471	.mem_noshuf,
...	...	@@ -418,6 +481,7 @@ pub const cpu = struct {
418	481	.v66,
419	482	.v67,
420	483	.v68,
	484	.v69,
421	485	}),
422	486	};
423	487	};

lib/std/target/nvptx.zig+18

...	...	@@ -19,6 +19,9 @@ pub const Feature = enum {
19	19	ptx70,
20	20	ptx71,
21	21	ptx72,
	22	ptx73,
	23	ptx74,
	24	ptx75,
22	25	sm_20,
23	26	sm_21,
24	27	sm_30,
...	...	@@ -117,6 +120,21 @@ pub const all_features = blk: {
117	120	.description = "Use PTX version 7.2",
118	121	.dependencies = featureSet(&[_]Feature{}),
119	122	};
	123	result[@enumToInt(Feature.ptx73)] = .{
	124	.llvm_name = "ptx73",
	125	.description = "Use PTX version 7.3",
	126	.dependencies = featureSet(&[_]Feature{}),
	127	};
	128	result[@enumToInt(Feature.ptx74)] = .{
	129	.llvm_name = "ptx74",
	130	.description = "Use PTX version 7.4",
	131	.dependencies = featureSet(&[_]Feature{}),
	132	};
	133	result[@enumToInt(Feature.ptx75)] = .{
	134	.llvm_name = "ptx75",
	135	.description = "Use PTX version 7.5",
	136	.dependencies = featureSet(&[_]Feature{}),
	137	};
120	138	result[@enumToInt(Feature.sm_20)] = .{
121	139	.llvm_name = "sm_20",
122	140	.description = "Target SM 2.0",

lib/std/target/powerpc.zig+94

...	...	@@ -29,14 +29,24 @@ pub const Feature = enum {
29	29	frsqrte,
30	30	frsqrtes,
31	31	fsqrt,
	32	fuse_add_logical,
32	33	fuse_addi_load,
33	34	fuse_addis_load,
	35	fuse_arith_add,
	36	fuse_back2back,
	37	fuse_cmp,
	38	fuse_logical,
	39	fuse_logical_add,
	40	fuse_sha3,
34	41	fuse_store,
	42	fuse_wideimm,
	43	fuse_zeromove,
35	44	fusion,
36	45	hard_float,
37	46	htm,
38	47	icbt,
39	48	invariant_function_descriptors,
	49	isa_v206_instructions,
40	50	isa_v207_instructions,
41	51	isa_v30_instructions,
42	52	isa_v31_instructions,
...	...	@@ -235,6 +245,13 @@ pub const all_features = blk: {
235	245	.fpu,
236	246	}),
237	247	};
	248	result[@enumToInt(Feature.fuse_add_logical)] = .{
	249	.llvm_name = "fuse-add-logical",
	250	.description = "Target supports Add with Logical Operations fusion",
	251	.dependencies = featureSet(&[_]Feature{
	252	.fusion,
	253	}),
	254	};
238	255	result[@enumToInt(Feature.fuse_addi_load)] = .{
239	256	.llvm_name = "fuse-addi-load",
240	257	.description = "Power8 Addi-Load fusion",
...	...	@@ -249,6 +266,48 @@ pub const all_features = blk: {
249	266	.fusion,
250	267	}),
251	268	};
	269	result[@enumToInt(Feature.fuse_arith_add)] = .{
	270	.llvm_name = "fuse-arith-add",
	271	.description = "Target supports Arithmetic Operations with Add fusion",
	272	.dependencies = featureSet(&[_]Feature{
	273	.fusion,
	274	}),
	275	};
	276	result[@enumToInt(Feature.fuse_back2back)] = .{
	277	.llvm_name = "fuse-back2back",
	278	.description = "Target supports general back to back fusion",
	279	.dependencies = featureSet(&[_]Feature{
	280	.fusion,
	281	}),
	282	};
	283	result[@enumToInt(Feature.fuse_cmp)] = .{
	284	.llvm_name = "fuse-cmp",
	285	.description = "Target supports Comparison Operations fusion",
	286	.dependencies = featureSet(&[_]Feature{
	287	.fusion,
	288	}),
	289	};
	290	result[@enumToInt(Feature.fuse_logical)] = .{
	291	.llvm_name = "fuse-logical",
	292	.description = "Target supports Logical Operations fusion",
	293	.dependencies = featureSet(&[_]Feature{
	294	.fusion,
	295	}),
	296	};
	297	result[@enumToInt(Feature.fuse_logical_add)] = .{
	298	.llvm_name = "fuse-logical-add",
	299	.description = "Target supports Logical with Add Operations fusion",
	300	.dependencies = featureSet(&[_]Feature{
	301	.fusion,
	302	}),
	303	};
	304	result[@enumToInt(Feature.fuse_sha3)] = .{
	305	.llvm_name = "fuse-sha3",
	306	.description = "Target supports SHA3 assist fusion",
	307	.dependencies = featureSet(&[_]Feature{
	308	.fusion,
	309	}),
	310	};
252	311	result[@enumToInt(Feature.fuse_store)] = .{
253	312	.llvm_name = "fuse-store",
254	313	.description = "Target supports store clustering",
...	...	@@ -256,6 +315,20 @@ pub const all_features = blk: {
256	315	.fusion,
257	316	}),
258	317	};
	318	result[@enumToInt(Feature.fuse_wideimm)] = .{
	319	.llvm_name = "fuse-wideimm",
	320	.description = "Target supports Wide-Immediate fusion",
	321	.dependencies = featureSet(&[_]Feature{
	322	.fusion,
	323	}),
	324	};
	325	result[@enumToInt(Feature.fuse_zeromove)] = .{
	326	.llvm_name = "fuse-zeromove",
	327	.description = "Target supports move to SPR with branch fusion",
	328	.dependencies = featureSet(&[_]Feature{
	329	.fusion,
	330	}),
	331	};
259	332	result[@enumToInt(Feature.fusion)] = .{
260	333	.llvm_name = "fusion",
261	334	.description = "Target supports instruction fusion",
...	...	@@ -281,6 +354,11 @@ pub const all_features = blk: {
281	354	.description = "Assume function descriptors are invariant",
282	355	.dependencies = featureSet(&[_]Feature{}),
283	356	};
	357	result[@enumToInt(Feature.isa_v206_instructions)] = .{
	358	.llvm_name = "isa-v206-instructions",
	359	.description = "Enable instructions in ISA 2.06.",
	360	.dependencies = featureSet(&[_]Feature{}),
	361	};
284	362	result[@enumToInt(Feature.isa_v207_instructions)] = .{
285	363	.llvm_name = "isa-v207-instructions",
286	364	.description = "Enable instructions in ISA 2.07.",
...	...	@@ -707,9 +785,15 @@ pub const cpu = struct {
707	785	.frsqrte,
708	786	.frsqrtes,
709	787	.fsqrt,
	788	.fuse_add_logical,
	789	.fuse_arith_add,
	790	.fuse_logical,
	791	.fuse_logical_add,
	792	.fuse_sha3,
710	793	.fuse_store,
711	794	.htm,
712	795	.icbt,
	796	.isa_v206_instructions,
713	797	.isel,
714	798	.ldbrx,
715	799	.lfiwax,
...	...	@@ -817,6 +901,7 @@ pub const cpu = struct {
817	901	.fuse_addis_load,
818	902	.htm,
819	903	.icbt,
	904	.isa_v206_instructions,
820	905	.isa_v207_instructions,
821	906	.isel,
822	907	.ldbrx,
...	...	@@ -851,9 +936,15 @@ pub const cpu = struct {
851	936	.frsqrte,
852	937	.frsqrtes,
853	938	.fsqrt,
	939	.fuse_add_logical,
	940	.fuse_arith_add,
	941	.fuse_logical,
	942	.fuse_logical_add,
	943	.fuse_sha3,
854	944	.fuse_store,
855	945	.htm,
856	946	.icbt,
	947	.isa_v206_instructions,
857	948	.isel,
858	949	.ldbrx,
859	950	.lfiwax,
...	...	@@ -985,6 +1076,7 @@ pub const cpu = struct {
985	1076	.frsqrte,
986	1077	.frsqrtes,
987	1078	.fsqrt,
	1079	.isa_v206_instructions,
988	1080	.isel,
989	1081	.ldbrx,
990	1082	.lfiwax,
...	...	@@ -1019,6 +1111,7 @@ pub const cpu = struct {
1019	1111	.fuse_addis_load,
1020	1112	.htm,
1021	1113	.icbt,
	1114	.isa_v206_instructions,
1022	1115	.isa_v207_instructions,
1023	1116	.isel,
1024	1117	.ldbrx,
...	...	@@ -1055,6 +1148,7 @@ pub const cpu = struct {
1055	1148	.fsqrt,
1056	1149	.htm,
1057	1150	.icbt,
	1151	.isa_v206_instructions,
1058	1152	.isel,
1059	1153	.ldbrx,
1060	1154	.lfiwax,

lib/std/target/riscv.zig+387-83

...	...	@@ -10,22 +10,12 @@ pub const Feature = enum {
10	10	c,
11	11	d,
12	12	e,
13		experimental_b,
14		experimental_v,
15		experimental_zba,
16		experimental_zbb,
17		experimental_zbc,
18	13	experimental_zbe,
19	14	experimental_zbf,
20	15	experimental_zbm,
21	16	experimental_zbp,
22		experimental_zbproposedc,
23	17	experimental_zbr,
24		experimental_zbs,
25	18	experimental_zbt,
26		experimental_zfh,
27		experimental_zvamo,
28		experimental_zvlsseg,
29	19	f,
30	20	m,
31	21	no_rvc_hints,
...	...	@@ -62,6 +52,46 @@ pub const Feature = enum {
62	52	reserve_x8,
63	53	reserve_x9,
64	54	save_restore,
	55	v,
	56	zba,
	57	zbb,
	58	zbc,
	59	zbkb,
	60	zbkc,
	61	zbkx,
	62	zbs,
	63	zdinx,
	64	zfh,
	65	zfhmin,
	66	zfinx,
	67	zhinx,
	68	zhinxmin,
	69	zk,
	70	zkn,
	71	zknd,
	72	zkne,
	73	zknh,
	74	zkr,
	75	zks,
	76	zksed,
	77	zksh,
	78	zkt,
	79	zve32f,
	80	zve32x,
	81	zve64d,
	82	zve64f,
	83	zve64x,
	84	zvl1024b,
	85	zvl128b,
	86	zvl16384b,
	87	zvl2048b,
	88	zvl256b,
	89	zvl32768b,
	90	zvl32b,
	91	zvl4096b,
	92	zvl512b,
	93	zvl64b,
	94	zvl8192b,
65	95	};
66	96
67	97	pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
...	...	@@ -100,103 +130,36 @@ pub const all_features = blk: {
100	130	.description = "Implements RV32E (provides 16 rather than 32 GPRs)",
101	131	.dependencies = featureSet(&[_]Feature{}),
102	132	};
103		result[@enumToInt(Feature.experimental_b)] = .{
104		.llvm_name = "experimental-b",
105		.description = "'B' (Bit Manipulation Instructions)",
106		.dependencies = featureSet(&[_]Feature{
107		.experimental_zba,
108		.experimental_zbb,
109		.experimental_zbc,
110		.experimental_zbe,
111		.experimental_zbf,
112		.experimental_zbm,
113		.experimental_zbp,
114		.experimental_zbr,
115		.experimental_zbs,
116		.experimental_zbt,
117		}),
118		};
119		result[@enumToInt(Feature.experimental_v)] = .{
120		.llvm_name = "experimental-v",
121		.description = "'V' (Vector Instructions)",
122		.dependencies = featureSet(&[_]Feature{}),
123		};
124		result[@enumToInt(Feature.experimental_zba)] = .{
125		.llvm_name = "experimental-zba",
126		.description = "'Zba' (Address calculation 'B' Instructions)",
127		.dependencies = featureSet(&[_]Feature{}),
128		};
129		result[@enumToInt(Feature.experimental_zbb)] = .{
130		.llvm_name = "experimental-zbb",
131		.description = "'Zbb' (Base 'B' Instructions)",
132		.dependencies = featureSet(&[_]Feature{}),
133		};
134		result[@enumToInt(Feature.experimental_zbc)] = .{
135		.llvm_name = "experimental-zbc",
136		.description = "'Zbc' (Carry-Less 'B' Instructions)",
137		.dependencies = featureSet(&[_]Feature{}),
138		};
139	133	result[@enumToInt(Feature.experimental_zbe)] = .{
140	134	.llvm_name = "experimental-zbe",
141		.description = "'Zbe' (Extract-Deposit 'B' Instructions)",
	135	.description = "'Zbe' (Extract-Deposit 'Zb' Instructions)",
142	136	.dependencies = featureSet(&[_]Feature{}),
143	137	};
144	138	result[@enumToInt(Feature.experimental_zbf)] = .{
145	139	.llvm_name = "experimental-zbf",
146		.description = "'Zbf' (Bit-Field 'B' Instructions)",
	140	.description = "'Zbf' (Bit-Field 'Zb' Instructions)",
147	141	.dependencies = featureSet(&[_]Feature{}),
148	142	};
149	143	result[@enumToInt(Feature.experimental_zbm)] = .{
150	144	.llvm_name = "experimental-zbm",
151		.description = "'Zbm' (Matrix 'B' Instructions)",
	145	.description = "'Zbm' (Matrix 'Zb' Instructions)",
152	146	.dependencies = featureSet(&[_]Feature{}),
153	147	};
154	148	result[@enumToInt(Feature.experimental_zbp)] = .{
155	149	.llvm_name = "experimental-zbp",
156		.description = "'Zbp' (Permutation 'B' Instructions)",
157		.dependencies = featureSet(&[_]Feature{}),
158		};
159		result[@enumToInt(Feature.experimental_zbproposedc)] = .{
160		.llvm_name = "experimental-zbproposedc",
161		.description = "'Zbproposedc' (Proposed Compressed 'B' Instructions)",
	150	.description = "'Zbp' (Permutation 'Zb' Instructions)",
162	151	.dependencies = featureSet(&[_]Feature{}),
163	152	};
164	153	result[@enumToInt(Feature.experimental_zbr)] = .{
165	154	.llvm_name = "experimental-zbr",
166		.description = "'Zbr' (Polynomial Reduction 'B' Instructions)",
167		.dependencies = featureSet(&[_]Feature{}),
168		};
169		result[@enumToInt(Feature.experimental_zbs)] = .{
170		.llvm_name = "experimental-zbs",
171		.description = "'Zbs' (Single-Bit 'B' Instructions)",
	155	.description = "'Zbr' (Polynomial Reduction 'Zb' Instructions)",
172	156	.dependencies = featureSet(&[_]Feature{}),
173	157	};
174	158	result[@enumToInt(Feature.experimental_zbt)] = .{
175	159	.llvm_name = "experimental-zbt",
176		.description = "'Zbt' (Ternary 'B' Instructions)",
	160	.description = "'Zbt' (Ternary 'Zb' Instructions)",
177	161	.dependencies = featureSet(&[_]Feature{}),
178	162	};
179		result[@enumToInt(Feature.experimental_zfh)] = .{
180		.llvm_name = "experimental-zfh",
181		.description = "'Zfh' (Half-Precision Floating-Point)",
182		.dependencies = featureSet(&[_]Feature{
183		.f,
184		}),
185		};
186		result[@enumToInt(Feature.experimental_zvamo)] = .{
187		.llvm_name = "experimental-zvamo",
188		.description = "'Zvamo' (Vector AMO Operations)",
189		.dependencies = featureSet(&[_]Feature{
190		.experimental_v,
191		}),
192		};
193		result[@enumToInt(Feature.experimental_zvlsseg)] = .{
194		.llvm_name = "experimental-zvlsseg",
195		.description = "'Zvlsseg' (Vector segment load/store instructions)",
196		.dependencies = featureSet(&[_]Feature{
197		.experimental_v,
198		}),
199		};
200	163	result[@enumToInt(Feature.f)] = .{
201	164	.llvm_name = "f",
202	165	.description = "'F' (Single-Precision Floating-Point)",
...	...	@@ -377,6 +340,268 @@ pub const all_features = blk: {
377	340	.description = "Enable save/restore.",
378	341	.dependencies = featureSet(&[_]Feature{}),
379	342	};
	343	result[@enumToInt(Feature.v)] = .{
	344	.llvm_name = "v",
	345	.description = "'V' (Vector Extension for Application Processors)",
	346	.dependencies = featureSet(&[_]Feature{
	347	.d,
	348	.zvl128b,
	349	}),
	350	};
	351	result[@enumToInt(Feature.zba)] = .{
	352	.llvm_name = "zba",
	353	.description = "'Zba' (Address Generation Instructions)",
	354	.dependencies = featureSet(&[_]Feature{}),
	355	};
	356	result[@enumToInt(Feature.zbb)] = .{
	357	.llvm_name = "zbb",
	358	.description = "'Zbb' (Basic Bit-Manipulation)",
	359	.dependencies = featureSet(&[_]Feature{}),
	360	};
	361	result[@enumToInt(Feature.zbc)] = .{
	362	.llvm_name = "zbc",
	363	.description = "'Zbc' (Carry-Less Multiplication)",
	364	.dependencies = featureSet(&[_]Feature{}),
	365	};
	366	result[@enumToInt(Feature.zbkb)] = .{
	367	.llvm_name = "zbkb",
	368	.description = "'Zbkb' (Bitmanip instructions for Cryptography)",
	369	.dependencies = featureSet(&[_]Feature{}),
	370	};
	371	result[@enumToInt(Feature.zbkc)] = .{
	372	.llvm_name = "zbkc",
	373	.description = "'Zbkc' (Carry-less multiply instructions for Cryptography)",
	374	.dependencies = featureSet(&[_]Feature{}),
	375	};
	376	result[@enumToInt(Feature.zbkx)] = .{
	377	.llvm_name = "zbkx",
	378	.description = "'Zbkx' (Crossbar permutation instructions)",
	379	.dependencies = featureSet(&[_]Feature{}),
	380	};
	381	result[@enumToInt(Feature.zbs)] = .{
	382	.llvm_name = "zbs",
	383	.description = "'Zbs' (Single-Bit Instructions)",
	384	.dependencies = featureSet(&[_]Feature{}),
	385	};
	386	result[@enumToInt(Feature.zdinx)] = .{
	387	.llvm_name = "zdinx",
	388	.description = "'Zdinx' (Double in Integer)",
	389	.dependencies = featureSet(&[_]Feature{
	390	.zfinx,
	391	}),
	392	};
	393	result[@enumToInt(Feature.zfh)] = .{
	394	.llvm_name = "zfh",
	395	.description = "'Zfh' (Half-Precision Floating-Point)",
	396	.dependencies = featureSet(&[_]Feature{
	397	.f,
	398	}),
	399	};
	400	result[@enumToInt(Feature.zfhmin)] = .{
	401	.llvm_name = "zfhmin",
	402	.description = "'Zfhmin' (Half-Precision Floating-Point Minimal)",
	403	.dependencies = featureSet(&[_]Feature{
	404	.f,
	405	}),
	406	};
	407	result[@enumToInt(Feature.zfinx)] = .{
	408	.llvm_name = "zfinx",
	409	.description = "'Zfinx' (Float in Integer)",
	410	.dependencies = featureSet(&[_]Feature{}),
	411	};
	412	result[@enumToInt(Feature.zhinx)] = .{
	413	.llvm_name = "zhinx",
	414	.description = "'Zhinx' (Half Float in Integer)",
	415	.dependencies = featureSet(&[_]Feature{
	416	.zfinx,
	417	}),
	418	};
	419	result[@enumToInt(Feature.zhinxmin)] = .{
	420	.llvm_name = "zhinxmin",
	421	.description = "'Zhinxmin' (Half Float in Integer Minimal)",
	422	.dependencies = featureSet(&[_]Feature{
	423	.zfinx,
	424	}),
	425	};
	426	result[@enumToInt(Feature.zk)] = .{
	427	.llvm_name = "zk",
	428	.description = "'Zk' (Standard scalar cryptography extension)",
	429	.dependencies = featureSet(&[_]Feature{
	430	.zkn,
	431	.zkr,
	432	.zkt,
	433	}),
	434	};
	435	result[@enumToInt(Feature.zkn)] = .{
	436	.llvm_name = "zkn",
	437	.description = "'Zkn' (NIST Algorithm Suite)",
	438	.dependencies = featureSet(&[_]Feature{
	439	.zbkb,
	440	.zbkc,
	441	.zbkx,
	442	.zknd,
	443	.zkne,
	444	.zknh,
	445	}),
	446	};
	447	result[@enumToInt(Feature.zknd)] = .{
	448	.llvm_name = "zknd",
	449	.description = "'Zknd' (NIST Suite: AES Decryption)",
	450	.dependencies = featureSet(&[_]Feature{}),
	451	};
	452	result[@enumToInt(Feature.zkne)] = .{
	453	.llvm_name = "zkne",
	454	.description = "'Zkne' (NIST Suite: AES Encryption)",
	455	.dependencies = featureSet(&[_]Feature{}),
	456	};
	457	result[@enumToInt(Feature.zknh)] = .{
	458	.llvm_name = "zknh",
	459	.description = "'Zknh' (NIST Suite: Hash Function Instructions)",
	460	.dependencies = featureSet(&[_]Feature{}),
	461	};
	462	result[@enumToInt(Feature.zkr)] = .{
	463	.llvm_name = "zkr",
	464	.description = "'Zkr' (Entropy Source Extension)",
	465	.dependencies = featureSet(&[_]Feature{}),
	466	};
	467	result[@enumToInt(Feature.zks)] = .{
	468	.llvm_name = "zks",
	469	.description = "'Zks' (ShangMi Algorithm Suite)",
	470	.dependencies = featureSet(&[_]Feature{
	471	.zbkb,
	472	.zbkc,
	473	.zbkx,
	474	.zksed,
	475	.zksh,
	476	}),
	477	};
	478	result[@enumToInt(Feature.zksed)] = .{
	479	.llvm_name = "zksed",
	480	.description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)",
	481	.dependencies = featureSet(&[_]Feature{}),
	482	};
	483	result[@enumToInt(Feature.zksh)] = .{
	484	.llvm_name = "zksh",
	485	.description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)",
	486	.dependencies = featureSet(&[_]Feature{}),
	487	};
	488	result[@enumToInt(Feature.zkt)] = .{
	489	.llvm_name = "zkt",
	490	.description = "'Zkt' (Data Independent Execution Latency)",
	491	.dependencies = featureSet(&[_]Feature{}),
	492	};
	493	result[@enumToInt(Feature.zve32f)] = .{
	494	.llvm_name = "zve32f",
	495	.description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)",
	496	.dependencies = featureSet(&[_]Feature{
	497	.zve32x,
	498	}),
	499	};
	500	result[@enumToInt(Feature.zve32x)] = .{
	501	.llvm_name = "zve32x",
	502	.description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)",
	503	.dependencies = featureSet(&[_]Feature{
	504	.zvl32b,
	505	}),
	506	};
	507	result[@enumToInt(Feature.zve64d)] = .{
	508	.llvm_name = "zve64d",
	509	.description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)",
	510	.dependencies = featureSet(&[_]Feature{
	511	.zve64f,
	512	}),
	513	};
	514	result[@enumToInt(Feature.zve64f)] = .{
	515	.llvm_name = "zve64f",
	516	.description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)",
	517	.dependencies = featureSet(&[_]Feature{
	518	.zve32f,
	519	.zve64x,
	520	}),
	521	};
	522	result[@enumToInt(Feature.zve64x)] = .{
	523	.llvm_name = "zve64x",
	524	.description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)",
	525	.dependencies = featureSet(&[_]Feature{
	526	.zve32x,
	527	.zvl64b,
	528	}),
	529	};
	530	result[@enumToInt(Feature.zvl1024b)] = .{
	531	.llvm_name = "zvl1024b",
	532	.description = "'Zvl' (Minimum Vector Length) 1024",
	533	.dependencies = featureSet(&[_]Feature{
	534	.zvl512b,
	535	}),
	536	};
	537	result[@enumToInt(Feature.zvl128b)] = .{
	538	.llvm_name = "zvl128b",
	539	.description = "'Zvl' (Minimum Vector Length) 128",
	540	.dependencies = featureSet(&[_]Feature{
	541	.zvl64b,
	542	}),
	543	};
	544	result[@enumToInt(Feature.zvl16384b)] = .{
	545	.llvm_name = "zvl16384b",
	546	.description = "'Zvl' (Minimum Vector Length) 16384",
	547	.dependencies = featureSet(&[_]Feature{
	548	.zvl8192b,
	549	}),
	550	};
	551	result[@enumToInt(Feature.zvl2048b)] = .{
	552	.llvm_name = "zvl2048b",
	553	.description = "'Zvl' (Minimum Vector Length) 2048",
	554	.dependencies = featureSet(&[_]Feature{
	555	.zvl1024b,
	556	}),
	557	};
	558	result[@enumToInt(Feature.zvl256b)] = .{
	559	.llvm_name = "zvl256b",
	560	.description = "'Zvl' (Minimum Vector Length) 256",
	561	.dependencies = featureSet(&[_]Feature{
	562	.zvl128b,
	563	}),
	564	};
	565	result[@enumToInt(Feature.zvl32768b)] = .{
	566	.llvm_name = "zvl32768b",
	567	.description = "'Zvl' (Minimum Vector Length) 32768",
	568	.dependencies = featureSet(&[_]Feature{
	569	.zvl16384b,
	570	}),
	571	};
	572	result[@enumToInt(Feature.zvl32b)] = .{
	573	.llvm_name = "zvl32b",
	574	.description = "'Zvl' (Minimum Vector Length) 32",
	575	.dependencies = featureSet(&[_]Feature{}),
	576	};
	577	result[@enumToInt(Feature.zvl4096b)] = .{
	578	.llvm_name = "zvl4096b",
	579	.description = "'Zvl' (Minimum Vector Length) 4096",
	580	.dependencies = featureSet(&[_]Feature{
	581	.zvl2048b,
	582	}),
	583	};
	584	result[@enumToInt(Feature.zvl512b)] = .{
	585	.llvm_name = "zvl512b",
	586	.description = "'Zvl' (Minimum Vector Length) 512",
	587	.dependencies = featureSet(&[_]Feature{
	588	.zvl256b,
	589	}),
	590	};
	591	result[@enumToInt(Feature.zvl64b)] = .{
	592	.llvm_name = "zvl64b",
	593	.description = "'Zvl' (Minimum Vector Length) 64",
	594	.dependencies = featureSet(&[_]Feature{
	595	.zvl32b,
	596	}),
	597	};
	598	result[@enumToInt(Feature.zvl8192b)] = .{
	599	.llvm_name = "zvl8192b",
	600	.description = "'Zvl' (Minimum Vector Length) 8192",
	601	.dependencies = featureSet(&[_]Feature{
	602	.zvl4096b,
	603	}),
	604	};
380	605	const ti = @typeInfo(Feature);
381	606	for (result) \|*elem, i\| {
382	607	elem.index = i;
...	...	@@ -443,6 +668,33 @@ pub const cpu = struct {
443	668	.@"64bit",
444	669	}),
445	670	};
	671	pub const sifive_e20 = CpuModel{
	672	.name = "sifive_e20",
	673	.llvm_name = "sifive-e20",
	674	.features = featureSet(&[_]Feature{
	675	.c,
	676	.m,
	677	}),
	678	};
	679	pub const sifive_e21 = CpuModel{
	680	.name = "sifive_e21",
	681	.llvm_name = "sifive-e21",
	682	.features = featureSet(&[_]Feature{
	683	.a,
	684	.c,
	685	.m,
	686	}),
	687	};
	688	pub const sifive_e24 = CpuModel{
	689	.name = "sifive_e24",
	690	.llvm_name = "sifive-e24",
	691	.features = featureSet(&[_]Feature{
	692	.a,
	693	.c,
	694	.f,
	695	.m,
	696	}),
	697	};
446	698	pub const sifive_e31 = CpuModel{
447	699	.name = "sifive_e31",
448	700	.llvm_name = "sifive-e31",
...	...	@@ -452,6 +704,16 @@ pub const cpu = struct {
452	704	.m,
453	705	}),
454	706	};
	707	pub const sifive_e34 = CpuModel{
	708	.name = "sifive_e34",
	709	.llvm_name = "sifive-e34",
	710	.features = featureSet(&[_]Feature{
	711	.a,
	712	.c,
	713	.f,
	714	.m,
	715	}),
	716	};
455	717	pub const sifive_e76 = CpuModel{
456	718	.name = "sifive_e76",
457	719	.llvm_name = "sifive-e76",
...	...	@@ -462,6 +724,48 @@ pub const cpu = struct {
462	724	.m,
463	725	}),
464	726	};
	727	pub const sifive_s21 = CpuModel{
	728	.name = "sifive_s21",
	729	.llvm_name = "sifive-s21",
	730	.features = featureSet(&[_]Feature{
	731	.@"64bit",
	732	.a,
	733	.c,
	734	.m,
	735	}),
	736	};
	737	pub const sifive_s51 = CpuModel{
	738	.name = "sifive_s51",
	739	.llvm_name = "sifive-s51",
	740	.features = featureSet(&[_]Feature{
	741	.@"64bit",
	742	.a,
	743	.c,
	744	.m,
	745	}),
	746	};
	747	pub const sifive_s54 = CpuModel{
	748	.name = "sifive_s54",
	749	.llvm_name = "sifive-s54",
	750	.features = featureSet(&[_]Feature{
	751	.@"64bit",
	752	.a,
	753	.c,
	754	.d,
	755	.m,
	756	}),
	757	};
	758	pub const sifive_s76 = CpuModel{
	759	.name = "sifive_s76",
	760	.llvm_name = "sifive-s76",
	761	.features = featureSet(&[_]Feature{
	762	.@"64bit",
	763	.a,
	764	.c,
	765	.d,
	766	.m,
	767	}),
	768	};
465	769	pub const sifive_u54 = CpuModel{
466	770	.name = "sifive_u54",
467	771	.llvm_name = "sifive-u54",

lib/std/target/wasm.zig+6

...	...	@@ -12,6 +12,7 @@ pub const Feature = enum {
12	12	mutable_globals,
13	13	nontrapping_fptoint,
14	14	reference_types,
	15	relaxed_simd,
15	16	sign_ext,
16	17	simd128,
17	18	tail_call,
...	...	@@ -61,6 +62,11 @@ pub const all_features = blk: {
61	62	.description = "Enable reference types",
62	63	.dependencies = featureSet(&[_]Feature{}),
63	64	};
	65	result[@enumToInt(Feature.relaxed_simd)] = .{
	66	.llvm_name = "relaxed-simd",
	67	.description = "Enable relaxed-simd instructions",
	68	.dependencies = featureSet(&[_]Feature{}),
	69	};
64	70	result[@enumToInt(Feature.sign_ext)] = .{
65	71	.llvm_name = "sign-ext",
66	72	.description = "Enable sign extension operators",

lib/std/target/x86.zig+116-41

...	...	@@ -24,6 +24,7 @@ pub const Feature = enum {
24	24	avx512dq,
25	25	avx512er,
26	26	avx512f,
	27	avx512fp16,
27	28	avx512ifma,
28	29	avx512pf,
29	30	avx512vbmi,
...	...	@@ -41,6 +42,7 @@ pub const Feature = enum {
41	42	clwb,
42	43	clzero,
43	44	cmov,
	45	crc32,
44	46	cx16,
45	47	cx8,
46	48	enqcmd,
...	...	@@ -130,11 +132,13 @@ pub const Feature = enum {
130	132	sse4a,
131	133	sse_unaligned_mem,
132	134	ssse3,
	135	tagged_globals,
133	136	tbm,
134	137	tsxldtrk,
135	138	uintr,
136	139	use_aa,
137	140	use_glm_div_sqrt_costs,
	141	use_slm_arith_costs,
138	142	vaes,
139	143	vpclmulqdq,
140	144	vzeroupper,
...	...	@@ -283,6 +287,15 @@ pub const all_features = blk: {
283	287	.fma,
284	288	}),
285	289	};
	290	result[@enumToInt(Feature.avx512fp16)] = .{
	291	.llvm_name = "avx512fp16",
	292	.description = "Support 16-bit floating point",
	293	.dependencies = featureSet(&[_]Feature{
	294	.avx512bw,
	295	.avx512dq,
	296	.avx512vl,
	297	}),
	298	};
286	299	result[@enumToInt(Feature.avx512ifma)] = .{
287	300	.llvm_name = "avx512ifma",
288	301	.description = "Enable AVX-512 Integer Fused Multiple-Add",
...	...	@@ -386,6 +399,11 @@ pub const all_features = blk: {
386	399	.description = "Enable conditional move instructions",
387	400	.dependencies = featureSet(&[_]Feature{}),
388	401	};
	402	result[@enumToInt(Feature.crc32)] = .{
	403	.llvm_name = "crc32",
	404	.description = "Enable SSE 4.2 CRC32 instruction",
	405	.dependencies = featureSet(&[_]Feature{}),
	406	};
389	407	result[@enumToInt(Feature.cx16)] = .{
390	408	.llvm_name = "cx16",
391	409	.description = "64-bit with cmpxchg16b",
...	...	@@ -867,6 +885,11 @@ pub const all_features = blk: {
867	885	.sse3,
868	886	}),
869	887	};
	888	result[@enumToInt(Feature.tagged_globals)] = .{
	889	.llvm_name = "tagged-globals",
	890	.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.",
	891	.dependencies = featureSet(&[_]Feature{}),
	892	};
870	893	result[@enumToInt(Feature.tbm)] = .{
871	894	.llvm_name = "tbm",
872	895	.description = "Enable TBM instructions",
...	...	@@ -892,6 +915,11 @@ pub const all_features = blk: {
892	915	.description = "Use Goldmont specific floating point div/sqrt costs",
893	916	.dependencies = featureSet(&[_]Feature{}),
894	917	};
	918	result[@enumToInt(Feature.use_slm_arith_costs)] = .{
	919	.llvm_name = "use-slm-arith-costs",
	920	.description = "Use Silvermont specific arithmetic costs",
	921	.dependencies = featureSet(&[_]Feature{}),
	922	};
895	923	result[@enumToInt(Feature.vaes)] = .{
896	924	.llvm_name = "vaes",
897	925	.description = "Promote selected AES instructions to AVX512/AVX registers",
...	...	@@ -977,45 +1005,6 @@ pub const all_features = blk: {
977	1005	};
978	1006
979	1007	pub const cpu = struct {
980		pub const _i386 = CpuModel{
981		.name = "_i386",
982		.llvm_name = "i386",
983		.features = featureSet(&[_]Feature{
984		.slow_unaligned_mem_16,
985		.vzeroupper,
986		.x87,
987		}),
988		};
989		pub const _i486 = CpuModel{
990		.name = "_i486",
991		.llvm_name = "i486",
992		.features = featureSet(&[_]Feature{
993		.slow_unaligned_mem_16,
994		.vzeroupper,
995		.x87,
996		}),
997		};
998		pub const _i586 = CpuModel{
999		.name = "_i586",
1000		.llvm_name = "i586",
1001		.features = featureSet(&[_]Feature{
1002		.cx8,
1003		.slow_unaligned_mem_16,
1004		.vzeroupper,
1005		.x87,
1006		}),
1007		};
1008		pub const _i686 = CpuModel{
1009		.name = "_i686",
1010		.llvm_name = "i686",
1011		.features = featureSet(&[_]Feature{
1012		.cmov,
1013		.cx8,
1014		.slow_unaligned_mem_16,
1015		.vzeroupper,
1016		.x87,
1017		}),
1018		};
1019	1008	pub const alderlake = CpuModel{
1020	1009	.name = "alderlake",
1021	1010	.llvm_name = "alderlake",
...	...	@@ -1029,6 +1018,7 @@ pub const cpu = struct {
1029	1018	.clflushopt,
1030	1019	.clwb,
1031	1020	.cmov,
	1021	.crc32,
1032	1022	.cx16,
1033	1023	.f16c,
1034	1024	.false_deps_popcnt,
...	...	@@ -1281,6 +1271,7 @@ pub const cpu = struct {
1281	1271	.aes,
1282	1272	.branchfusion,
1283	1273	.cmov,
	1274	.crc32,
1284	1275	.cx16,
1285	1276	.fast_11bytenop,
1286	1277	.fast_scalar_shift_masks,
...	...	@@ -1309,6 +1300,7 @@ pub const cpu = struct {
1309	1300	.bmi,
1310	1301	.branchfusion,
1311	1302	.cmov,
	1303	.crc32,
1312	1304	.cx16,
1313	1305	.f16c,
1314	1306	.fast_11bytenop,
...	...	@@ -1342,6 +1334,7 @@ pub const cpu = struct {
1342	1334	.bmi,
1343	1335	.branchfusion,
1344	1336	.cmov,
	1337	.crc32,
1345	1338	.cx16,
1346	1339	.f16c,
1347	1340	.fast_11bytenop,
...	...	@@ -1378,6 +1371,7 @@ pub const cpu = struct {
1378	1371	.bmi2,
1379	1372	.branchfusion,
1380	1373	.cmov,
	1374	.crc32,
1381	1375	.cx16,
1382	1376	.f16c,
1383	1377	.fast_11bytenop,
...	...	@@ -1440,6 +1434,7 @@ pub const cpu = struct {
1440	1434	.bmi,
1441	1435	.bmi2,
1442	1436	.cmov,
	1437	.crc32,
1443	1438	.cx16,
1444	1439	.ermsb,
1445	1440	.f16c,
...	...	@@ -1504,6 +1499,7 @@ pub const cpu = struct {
1504	1499	.aes,
1505	1500	.bmi,
1506	1501	.cmov,
	1502	.crc32,
1507	1503	.cx16,
1508	1504	.f16c,
1509	1505	.fast_15bytenop,
...	...	@@ -1568,6 +1564,7 @@ pub const cpu = struct {
1568	1564	.bmi2,
1569	1565	.clflushopt,
1570	1566	.cmov,
	1567	.crc32,
1571	1568	.cx16,
1572	1569	.ermsb,
1573	1570	.fast_15bytenop,
...	...	@@ -1620,6 +1617,7 @@ pub const cpu = struct {
1620	1617	.clflushopt,
1621	1618	.clwb,
1622	1619	.cmov,
	1620	.crc32,
1623	1621	.cx16,
1624	1622	.ermsb,
1625	1623	.false_deps_popcnt,
...	...	@@ -1672,6 +1670,7 @@ pub const cpu = struct {
1672	1670	.clflushopt,
1673	1671	.clwb,
1674	1672	.cmov,
	1673	.crc32,
1675	1674	.cx16,
1676	1675	.ermsb,
1677	1676	.false_deps_popcnt,
...	...	@@ -1734,6 +1733,7 @@ pub const cpu = struct {
1734	1733	.bmi,
1735	1734	.bmi2,
1736	1735	.cmov,
	1736	.crc32,
1737	1737	.cx16,
1738	1738	.ermsb,
1739	1739	.f16c,
...	...	@@ -1770,6 +1770,7 @@ pub const cpu = struct {
1770	1770	.features = featureSet(&[_]Feature{
1771	1771	.@"64bit",
1772	1772	.cmov,
	1773	.crc32,
1773	1774	.cx16,
1774	1775	.f16c,
1775	1776	.false_deps_popcnt,
...	...	@@ -1799,6 +1800,7 @@ pub const cpu = struct {
1799	1800	.features = featureSet(&[_]Feature{
1800	1801	.@"64bit",
1801	1802	.cmov,
	1803	.crc32,
1802	1804	.cx16,
1803	1805	.fxsr,
1804	1806	.macrofusion,
...	...	@@ -1818,6 +1820,7 @@ pub const cpu = struct {
1818	1820	.@"64bit",
1819	1821	.avx,
1820	1822	.cmov,
	1823	.crc32,
1821	1824	.cx16,
1822	1825	.false_deps_popcnt,
1823	1826	.fast_15bytenop,
...	...	@@ -1871,6 +1874,7 @@ pub const cpu = struct {
1871	1874	.aes,
1872	1875	.clflushopt,
1873	1876	.cmov,
	1877	.crc32,
1874	1878	.cx16,
1875	1879	.false_deps_popcnt,
1876	1880	.fast_movbe,
...	...	@@ -1906,6 +1910,7 @@ pub const cpu = struct {
1906	1910	.aes,
1907	1911	.clflushopt,
1908	1912	.cmov,
	1913	.crc32,
1909	1914	.cx16,
1910	1915	.fast_movbe,
1911	1916	.fsgsbase,
...	...	@@ -1943,6 +1948,7 @@ pub const cpu = struct {
1943	1948	.bmi,
1944	1949	.bmi2,
1945	1950	.cmov,
	1951	.crc32,
1946	1952	.cx16,
1947	1953	.ermsb,
1948	1954	.f16c,
...	...	@@ -1973,6 +1979,45 @@ pub const cpu = struct {
1973	1979	.xsaveopt,
1974	1980	}),
1975	1981	};
	1982	pub const @"i386" = CpuModel{
	1983	.name = "i386",
	1984	.llvm_name = "i386",
	1985	.features = featureSet(&[_]Feature{
	1986	.slow_unaligned_mem_16,
	1987	.vzeroupper,
	1988	.x87,
	1989	}),
	1990	};
	1991	pub const @"i486" = CpuModel{
	1992	.name = "i486",
	1993	.llvm_name = "i486",
	1994	.features = featureSet(&[_]Feature{
	1995	.slow_unaligned_mem_16,
	1996	.vzeroupper,
	1997	.x87,
	1998	}),
	1999	};
	2000	pub const @"i586" = CpuModel{
	2001	.name = "i586",
	2002	.llvm_name = "i586",
	2003	.features = featureSet(&[_]Feature{
	2004	.cx8,
	2005	.slow_unaligned_mem_16,
	2006	.vzeroupper,
	2007	.x87,
	2008	}),
	2009	};
	2010	pub const @"i686" = CpuModel{
	2011	.name = "i686",
	2012	.llvm_name = "i686",
	2013	.features = featureSet(&[_]Feature{
	2014	.cmov,
	2015	.cx8,
	2016	.slow_unaligned_mem_16,
	2017	.vzeroupper,
	2018	.x87,
	2019	}),
	2020	};
1976	2021	pub const icelake_client = CpuModel{
1977	2022	.name = "icelake_client",
1978	2023	.llvm_name = "icelake-client",
...	...	@@ -1992,6 +2037,7 @@ pub const cpu = struct {
1992	2037	.bmi2,
1993	2038	.clflushopt,
1994	2039	.cmov,
	2040	.crc32,
1995	2041	.cx16,
1996	2042	.ermsb,
1997	2043	.fast_15bytenop,
...	...	@@ -2051,6 +2097,7 @@ pub const cpu = struct {
2051	2097	.clflushopt,
2052	2098	.clwb,
2053	2099	.cmov,
	2100	.crc32,
2054	2101	.cx16,
2055	2102	.ermsb,
2056	2103	.fast_15bytenop,
...	...	@@ -2098,6 +2145,7 @@ pub const cpu = struct {
2098	2145	.features = featureSet(&[_]Feature{
2099	2146	.@"64bit",
2100	2147	.cmov,
	2148	.crc32,
2101	2149	.cx16,
2102	2150	.f16c,
2103	2151	.false_deps_popcnt,
...	...	@@ -2203,6 +2251,7 @@ pub const cpu = struct {
2203	2251	.bmi,
2204	2252	.bmi2,
2205	2253	.cmov,
	2254	.crc32,
2206	2255	.cx16,
2207	2256	.fast_gather,
2208	2257	.fast_movbe,
...	...	@@ -2243,6 +2292,7 @@ pub const cpu = struct {
2243	2292	.bmi,
2244	2293	.bmi2,
2245	2294	.cmov,
	2295	.crc32,
2246	2296	.cx16,
2247	2297	.fast_gather,
2248	2298	.fast_movbe,
...	...	@@ -2285,6 +2335,7 @@ pub const cpu = struct {
2285	2335	.features = featureSet(&[_]Feature{
2286	2336	.@"64bit",
2287	2337	.cmov,
	2338	.crc32,
2288	2339	.cx16,
2289	2340	.fxsr,
2290	2341	.macrofusion,
...	...	@@ -2523,6 +2574,7 @@ pub const cpu = struct {
2523	2574	.bmi2,
2524	2575	.clflushopt,
2525	2576	.cmov,
	2577	.crc32,
2526	2578	.cx16,
2527	2579	.ermsb,
2528	2580	.fast_15bytenop,
...	...	@@ -2569,6 +2621,7 @@ pub const cpu = struct {
2569	2621	.@"64bit",
2570	2622	.avx,
2571	2623	.cmov,
	2624	.crc32,
2572	2625	.cx16,
2573	2626	.false_deps_popcnt,
2574	2627	.fast_15bytenop,
...	...	@@ -2600,11 +2653,10 @@ pub const cpu = struct {
2600	2653	.avx512bf16,
2601	2654	.avx512bitalg,
2602	2655	.avx512cd,
2603		.avx512dq,
	2656	.avx512fp16,
2604	2657	.avx512ifma,
2605	2658	.avx512vbmi,
2606	2659	.avx512vbmi2,
2607		.avx512vl,
2608	2660	.avx512vnni,
2609	2661	.avx512vp2intersect,
2610	2662	.avx512vpopcntdq,
...	...	@@ -2615,6 +2667,7 @@ pub const cpu = struct {
2615	2667	.clflushopt,
2616	2668	.clwb,
2617	2669	.cmov,
	2670	.crc32,
2618	2671	.cx16,
2619	2672	.enqcmd,
2620	2673	.ermsb,
...	...	@@ -2671,6 +2724,7 @@ pub const cpu = struct {
2671	2724	.features = featureSet(&[_]Feature{
2672	2725	.@"64bit",
2673	2726	.cmov,
	2727	.crc32,
2674	2728	.cx16,
2675	2729	.false_deps_popcnt,
2676	2730	.fast_7bytenop,
...	...	@@ -2690,6 +2744,7 @@ pub const cpu = struct {
2690	2744	.slow_pmulld,
2691	2745	.slow_two_mem_ops,
2692	2746	.sse4_2,
	2747	.use_slm_arith_costs,
2693	2748	.vzeroupper,
2694	2749	.x87,
2695	2750	}),
...	...	@@ -2710,6 +2765,7 @@ pub const cpu = struct {
2710	2765	.clflushopt,
2711	2766	.clwb,
2712	2767	.cmov,
	2768	.crc32,
2713	2769	.cx16,
2714	2770	.ermsb,
2715	2771	.false_deps_popcnt,
...	...	@@ -2757,6 +2813,7 @@ pub const cpu = struct {
2757	2813	.bmi2,
2758	2814	.clflushopt,
2759	2815	.cmov,
	2816	.crc32,
2760	2817	.cx16,
2761	2818	.ermsb,
2762	2819	.f16c,
...	...	@@ -2808,6 +2865,7 @@ pub const cpu = struct {
2808	2865	.clflushopt,
2809	2866	.clwb,
2810	2867	.cmov,
	2868	.crc32,
2811	2869	.cx16,
2812	2870	.ermsb,
2813	2871	.false_deps_popcnt,
...	...	@@ -2849,6 +2907,7 @@ pub const cpu = struct {
2849	2907	.features = featureSet(&[_]Feature{
2850	2908	.@"64bit",
2851	2909	.cmov,
	2910	.crc32,
2852	2911	.cx16,
2853	2912	.false_deps_popcnt,
2854	2913	.fast_7bytenop,
...	...	@@ -2868,6 +2927,7 @@ pub const cpu = struct {
2868	2927	.slow_pmulld,
2869	2928	.slow_two_mem_ops,
2870	2929	.sse4_2,
	2930	.use_slm_arith_costs,
2871	2931	.vzeroupper,
2872	2932	.x87,
2873	2933	}),
...	...	@@ -2893,6 +2953,7 @@ pub const cpu = struct {
2893	2953	.clflushopt,
2894	2954	.clwb,
2895	2955	.cmov,
	2956	.crc32,
2896	2957	.cx16,
2897	2958	.ermsb,
2898	2959	.fast_15bytenop,
...	...	@@ -2944,6 +3005,7 @@ pub const cpu = struct {
2944	3005	.clflushopt,
2945	3006	.clwb,
2946	3007	.cmov,
	3008	.crc32,
2947	3009	.cx16,
2948	3010	.fast_movbe,
2949	3011	.fsgsbase,
...	...	@@ -2979,6 +3041,7 @@ pub const cpu = struct {
2979	3041	.features = featureSet(&[_]Feature{
2980	3042	.@"64bit",
2981	3043	.cmov,
	3044	.crc32,
2982	3045	.cx16,
2983	3046	.fxsr,
2984	3047	.macrofusion,
...	...	@@ -3037,6 +3100,7 @@ pub const cpu = struct {
3037	3100	.features = featureSet(&[_]Feature{
3038	3101	.@"64bit",
3039	3102	.cmov,
	3103	.crc32,
3040	3104	.cx16,
3041	3105	.false_deps_popcnt,
3042	3106	.fast_15bytenop,
...	...	@@ -3065,6 +3129,7 @@ pub const cpu = struct {
3065	3129	.bmi,
3066	3130	.bmi2,
3067	3131	.cmov,
	3132	.crc32,
3068	3133	.cx16,
3069	3134	.f16c,
3070	3135	.false_deps_lzcnt_tzcnt,
...	...	@@ -3102,6 +3167,7 @@ pub const cpu = struct {
3102	3167	.bmi,
3103	3168	.bmi2,
3104	3169	.cmov,
	3170	.crc32,
3105	3171	.cx16,
3106	3172	.false_deps_popcnt,
3107	3173	.fast_15bytenop,
...	...	@@ -3156,13 +3222,16 @@ pub const cpu = struct {
3156	3222	.clflushopt,
3157	3223	.clzero,
3158	3224	.cmov,
	3225	.crc32,
3159	3226	.cx16,
3160	3227	.f16c,
3161	3228	.fast_15bytenop,
3162	3229	.fast_bextr,
3163	3230	.fast_lzcnt,
3164	3231	.fast_movbe,
	3232	.fast_scalar_fsqrt,
3165	3233	.fast_scalar_shift_masks,
	3234	.fast_vector_fsqrt,
3166	3235	.fma,
3167	3236	.fsgsbase,
3168	3237	.fxsr,
...	...	@@ -3202,13 +3271,16 @@ pub const cpu = struct {
3202	3271	.clwb,
3203	3272	.clzero,
3204	3273	.cmov,
	3274	.crc32,
3205	3275	.cx16,
3206	3276	.f16c,
3207	3277	.fast_15bytenop,
3208	3278	.fast_bextr,
3209	3279	.fast_lzcnt,
3210	3280	.fast_movbe,
	3281	.fast_scalar_fsqrt,
3211	3282	.fast_scalar_shift_masks,
	3283	.fast_vector_fsqrt,
3212	3284	.fma,
3213	3285	.fsgsbase,
3214	3286	.fxsr,
...	...	@@ -3249,14 +3321,17 @@ pub const cpu = struct {
3249	3321	.clwb,
3250	3322	.clzero,
3251	3323	.cmov,
	3324	.crc32,
3252	3325	.cx16,
3253	3326	.f16c,
3254	3327	.fast_15bytenop,
3255	3328	.fast_bextr,
3256	3329	.fast_lzcnt,
3257	3330	.fast_movbe,
	3331	.fast_scalar_fsqrt,
3258	3332	.fast_scalar_shift_masks,
3259	3333	.fast_variable_perlane_shuffle,
	3334	.fast_vector_fsqrt,
3260	3335	.fma,
3261	3336	.fsgsbase,
3262	3337	.fsrm,

lib/std/zig/fmt.zig+13-1

...	...	@@ -32,7 +32,18 @@ pub fn isValidId(bytes: []const u8) bool {
32	32	else => return false,
33	33	}
34	34	}
35		return std.zig.Token.getKeyword(bytes) == null;
	35	if (std.zig.Token.getKeyword(bytes) != null) return false;
	36	if (bytes.len >= 2) switch (bytes[0]) {
	37	'u', 'i' => {
	38	for (bytes[1..]) \|b\| switch (b) {
	39	'0'...'9' => continue,
	40	else => break,
	41	} else return false;
	42	},
	43	else => {},
	44	};
	45
	46	return true;
36	47	}
37	48
38	49	test "isValidId" {
...	...	@@ -41,6 +52,7 @@ test "isValidId" {
41	52	try std.testing.expect(!isValidId("a b c"));
42	53	try std.testing.expect(!isValidId("3d"));
43	54	try std.testing.expect(!isValidId("enum"));
	55	try std.testing.expect(!isValidId("i386"));
44	56	}
45	57
46	58	/// Print the string as escaped contents of a double quoted or single-quoted string.

lib/std/zig/system/x86.zig+3-3

...	...	@@ -80,11 +80,11 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32
80	80	}
81	81	switch (family) {
82	82	3 => {
83		cpu.model = &Target.x86.cpu._i386;
	83	cpu.model = &Target.x86.cpu.i386;
84	84	return;
85	85	},
86	86	4 => {
87		cpu.model = &Target.x86.cpu._i486;
	87	cpu.model = &Target.x86.cpu.i486;
88	88	return;
89	89	},
90	90	5 => {
...	...	@@ -229,7 +229,7 @@ fn detectAMDProcessor(cpu: *Target.Cpu, family: u32, model: u32) void {
229	229	// This is very unscientific, and not necessarily correct.
230	230	switch (family) {
231	231	4 => {
232		cpu.model = &Target.x86.cpu._i486;
	232	cpu.model = &Target.x86.cpu.i486;
233	233	return;
234	234	},
235	235	5 => {

tools/update_cpu_features.zig+88-25

...	...	@@ -50,6 +50,10 @@ const llvm_targets = [_]LlvmTarget{
50	50	.td_name = "AArch64.td",
51	51	.branch_quota = 2000,
52	52	.feature_overrides = &.{
	53	.{
	54	.llvm_name = "v8a",
	55	.extra_deps = &.{ "fp_armv8", "neon" },
	56	},
53	57	.{
54	58	.llvm_name = "CONTEXTIDREL2",
55	59	.zig_name = "contextidr_el2",
...	...	@@ -57,19 +61,23 @@ const llvm_targets = [_]LlvmTarget{
57	61	},
58	62	.{
59	63	.llvm_name = "neoversee1",
60		.zig_name = "neoverse_e1",
	64	.flatten = true,
61	65	},
62	66	.{
63	67	.llvm_name = "neoversen1",
64		.zig_name = "neoverse_n1",
	68	.flatten = true,
65	69	},
66	70	.{
67	71	.llvm_name = "neoversen2",
68		.zig_name = "neoverse_n2",
	72	.flatten = true,
69	73	},
70	74	.{
71	75	.llvm_name = "neoversev1",
72		.zig_name = "neoverse_v1",
	76	.flatten = true,
	77	},
	78	.{
	79	.llvm_name = "neoverse512tvb",
	80	.flatten = true,
73	81	},
74	82	.{
75	83	.llvm_name = "exynosm3",
...	...	@@ -126,6 +134,10 @@ const llvm_targets = [_]LlvmTarget{
126	134	.llvm_name = "a77",
127	135	.flatten = true,
128	136	},
	137	.{
	138	.llvm_name = "apple-a7",
	139	.flatten = true,
	140	},
129	141	.{
130	142	.llvm_name = "apple-a10",
131	143	.flatten = true,
...	...	@@ -134,10 +146,22 @@ const llvm_targets = [_]LlvmTarget{
134	146	.llvm_name = "apple-a11",
135	147	.flatten = true,
136	148	},
	149	.{
	150	.llvm_name = "apple-a12",
	151	.flatten = true,
	152	},
	153	.{
	154	.llvm_name = "apple-a13",
	155	.flatten = true,
	156	},
137	157	.{
138	158	.llvm_name = "apple-a14",
139	159	.flatten = true,
140	160	},
	161	.{
	162	.llvm_name = "apple-a7-sysreg",
	163	.flatten = true,
	164	},
141	165	.{
142	166	.llvm_name = "carmel",
143	167	.flatten = true,
...	...	@@ -150,6 +174,10 @@ const llvm_targets = [_]LlvmTarget{
150	174	.llvm_name = "cortex-x1",
151	175	.flatten = true,
152	176	},
	177	.{
	178	.llvm_name = "cortex-x2",
	179	.flatten = true,
	180	},
153	181	.{
154	182	.llvm_name = "falkor",
155	183	.flatten = true,
...	...	@@ -196,12 +224,9 @@ const llvm_targets = [_]LlvmTarget{
196	224	.llvm_name = "tsv110",
197	225	.flatten = true,
198	226	},
199		},
200		.extra_features = &.{
201	227	.{
202		.zig_name = "v8a",
203		.desc = "Support ARM v8a instructions",
204		.deps = &.{ "fp_armv8", "neon" },
	228	.llvm_name = "ampere1",
	229	.flatten = true,
205	230	},
206	231	},
207	232	.extra_cpus = &.{
...	...	@@ -309,6 +334,14 @@ const llvm_targets = [_]LlvmTarget{
309	334	.llvm_name = "cortex-a78",
310	335	.flatten = true,
311	336	},
	337	.{
	338	.llvm_name = "cortex-a710",
	339	.flatten = true,
	340	},
	341	.{
	342	.llvm_name = "cortex-x1c",
	343	.flatten = true,
	344	},
312	345	.{
313	346	.llvm_name = "r5",
314	347	.flatten = true,
...	...	@@ -542,6 +575,10 @@ const llvm_targets = [_]LlvmTarget{
542	575	.llvm_name = "armv8.7-a",
543	576	.zig_name = "v8_7a",
544	577	},
	578	.{
	579	.llvm_name = "armv8.8-a",
	580	.zig_name = "v8_8a",
	581	},
545	582	.{
546	583	.llvm_name = "armv8-a",
547	584	.zig_name = "v8a",
...	...	@@ -558,6 +595,22 @@ const llvm_targets = [_]LlvmTarget{
558	595	.llvm_name = "armv8-r",
559	596	.zig_name = "v8r",
560	597	},
	598	.{
	599	.llvm_name = "armv9.1-a",
	600	.zig_name = "v9_1a",
	601	},
	602	.{
	603	.llvm_name = "armv9.2-a",
	604	.zig_name = "v9_2a",
	605	},
	606	.{
	607	.llvm_name = "armv9.3-a",
	608	.zig_name = "v9_3a",
	609	},
	610	.{
	611	.llvm_name = "armv9-a",
	612	.zig_name = "v9a",
	613	},
561	614	.{
562	615	.llvm_name = "v4t",
563	616	.zig_name = "has_v4t",
...	...	@@ -638,6 +691,26 @@ const llvm_targets = [_]LlvmTarget{
638	691	.llvm_name = "v8.7a",
639	692	.zig_name = "has_v8_7a",
640	693	},
	694	.{
	695	.llvm_name = "v8.8a",
	696	.zig_name = "has_v8_8a",
	697	},
	698	.{
	699	.llvm_name = "v9a",
	700	.zig_name = "has_v9a",
	701	},
	702	.{
	703	.llvm_name = "v9.1a",
	704	.zig_name = "has_v9_1a",
	705	},
	706	.{
	707	.llvm_name = "v9.2a",
	708	.zig_name = "has_v9_2a",
	709	},
	710	.{
	711	.llvm_name = "v9.3a",
	712	.zig_name = "has_v9_3a",
	713	},
641	714	},
642	715	},
643	716	.{
...	...	@@ -695,6 +768,12 @@ const llvm_targets = [_]LlvmTarget{
695	768	.zig_name = "riscv",
696	769	.llvm_name = "RISCV",
697	770	.td_name = "RISCV.td",
	771	.feature_overrides = &.{
	772	.{
	773	.llvm_name = "sifive7",
	774	.flatten = true,
	775	},
	776	},
698	777	.extra_cpus = &.{
699	778	.{
700	779	.llvm_name = null,
...	...	@@ -737,22 +816,6 @@ const llvm_targets = [_]LlvmTarget{
737	816	.llvm_name = "64bit-mode",
738	817	.omit = true,
739	818	},
740		.{
741		.llvm_name = "i386",
742		.zig_name = "_i386",
743		},
744		.{
745		.llvm_name = "i486",
746		.zig_name = "_i486",
747		},
748		.{
749		.llvm_name = "i586",
750		.zig_name = "_i586",
751		},
752		.{
753		.llvm_name = "i686",
754		.zig_name = "_i686",
755		},
756	819	.{
757	820	.llvm_name = "lakemont",
758	821	.extra_deps = &.{"soft_float"},