authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-05-23 13:54:35+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-05-23 13:54:35+02:00
logd591145f5dcab5aba1ab6aa65e7a57663f3a0f19
tree21ee8cc8028f32635d69c7a9771d8743bbabd902
parenta06f23c8ea132a4e45dcc396a35826aa1b0e0aea
parent952642dd6085744761f02a5410aa108c36b3323c

Merge pull request 'add `m88k-openbsd` target info and stack tracing + some bonus commits' (#35429) from alexrp/zig:m88k into master

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/35429

13 files changed, 239 insertions(+), 14 deletions(-)

lib/std/Target.zig+21-8
...@@ -751,6 +751,7 @@ pub const kvx = @import("Target/kvx.zig");...@@ -751,6 +751,7 @@ pub const kvx = @import("Target/kvx.zig");
751pub const lanai = @import("Target/lanai.zig");751pub const lanai = @import("Target/lanai.zig");
752pub const loongarch = @import("Target/loongarch.zig");752pub const loongarch = @import("Target/loongarch.zig");
753pub const m68k = @import("Target/m68k.zig");753pub const m68k = @import("Target/m68k.zig");
754pub const m88k = @import("Target/generic.zig");
754pub const microblaze = @import("Target/generic.zig");755pub const microblaze = @import("Target/generic.zig");
755pub const mips = @import("Target/mips.zig");756pub const mips = @import("Target/mips.zig");
756pub const msp430 = @import("Target/msp430.zig");757pub const msp430 = @import("Target/msp430.zig");
...@@ -1091,6 +1092,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM {...@@ -1091,6 +1092,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM {
1091 .kvx => .KVX,1092 .kvx => .KVX,
1092 .lanai => .LANAI,1093 .lanai => .LANAI,
1093 .loongarch32, .loongarch64 => .LOONGARCH,1094 .loongarch32, .loongarch64 => .LOONGARCH,
1095 .m88k => .@"88K",
1094 .m68k => .@"68K",1096 .m68k => .@"68K",
1095 .microblaze, .microblazeel => .MICROBLAZE,1097 .microblaze, .microblazeel => .MICROBLAZE,
1096 .mips, .mips64, .mipsel, .mips64el => .MIPS,1098 .mips, .mips64, .mipsel, .mips64el => .MIPS,
...@@ -1154,6 +1156,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {...@@ -1154,6 +1156,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {
1154 .kalimba,1156 .kalimba,
1155 .kvx,1157 .kvx,
1156 .lanai,1158 .lanai,
1159 .m88k,
1157 .m68k,1160 .m68k,
1158 .microblaze,1161 .microblaze,
1159 .microblazeel,1162 .microblazeel,
...@@ -1364,6 +1367,7 @@ pub const Cpu = struct {...@@ -1364,6 +1367,7 @@ pub const Cpu = struct {
1364 loongarch32,1367 loongarch32,
1365 loongarch64,1368 loongarch64,
1366 m68k,1369 m68k,
1370 m88k,
1367 microblaze,1371 microblaze,
1368 microblazeel,1372 microblazeel,
1369 mips,1373 mips,
...@@ -1439,6 +1443,7 @@ pub const Cpu = struct {...@@ -1439,6 +1443,7 @@ pub const Cpu = struct {
1439 lanai,1443 lanai,
1440 loongarch,1444 loongarch,
1441 m68k,1445 m68k,
1446 m88k,
1442 microblaze,1447 microblaze,
1443 mips,1448 mips,
1444 msp430,1449 msp430,
...@@ -1477,6 +1482,7 @@ pub const Cpu = struct {...@@ -1477,6 +1482,7 @@ pub const Cpu = struct {
1477 .lanai => .lanai,1482 .lanai => .lanai,
1478 .loongarch32, .loongarch64 => .loongarch,1483 .loongarch32, .loongarch64 => .loongarch,
1479 .m68k => .m68k,1484 .m68k => .m68k,
1485 .m88k => .m88k,
1480 .microblaze, .microblazeel => .microblaze,1486 .microblaze, .microblazeel => .microblaze,
1481 .mips, .mipsel, .mips64, .mips64el => .mips,1487 .mips, .mipsel, .mips64, .mips64el => .mips,
1482 .msp430 => .msp430,1488 .msp430 => .msp430,
...@@ -1710,6 +1716,7 @@ pub const Cpu = struct {...@@ -1710,6 +1716,7 @@ pub const Cpu = struct {
1710 .hppa64,1716 .hppa64,
1711 .lanai,1717 .lanai,
1712 .m68k,1718 .m68k,
1719 .m88k,
1713 .microblaze,1720 .microblaze,
1714 .mips,1721 .mips,
1715 .mips64,1722 .mips64,
...@@ -1922,6 +1929,9 @@ pub const Cpu = struct {...@@ -1922,6 +1929,9 @@ pub const Cpu = struct {
1922 .m68k_interrupt,1929 .m68k_interrupt,
1923 => &.{.m68k},1930 => &.{.m68k},
19241931
1932 .m88k_sysv,
1933 => &.{.m88k},
1934
1925 .microblaze_std,1935 .microblaze_std,
1926 .microblaze_interrupt,1936 .microblaze_interrupt,
1927 => &.{ .microblaze, .microblazeel },1937 => &.{ .microblaze, .microblazeel },
...@@ -2554,6 +2564,7 @@ pub const DynamicLinker = struct {...@@ -2554,6 +2564,7 @@ pub const DynamicLinker = struct {
2554 .m68k,2564 .m68k,
2555 .microblaze,2565 .microblaze,
2556 .microblazeel,2566 .microblazeel,
2567 .or1k,
2557 .powerpc64,2568 .powerpc64,
2558 .powerpc64le,2569 .powerpc64le,
2559 .s390x,2570 .s390x,
...@@ -2631,8 +2642,6 @@ pub const DynamicLinker = struct {...@@ -2631,8 +2642,6 @@ pub const DynamicLinker = struct {
26312642
2632 .arm,2643 .arm,
2633 .armeb,2644 .armeb,
2634 .thumb,
2635 .thumbeb,
2636 => initFmt("/lib/ld-linux{s}.so.3", .{switch (abi) {2645 => initFmt("/lib/ld-linux{s}.so.3", .{switch (abi) {
2637 .gnueabi => "",2646 .gnueabi => "",
2638 .gnueabihf => "-armhf",2647 .gnueabihf => "-armhf",
...@@ -2641,6 +2650,7 @@ pub const DynamicLinker = struct {...@@ -2641,6 +2650,7 @@ pub const DynamicLinker = struct {
26412650
2642 .aarch64,2651 .aarch64,
2643 .aarch64_be,2652 .aarch64_be,
2653 .or1k,
2644 => |arch| if (abi == .gnu) initFmt("/lib/ld-linux-{s}.so.1", .{@tagName(arch)}) else none,2654 => |arch| if (abi == .gnu) initFmt("/lib/ld-linux-{s}.so.1", .{@tagName(arch)}) else none,
26452655
2646 // TODO: `-be` architecture support.2656 // TODO: `-be` architecture support.
...@@ -2803,6 +2813,7 @@ pub const DynamicLinker = struct {...@@ -2803,6 +2813,7 @@ pub const DynamicLinker = struct {
2803 .arm,2813 .arm,
2804 .aarch64,2814 .aarch64,
2805 .hppa,2815 .hppa,
2816 .m88k,
2806 .mips64,2817 .mips64,
2807 .mips64el,2818 .mips64el,
2808 .powerpc,2819 .powerpc,
...@@ -2910,6 +2921,7 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 {...@@ -2910,6 +2921,7 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 {
2910 .lanai,2921 .lanai,
2911 .loongarch32,2922 .loongarch32,
2912 .m68k,2923 .m68k,
2924 .m88k,
2913 .microblaze,2925 .microblaze,
2914 .microblazeel,2926 .microblazeel,
2915 .mips,2927 .mips,
...@@ -3495,6 +3507,7 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {...@@ -3495,6 +3507,7 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {
3495 .hppa,3507 .hppa,
3496 .lanai,3508 .lanai,
3497 .m68k,3509 .m68k,
3510 .m88k,
3498 .mips,3511 .mips,
3499 .mipsel,3512 .mipsel,
3500 .nvptx,3513 .nvptx,
...@@ -3604,6 +3617,7 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {...@@ -3604,6 +3617,7 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
3604 .hppa,3617 .hppa,
3605 .lanai,3618 .lanai,
3606 .m68k,3619 .m68k,
3620 .m88k,
3607 .mips,3621 .mips,
3608 .mipsel,3622 .mipsel,
3609 .nvptx,3623 .nvptx,
...@@ -3675,6 +3689,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {...@@ -3675,6 +3689,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {
3675 .lanai,3689 .lanai,
3676 .loongarch32,3690 .loongarch32,
3677 .m68k,3691 .m68k,
3692 .m88k,
3678 .mips,3693 .mips,
3679 .mipsel,3694 .mipsel,
3680 .powerpc,3695 .powerpc,
...@@ -3723,7 +3738,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3723,7 +3738,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3723 .x86_64 => switch (target.os.tag) {3738 .x86_64 => switch (target.os.tag) {
3724 .windows, .uefi => .{ .x86_64_win = .{} },3739 .windows, .uefi => .{ .x86_64_win = .{} },
3725 else => switch (target.abi) {3740 else => switch (target.abi) {
3726 .gnuabin32, .muslabin32 => .{ .x86_64_x32 = .{} },3741 .gnux32, .muslx32 => .{ .x86_64_x32 = .{} },
3727 else => .{ .x86_64_sysv = .{} },3742 else => .{ .x86_64_sysv = .{} },
3728 },3743 },
3729 },3744 },
...@@ -3752,7 +3767,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3752,7 +3767,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3752 .riscv32, .riscv32be => .{ .riscv32_ilp32 = .{} },3767 .riscv32, .riscv32be => .{ .riscv32_ilp32 = .{} },
3753 .sparc64 => .{ .sparc64_sysv = .{} },3768 .sparc64 => .{ .sparc64_sysv = .{} },
3754 .sparc => .{ .sparc_sysv = .{} },3769 .sparc => .{ .sparc_sysv = .{} },
3755 .powerpc64 => if (target.abi.isGnu())3770 .powerpc64 => if (target.os.tag == .ps3 or target.abi.isGnu())
3756 .{ .powerpc64_elf = .{} }3771 .{ .powerpc64_elf = .{} }
3757 else3772 else
3758 .{ .powerpc64_elf_v2 = .{} },3773 .{ .powerpc64_elf_v2 = .{} },
...@@ -3774,10 +3789,8 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3774,10 +3789,8 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3774 .lanai => .{ .lanai_sysv = .{} },3789 .lanai => .{ .lanai_sysv = .{} },
3775 .loongarch64 => .{ .loongarch64_lp64 = .{} },3790 .loongarch64 => .{ .loongarch64_lp64 = .{} },
3776 .loongarch32 => .{ .loongarch32_ilp32 = .{} },3791 .loongarch32 => .{ .loongarch32_ilp32 = .{} },
3777 .m68k => if (target.abi.isGnu() or target.abi.isMusl())3792 .m68k => .{ .m68k_gnu = .{} },
3778 .{ .m68k_gnu = .{} }3793 .m88k => .{ .m88k_sysv = .{} },
3779 else
3780 .{ .m68k_sysv = .{} },
3781 .microblaze, .microblazeel => .{ .microblaze_std = .{} },3794 .microblaze, .microblazeel => .{ .microblaze_std = .{} },
3782 .msp430 => .{ .msp430_eabi = .{} },3795 .msp430 => .{ .msp430_eabi = .{} },
3783 .or1k => .{ .or1k_sysv = .{} },3796 .or1k => .{ .or1k_sysv = .{} },
lib/std/atomic.zig+2
...@@ -442,10 +442,12 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {...@@ -442,10 +442,12 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {
442 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sparc/include/asm/cache.h#L14442 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sparc/include/asm/cache.h#L14
443 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/microblaze/include/asm/cache.h#L15443 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/microblaze/include/asm/cache.h#L15
444 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sh/include/cpu-sh4/cpu/cache.h#L10444 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sh/include/cpu-sh4/cpu/cache.h#L10
445 // - https://github.com/openbsd/src/blob/1957873d2063db11dab780eca75b5e629d1e838d/sys/arch/m88k/m88k/atomic.S#L22
445 .arm,446 .arm,
446 .armeb,447 .armeb,
447 .thumb,448 .thumb,
448 .thumbeb,449 .thumbeb,
450 .m88k,
449 .microblaze,451 .microblaze,
450 .microblazeel,452 .microblazeel,
451 .mips,453 .mips,
lib/std/debug/Dwarf.zig+3
...@@ -1445,6 +1445,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {...@@ -1445,6 +1445,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
1445 .lanai => 2,1445 .lanai => 2,
1446 .loongarch32, .loongarch64 => 64,1446 .loongarch32, .loongarch64 => 64,
1447 .m68k => 26,1447 .m68k => 26,
1448 .m88k => 64,
1448 .mips, .mipsel, .mips64, .mips64el => 66,1449 .mips, .mipsel, .mips64, .mips64el => 66,
1449 .or1k => 35,1450 .or1k => 35,
1450 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,1451 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
...@@ -1470,6 +1471,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {...@@ -1470,6 +1471,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
1470 .lanai => 5,1471 .lanai => 5,
1471 .loongarch32, .loongarch64 => 22,1472 .loongarch32, .loongarch64 => 22,
1472 .m68k => 14,1473 .m68k => 14,
1474 .m88k => 30,
1473 .mips, .mipsel, .mips64, .mips64el => 30,1475 .mips, .mipsel, .mips64, .mips64el => 30,
1474 .or1k => 2,1476 .or1k => 2,
1475 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,1477 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
...@@ -1495,6 +1497,7 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {...@@ -1495,6 +1497,7 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
1495 .lanai => 4,1497 .lanai => 4,
1496 .loongarch32, .loongarch64 => 3,1498 .loongarch32, .loongarch64 => 3,
1497 .m68k => 15,1499 .m68k => 15,
1500 .m88k => 31,
1498 .mips, .mipsel, .mips64, .mips64el => 29,1501 .mips, .mipsel, .mips64, .mips64el => 29,
1499 .or1k => 1,1502 .or1k => 1,
1500 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,1503 .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
lib/std/debug/SelfInfo/Elf.zig+1
...@@ -161,6 +161,7 @@ pub const can_unwind: bool = s: {...@@ -161,6 +161,7 @@ pub const can_unwind: bool = s: {
161 // Not supported yet: arm161 // Not supported yet: arm
162 .openbsd => &.{162 .openbsd => &.{
163 .aarch64,163 .aarch64,
164 .m88k,
164 .mips64,165 .mips64,
165 .mips64el,166 .mips64el,
166 .riscv64,167 .riscv64,
lib/std/debug/cpu_context.zig+94-3
...@@ -14,6 +14,7 @@ else switch (native_arch) {...@@ -14,6 +14,7 @@ else switch (native_arch) {
14 .lanai => Lanai,14 .lanai => Lanai,
15 .loongarch32, .loongarch64 => LoongArch,15 .loongarch32, .loongarch64 => LoongArch,
16 .m68k => M68k,16 .m68k => M68k,
17 .m88k => M88k,
17 .mips, .mipsel, .mips64, .mips64el => Mips,18 .mips, .mipsel, .mips64, .mips64el => Mips,
18 .or1k => Or1k,19 .or1k => Or1k,
19 .powerpc, .powerpcle, .powerpc64, .powerpc64le => Powerpc,20 .powerpc, .powerpcle, .powerpc64, .powerpc64le => Powerpc,
...@@ -62,6 +63,13 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {...@@ -62,6 +63,13 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
62 },63 },
63 .pc = @truncate(uc.mcontext.pc),64 .pc = @truncate(uc.mcontext.pc),
64 };65 };
66 } else if (native_arch == .m88k and native_os == .openbsd) {
67 // OpenBSD makes no effort to clear the V and E bits of the SXIP register when presenting it
68 // to user space, so we need to do that here.
69 return .{
70 .r = uc.mcontext.r,
71 .xip = uc.mcontext.xip & ~@as(u32, 0b11),
72 };
65 } else if (native_arch.isMIPS32() and native_os == .linux) {73 } else if (native_arch.isMIPS32() and native_os == .linux) {
66 // The O32 kABI uses 64-bit fields for some reason.74 // The O32 kABI uses 64-bit fields for some reason.
67 return .{75 return .{
...@@ -894,6 +902,75 @@ const M68k = extern struct {...@@ -894,6 +902,75 @@ const M68k = extern struct {
894 }902 }
895};903};
896904
905/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
906const M88k = extern struct {
907 /// The numbered general-purpose registers r0 - r31.
908 r: [32]u32,
909 xip: u32,
910
911 pub inline fn current() M88k {
912 var ctx: M88k = undefined;
913 asm volatile (
914 \\ st %%r0, %%r2, 0
915 \\ st %%r1, %%r2, 4
916 \\ st %%r2, %%r2, 8
917 \\ st %%r3, %%r2, 12
918 \\ st %%r4, %%r2, 16
919 \\ st %%r5, %%r2, 20
920 \\ st %%r6, %%r2, 24
921 \\ st %%r7, %%r2, 28
922 \\ st %%r8, %%r2, 32
923 \\ st %%r9, %%r2, 36
924 \\ st %%r10, %%r2, 40
925 \\ st %%r11, %%r2, 44
926 \\ st %%r12, %%r2, 48
927 \\ st %%r13, %%r2, 52
928 \\ st %%r14, %%r2, 56
929 \\ st %%r15, %%r2, 60
930 \\ st %%r16, %%r2, 64
931 \\ st %%r17, %%r2, 68
932 \\ st %%r18, %%r2, 72
933 \\ st %%r19, %%r2, 76
934 \\ st %%r20, %%r2, 80
935 \\ st %%r21, %%r2, 84
936 \\ st %%r22, %%r2, 88
937 \\ st %%r23, %%r2, 92
938 \\ st %%r24, %%r2, 96
939 \\ st %%r25, %%r2, 100
940 \\ st %%r26, %%r2, 104
941 \\ st %%r27, %%r2, 108
942 \\ st %%r28, %%r2, 112
943 \\ st %%r29, %%r2, 116
944 \\ st %%r30, %%r2, 120
945 \\ st %%r31, %%r2, 124
946 \\ bsr.n 1f
947 \\1:
948 \\ st %%r1, %%r2, 128
949 :
950 : [ctx] "{r2}" (&ctx),
951 : .{ .r1 = true, .memory = true });
952 return ctx;
953 }
954
955 pub fn getFp(ctx: *const M88k) u32 {
956 return ctx.r[30];
957 }
958 pub fn getPc(ctx: *const M88k) u32 {
959 return ctx.xip;
960 }
961
962 pub fn dwarfRegisterBytes(ctx: *M88k, register_num: u16) DwarfRegisterError![]u8 {
963 switch (register_num) {
964 0...31 => return @ptrCast(&ctx.r[register_num]),
965 64 => return @ptrCast(&ctx.xip),
966
967 32...63 => return error.UnsupportedRegister, // x0 - x31
968
969 else => return error.InvalidRegister,
970 }
971 }
972};
973
897/// This is an `extern struct` so that inline assembly in `current` can use field offsets.974/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
898const Mips = extern struct {975const Mips = extern struct {
899 /// The numbered general-purpose registers r0 - r31. r0 must be zero.976 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
...@@ -2330,9 +2407,11 @@ const signal_ucontext_t = switch (native_os) {...@@ -2330,9 +2407,11 @@ const signal_ucontext_t = switch (native_os) {
2330 .alpha => extern struct {2407 .alpha => extern struct {
2331 _cookie: i64,2408 _cookie: i64,
2332 _mask: i64,2409 _mask: i64,
2333 pc: u64,2410 mcontext: extern struct {
2334 _ps: i64,2411 pc: u64,
2335 r: [32]u64,2412 _ps: i64,
2413 r: [32]u64,
2414 },
2336 },2415 },
2337 // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/arm/include/signal.h2416 // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/arm/include/signal.h
2338 .arm => extern struct {2417 .arm => extern struct {
...@@ -2361,6 +2440,18 @@ const signal_ucontext_t = switch (native_os) {...@@ -2361,6 +2440,18 @@ const signal_ucontext_t = switch (native_os) {
2361 r23_29: [7]u32,2440 r23_29: [7]u32,
2362 r31: u32,2441 r31: u32,
2363 },2442 },
2443 // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/m88k/include/signal.h
2444 .m88k => extern struct {
2445 _cookie: i32,
2446 _mask: i32,
2447 mcontext: extern struct {
2448 r: [32]u32,
2449 _epsr: u32,
2450 _fpsr: u32,
2451 _fpcr: u32,
2452 xip: u32,
2453 },
2454 },
2364 // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/mips64/include/signal.h2455 // https://github.com/openbsd/src/blob/42468faed8369d07ae49ae02dd71ec34f59b66cd/sys/arch/mips64/include/signal.h
2365 .mips64, .mips64el => extern struct {2456 .mips64, .mips64el => extern struct {
2366 _cookie: i64,2457 _cookie: i64,
lib/std/heap.zig+2
...@@ -608,6 +608,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {...@@ -608,6 +608,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {
608 .hppa => 4 << 10,608 .hppa => 4 << 10,
609 .x86, .x86_64 => 4 << 10,609 .x86, .x86_64 => 4 << 10,
610 .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,610 .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,
611 .m88k => 4 << 10,
611 .mips64, .mips64el => 4 << 10,612 .mips64, .mips64el => 4 << 10,
612 .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,613 .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,
613 .riscv64 => 4 << 10,614 .riscv64 => 4 << 10,
...@@ -771,6 +772,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {...@@ -771,6 +772,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {
771 .hppa => 4 << 10,772 .hppa => 4 << 10,
772 .x86, .x86_64 => 4 << 10,773 .x86, .x86_64 => 4 << 10,
773 .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,774 .thumb, .thumbeb, .arm, .armeb, .aarch64, .aarch64_be => 4 << 10,
775 .m88k => 4 << 10,
774 .mips64, .mips64el => 16 << 10,776 .mips64, .mips64el => 16 << 10,
775 .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,777 .powerpc, .powerpc64, .powerpc64le, .powerpcle => 4 << 10,
776 .riscv64 => 4 << 10,778 .riscv64 => 4 << 10,
lib/std/lang.zig+2
...@@ -292,6 +292,8 @@ pub const CallingConvention = union(enum(u8)) {...@@ -292,6 +292,8 @@ pub const CallingConvention = union(enum(u8)) {
292 m68k_rtd: CommonOptions,292 m68k_rtd: CommonOptions,
293 m68k_interrupt: CommonOptions,293 m68k_interrupt: CommonOptions,
294294
295 m88k_sysv: CommonOptions,
296
295 /// The standard `microblaze`/`microblazeel` calling convention.297 /// The standard `microblaze`/`microblazeel` calling convention.
296 microblaze_std: CommonOptions,298 microblaze_std: CommonOptions,
297 microblaze_interrupt: MicroblazeInterruptOptions,299 microblaze_interrupt: MicroblazeInterruptOptions,
lib/std/lang/assembly.zig+71
...@@ -1553,6 +1553,77 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {...@@ -1553,6 +1553,77 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
1553 r14: bool = false,1553 r14: bool = false,
1554 r15: bool = false,1554 r15: bool = false,
1555 },1555 },
1556 .m88k => packed struct {
1557 /// Whether the inline assembly code may perform stores to memory
1558 /// addresses other than those derived from input pointer provenance.
1559 memory: bool = false,
1560
1561 r0: bool = false,
1562 r1: bool = false,
1563 r2: bool = false,
1564 r3: bool = false,
1565 r4: bool = false,
1566 r5: bool = false,
1567 r6: bool = false,
1568 r7: bool = false,
1569 r8: bool = false,
1570 r9: bool = false,
1571 r10: bool = false,
1572 r11: bool = false,
1573 r12: bool = false,
1574 r13: bool = false,
1575 r14: bool = false,
1576 r15: bool = false,
1577 r16: bool = false,
1578 r17: bool = false,
1579 r18: bool = false,
1580 r19: bool = false,
1581 r20: bool = false,
1582 r21: bool = false,
1583 r22: bool = false,
1584 r23: bool = false,
1585 r24: bool = false,
1586 r25: bool = false,
1587 r26: bool = false,
1588 r27: bool = false,
1589 r28: bool = false,
1590 r29: bool = false,
1591 r30: bool = false,
1592 r31: bool = false,
1593
1594 x0: bool = false,
1595 x1: bool = false,
1596 x2: bool = false,
1597 x3: bool = false,
1598 x4: bool = false,
1599 x5: bool = false,
1600 x6: bool = false,
1601 x7: bool = false,
1602 x8: bool = false,
1603 x9: bool = false,
1604 x10: bool = false,
1605 x11: bool = false,
1606 x12: bool = false,
1607 x13: bool = false,
1608 x14: bool = false,
1609 x15: bool = false,
1610 x16: bool = false,
1611 x17: bool = false,
1612 x18: bool = false,
1613 x19: bool = false,
1614 x20: bool = false,
1615 x21: bool = false,
1616 x22: bool = false,
1617 x23: bool = false,
1618 x24: bool = false,
1619 x25: bool = false,
1620 x26: bool = false,
1621 x27: bool = false,
1622 x28: bool = false,
1623 x29: bool = false,
1624 x30: bool = false,
1625 x31: bool = false,
1626 },
1556 .m68k => packed struct {1627 .m68k => packed struct {
1557 /// Whether the inline assembly code may perform stores to memory1628 /// Whether the inline assembly code may perform stores to memory
1558 /// addresses other than those derived from input pointer provenance.1629 /// addresses other than those derived from input pointer provenance.
lib/std/start.zig+11
...@@ -169,6 +169,7 @@ fn _start() callconv(.naked) noreturn {...@@ -169,6 +169,7 @@ fn _start() callconv(.naked) noreturn {
169 .kvx => ".cfi_undefined r14",169 .kvx => ".cfi_undefined r14",
170 .loongarch32, .loongarch64 => ".cfi_undefined 1",170 .loongarch32, .loongarch64 => ".cfi_undefined 1",
171 .m68k => ".cfi_undefined %%pc",171 .m68k => ".cfi_undefined %%pc",
172 .m88k => ".cfi_undefined %%r1",
172 .microblaze, .microblazeel => ".cfi_undefined r15",173 .microblaze, .microblazeel => ".cfi_undefined r15",
173 .mips, .mipsel, .mips64, .mips64el => ".cfi_undefined $ra",174 .mips, .mipsel, .mips64, .mips64el => ".cfi_undefined $ra",
174 .or1k => ".cfi_undefined r9",175 .or1k => ".cfi_undefined r9",
...@@ -331,6 +332,16 @@ fn _start() callconv(.naked) noreturn {...@@ -331,6 +332,16 @@ fn _start() callconv(.naked) noreturn {
331 \\ lea %[posixCallMainAndExit] - . - 8, %%a0332 \\ lea %[posixCallMainAndExit] - . - 8, %%a0
332 \\ jsr (%%pc, %%a0)333 \\ jsr (%%pc, %%a0)
333 ,334 ,
335 .m88k =>
336 // r1 = LR, r30 = FP, r31 = SP
337 \\ or %%r0, %%r0, %%r0
338 \\ or %%r0, %%r0, %%r0
339 \\ or %%30, %%r0, %%r0
340 \\ or %%r1, %%r0, %%r0
341 \\ or %%r2, %%r31, %%r0
342 \\ clr %%r31, %%r31, 4<0>
343 \\ br.n %[posixCallMainAndExit]
344 ,
334 .microblaze, .microblazeel =>345 .microblaze, .microblazeel =>
335 // r1 = SP, r15 = LR, r19 = FP, r20 = GP346 // r1 = SP, r15 = LR, r19 = FP, r20 = GP
336 \\ ori r15, r0, r0347 \\ ori r15, r0, r0
lib/zig.h+24-2
...@@ -21,6 +21,8 @@...@@ -21,6 +21,8 @@
2121
22#if defined(__aarch64__) || (defined(zig_msvc) && defined(_M_ARM64))22#if defined(__aarch64__) || (defined(zig_msvc) && defined(_M_ARM64))
23#define zig_aarch6423#define zig_aarch64
24#elif defined(__alpha__)
25#define zig_alpha
24#elif defined(__thumb__) || (defined(zig_msvc) && defined(_M_ARM))26#elif defined(__thumb__) || (defined(zig_msvc) && defined(_M_ARM))
25#define zig_thumb27#define zig_thumb
26#define zig_arm28#define zig_arm
...@@ -36,6 +38,10 @@...@@ -36,6 +38,10 @@
36#elif defined(__loongarch64)38#elif defined(__loongarch64)
37#define zig_loongarch6439#define zig_loongarch64
38#define zig_loongarch40#define zig_loongarch
41#elif defined(__m68k__)
42#define zig_m68k
43#elif defined(__m88k__)
44#define zig_m88k
39#elif defined(__mips64)45#elif defined(__mips64)
40#define zig_mips6446#define zig_mips64
41#define zig_mips47#define zig_mips
...@@ -79,6 +85,8 @@...@@ -79,6 +85,8 @@
79#elif defined(__I86__)85#elif defined(__I86__)
80#define zig_x86_1686#define zig_x86_16
81#define zig_x8687#define zig_x86
88#elif defined(__xtensa__)
89#define zig_xtensa
82#elif defined (__ez80)90#elif defined (__ez80)
83#define zig_ez8091#define zig_ez80
84#define zig_z8092#define zig_z80
...@@ -390,7 +398,9 @@...@@ -390,7 +398,9 @@
390398
391#elif defined(zig_gnuc_asm)399#elif defined(zig_gnuc_asm)
392400
393#if defined(zig_thumb)401#if defined(zig_alpha)
402#define zig_trap() __asm__ volatile("call_pal 0x000000")
403#elif defined(zig_thumb)
394#define zig_trap() __asm__ volatile("udf #0xfe")404#define zig_trap() __asm__ volatile("udf #0xfe")
395#elif defined(zig_arm) || defined(zig_aarch64)405#elif defined(zig_arm) || defined(zig_aarch64)
396#define zig_trap() __asm__ volatile("udf #0xfdee")406#define zig_trap() __asm__ volatile("udf #0xfdee")
...@@ -398,6 +408,10 @@...@@ -398,6 +408,10 @@
398#define zig_trap() __asm__ volatile("r27:26 = memd(#0xbadc0fee)")408#define zig_trap() __asm__ volatile("r27:26 = memd(#0xbadc0fee)")
399#elif defined(zig_kvx) || defined(zig_loongarch) || defined(zig_powerpc)409#elif defined(zig_kvx) || defined(zig_loongarch) || defined(zig_powerpc)
400#define zig_trap() __asm__ volatile(".word 0x0")410#define zig_trap() __asm__ volatile(".word 0x0")
411#elif defined(zig_m68k)
412#define zig_trap() __asm__ volatile("illegal")
413#elif defined(zig_m88k)
414#define zig_trap() __asm__ volatile("tb0 0, %%r0, 511")
401#elif defined(zig_mips)415#elif defined(zig_mips)
402#define zig_trap() __asm__ volatile(".word 0x3d")416#define zig_trap() __asm__ volatile(".word 0x3d")
403#elif defined(zig_or1k)417#elif defined(zig_or1k)
...@@ -412,6 +426,8 @@...@@ -412,6 +426,8 @@
412#define zig_trap() __asm__ volatile("int $0x3")426#define zig_trap() __asm__ volatile("int $0x3")
413#elif defined(zig_x86)427#elif defined(zig_x86)
414#define zig_trap() __asm__ volatile("ud2")428#define zig_trap() __asm__ volatile("ud2")
429#elif defined(zig_xtensa)
430#define zig_trap() __asm__ volatile("ill")
415#elif defined(zig_z80)431#elif defined(zig_z80)
416#define zig_trap() __asm__ volatile("rst 00h")432#define zig_trap() __asm__ volatile("rst 00h")
417#else433#else
...@@ -428,7 +444,9 @@...@@ -428,7 +444,9 @@
428#define zig_breakpoint() __debugbreak()444#define zig_breakpoint() __debugbreak()
429#elif defined(zig_gnuc_asm)445#elif defined(zig_gnuc_asm)
430446
431#if defined(zig_arm)447#if defined(zig_alpha)
448#define zig_breakpoint() __asm__ volatile("call_pal 0x000080")
449#elif defined(zig_arm)
432#define zig_breakpoint() __asm__ volatile("bkpt #0x0")450#define zig_breakpoint() __asm__ volatile("bkpt #0x0")
433#elif defined(zig_aarch64)451#elif defined(zig_aarch64)
434#define zig_breakpoint() __asm__ volatile("brk #0xf000")452#define zig_breakpoint() __asm__ volatile("brk #0xf000")
...@@ -436,6 +454,8 @@...@@ -436,6 +454,8 @@
436#define zig_breakpoint() __asm__ volatile("brkpt")454#define zig_breakpoint() __asm__ volatile("brkpt")
437#elif defined(zig_kvx) || defined(zig_loongarch)455#elif defined(zig_kvx) || defined(zig_loongarch)
438#define zig_breakpoint() __asm__ volatile("break 0x0")456#define zig_breakpoint() __asm__ volatile("break 0x0")
457#elif defined(zig_m88k)
458#define zig_breakpoint() __asm__ volatile("illop1")
439#elif defined(zig_mips)459#elif defined(zig_mips)
440#define zig_breakpoint() __asm__ volatile("break")460#define zig_breakpoint() __asm__ volatile("break")
441#elif defined(zig_or1k)461#elif defined(zig_or1k)
...@@ -450,6 +470,8 @@...@@ -450,6 +470,8 @@
450#define zig_breakpoint() __asm__ volatile("ta 0x1")470#define zig_breakpoint() __asm__ volatile("ta 0x1")
451#elif defined(zig_x86)471#elif defined(zig_x86)
452#define zig_breakpoint() __asm__ volatile("int $0x3")472#define zig_breakpoint() __asm__ volatile("int $0x3")
473#elif defined(zig_xtensa)
474#define zig_breakpoint() __asm__ volatile("break 1, 1")
453#else475#else
454#define zig_breakpoint() zig_breakpoint_unavailable476#define zig_breakpoint() zig_breakpoint_unavailable
455#endif477#endif
src/Sema.zig+1
...@@ -8558,6 +8558,7 @@ const calling_conventions_supporting_var_args = [_]std.lang.CallingConvention.Ta...@@ -8558,6 +8558,7 @@ const calling_conventions_supporting_var_args = [_]std.lang.CallingConvention.Ta
8558 .m68k_sysv,8558 .m68k_sysv,
8559 .m68k_gnu,8559 .m68k_gnu,
8560 .m68k_rtd,8560 .m68k_rtd,
8561 .m88k_sysv,
8561 .msp430_eabi,8562 .msp430_eabi,
8562 .or1k_sysv,8563 .or1k_sysv,
8563 .s390x_sysv,8564 .s390x_sysv,
src/codegen/llvm.zig+4
...@@ -112,6 +112,7 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8...@@ -112,6 +112,7 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8
112 .hppa64,112 .hppa64,
113 .kalimba,113 .kalimba,
114 .kvx,114 .kvx,
115 .m88k,
115 .microblaze,116 .microblaze,
116 .microblazeel,117 .microblazeel,
117 .or1k,118 .or1k,
...@@ -478,6 +479,7 @@ pub fn dataLayout(target: *const std.Target) []const u8 {...@@ -478,6 +479,7 @@ pub fn dataLayout(target: *const std.Target) []const u8 {
478 .hppa64,479 .hppa64,
479 .kalimba,480 .kalimba,
480 .kvx,481 .kvx,
482 .m88k,
481 .microblaze,483 .microblaze,
482 .microblazeel,484 .microblazeel,
483 .or1k,485 .or1k,
...@@ -4531,6 +4533,7 @@ pub fn toLlvmCallConvTag(cc_tag: std.lang.CallingConvention.Tag, target: *const...@@ -4531,6 +4533,7 @@ pub fn toLlvmCallConvTag(cc_tag: std.lang.CallingConvention.Tag, target: *const
4531 .loongarch32_ilp32,4533 .loongarch32_ilp32,
4532 .m68k_sysv,4534 .m68k_sysv,
4533 .m68k_gnu,4535 .m68k_gnu,
4536 .m88k_sysv,
4534 .msp430_eabi,4537 .msp430_eabi,
4535 .or1k_sysv,4538 .or1k_sysv,
4536 .propeller_sysv,4539 .propeller_sysv,
...@@ -4903,6 +4906,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -4903,6 +4906,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
4903 .hppa64,4906 .hppa64,
4904 .kalimba,4907 .kalimba,
4905 .kvx,4908 .kvx,
4909 .m88k,
4906 .microblaze,4910 .microblaze,
4907 .microblazeel,4911 .microblazeel,
4908 .or1k,4912 .or1k,
src/target.zig+3-1
...@@ -245,6 +245,7 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat)...@@ -245,6 +245,7 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat)
245 .hppa64,245 .hppa64,
246 .kalimba,246 .kalimba,
247 .kvx,247 .kvx,
248 .m88k,
248 .microblaze,249 .microblaze,
249 .microblazeel,250 .microblazeel,
250 .or1k,251 .or1k,
...@@ -695,7 +696,8 @@ pub fn llvmMachineAbi(target: *const std.Target) ?[:0]const u8 {...@@ -695,7 +696,8 @@ pub fn llvmMachineAbi(target: *const std.Target) ?[:0]const u8 {
695 .gnuabin32, .muslabin32 => "n32",696 .gnuabin32, .muslabin32 => "n32",
696 else => "n64",697 else => "n64",
697 },698 },
698 .powerpc64, .powerpc64le => if (target.os.tag == .ps3) "elfv1" else "elfv2",699 .powerpc64 => if (target.os.tag == .ps3) "elfv1" else "elfv2",
700 .powerpc64le => "elfv2",
699 .riscv64, .riscv64be => if (target.cpu.has(.riscv, .e))701 .riscv64, .riscv64be => if (target.cpu.has(.riscv, .e))
700 "lp64e"702 "lp64e"
701 else if (target.cpu.has(.riscv, .d))703 else if (target.cpu.has(.riscv, .d))