authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2020-11-06 23:03:20+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2020-11-11 14:34:53+01:00
logd601b0f4eb025c753ca9f139480578511122afad
tree1890aa22a1f01f8c6a42de119b43b71320ccdaed
parent68bb1e91aaafbf57dc26cde7233e2deaf951b3a6

Add basic genSetReg for aarch64


1 files changed, 19 insertions(+), 0 deletions(-)

src/codegen.zig+19
......@@ -2489,6 +2489,25 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
24892489 },
24902490 else => return self.fail(src, "TODO implement getSetReg for arm {}", .{mcv}),
24912491 },
2492 .aarch64 => switch (mcv) {
2493 .dead => unreachable,
2494 .ptr_stack_offset => unreachable,
2495 .ptr_embedded_in_code => unreachable,
2496 .unreach, .none => return, // Nothing to do.
2497 .undef => {
2498 if (!self.wantSafety())
2499 return; // The already existing value will do just fine.
2500 // Write the debug undefined value.
2501 switch (reg.size()) {
2502 32 => return self.genSetReg(src, reg, .{ .immediate = 0xaaaaaaaa }),
2503 64 => return self.genSetReg(src, reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
2504 else => unreachable, // unexpected register size
2505 }
2506 },
2507 .immediate => return self.fail(src, "TODO implement genSetReg for aarch64 {}", .{mcv}),
2508 .register => return self.fail(src, "TODO implement genSetReg for aarch64 {}", .{mcv}),
2509 else => return self.fail(src, "TODO implement genSetReg for aarch64 {}", .{mcv}),
2510 },
24922511 .riscv64 => switch (mcv) {
24932512 .dead => unreachable,
24942513 .ptr_stack_offset => unreachable,