| ... | ... | @@ -3257,7 +3257,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3257 | 3257 | }, |
| 3258 | 3258 | .extra_temps = .{ |
| 3259 | 3259 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3260 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3260 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3261 | 3261 | .unused, |
| 3262 | 3262 | .unused, |
| 3263 | 3263 | .unused, |
| ... | ... | @@ -3288,7 +3288,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3288 | 3288 | }, |
| 3289 | 3289 | .extra_temps = .{ |
| 3290 | 3290 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3291 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3291 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3292 | 3292 | .unused, |
| 3293 | 3293 | .unused, |
| 3294 | 3294 | .unused, |
| ... | ... | @@ -3319,7 +3319,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3319 | 3319 | }, |
| 3320 | 3320 | .extra_temps = .{ |
| 3321 | 3321 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3322 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3322 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3323 | 3323 | .unused, |
| 3324 | 3324 | .unused, |
| 3325 | 3325 | .unused, |
| ... | ... | @@ -3338,7 +3338,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3338 | 3338 | }, |
| 3339 | 3339 | .extra_temps = .{ |
| 3340 | 3340 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3341 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3341 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3342 | 3342 | .unused, |
| 3343 | 3343 | .unused, |
| 3344 | 3344 | .unused, |
| ... | ... | @@ -3369,7 +3369,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3369 | 3369 | }, |
| 3370 | 3370 | .extra_temps = .{ |
| 3371 | 3371 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3372 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3372 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3373 | 3373 | .unused, |
| 3374 | 3374 | .unused, |
| 3375 | 3375 | .unused, |
| ... | ... | @@ -3400,7 +3400,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3400 | 3400 | }, |
| 3401 | 3401 | .extra_temps = .{ |
| 3402 | 3402 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3403 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3403 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3404 | 3404 | .unused, |
| 3405 | 3405 | .unused, |
| 3406 | 3406 | .unused, |
| ... | ... | @@ -3988,7 +3988,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 3988 | 3988 | }, |
| 3989 | 3989 | .extra_temps = .{ |
| 3990 | 3990 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 3991 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 3991 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 3992 | 3992 | .unused, |
| 3993 | 3993 | .unused, |
| 3994 | 3994 | .unused, |
| ... | ... | @@ -4019,7 +4019,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4019 | 4019 | }, |
| 4020 | 4020 | .extra_temps = .{ |
| 4021 | 4021 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4022 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4022 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4023 | 4023 | .unused, |
| 4024 | 4024 | .unused, |
| 4025 | 4025 | .unused, |
| ... | ... | @@ -4050,7 +4050,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4050 | 4050 | }, |
| 4051 | 4051 | .extra_temps = .{ |
| 4052 | 4052 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4053 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4053 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4054 | 4054 | .unused, |
| 4055 | 4055 | .unused, |
| 4056 | 4056 | .unused, |
| ... | ... | @@ -4069,7 +4069,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4069 | 4069 | }, |
| 4070 | 4070 | .extra_temps = .{ |
| 4071 | 4071 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4072 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4072 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4073 | 4073 | .unused, |
| 4074 | 4074 | .unused, |
| 4075 | 4075 | .unused, |
| ... | ... | @@ -4100,7 +4100,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4100 | 4100 | }, |
| 4101 | 4101 | .extra_temps = .{ |
| 4102 | 4102 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4103 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4103 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4104 | 4104 | .unused, |
| 4105 | 4105 | .unused, |
| 4106 | 4106 | .unused, |
| ... | ... | @@ -4131,7 +4131,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4131 | 4131 | }, |
| 4132 | 4132 | .extra_temps = .{ |
| 4133 | 4133 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4134 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4134 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4135 | 4135 | .unused, |
| 4136 | 4136 | .unused, |
| 4137 | 4137 | .unused, |
| ... | ... | @@ -4151,7 +4151,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4151 | 4151 | .{ .type = .isize, .kind = .{ .rc = .general_purpose } }, |
| 4152 | 4152 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4153 | 4153 | .{ .type = .u64, .kind = .{ .rc = .general_purpose } }, |
| 4154 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4154 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4155 | 4155 | .unused, |
| 4156 | 4156 | .unused, |
| 4157 | 4157 | }, |
| ... | ... | @@ -4173,7 +4173,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 4173 | 4173 | .{ .type = .isize, .kind = .{ .rc = .general_purpose } }, |
| 4174 | 4174 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 4175 | 4175 | .{ .type = .u32, .kind = .{ .rc = .general_purpose } }, |
| 4176 | | .{ .kind = .{ .umax_mem = .src0 } }, |
| 4176 | .{ .kind = .{ .umax_mem = .{ .ref = .src0 } } }, |
| 4177 | 4177 | .unused, |
| 4178 | 4178 | .unused, |
| 4179 | 4179 | }, |
| ... | ... | @@ -8793,7 +8793,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 8793 | 8793 | |
| 8794 | 8794 | .abs => |air_tag| if (use_old) try cg.airAbs(inst) else fallback: { |
| 8795 | 8795 | const ty_op = air_datas[@intFromEnum(inst)].ty_op; |
| 8796 | | if (ty_op.ty.toType().scalarType(zcu).isRuntimeFloat()) break :fallback try cg.airAbs(inst); |
| 8796 | if (ty_op.ty.toType().isVector(zcu) and ty_op.ty.toType().childType(zcu).isRuntimeFloat()) break :fallback try cg.airAbs(inst); |
| 8797 | 8797 | var ops = try cg.tempsFromOperands(inst, .{ty_op.operand}); |
| 8798 | 8798 | var res: [1]Temp = undefined; |
| 8799 | 8799 | cg.select(&res, &.{ty_op.ty.toType()}, &ops, comptime &.{ .{ |
| ... | ... | @@ -8991,16 +8991,6 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 8991 | 8991 | .{ ._, ._, .add, .tmp0p, .si(8), ._, ._ }, |
| 8992 | 8992 | .{ ._, ._nc, .j, .@"0b", ._, ._, ._ }, |
| 8993 | 8993 | } }, |
| 8994 | | }, .{ |
| 8995 | | .required_features = .{ .mmx, .ssse3, null, null }, |
| 8996 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .byte } }, .any }, |
| 8997 | | .patterns = &.{ |
| 8998 | | .{ .src = .{ .mut_mm, .none } }, |
| 8999 | | }, |
| 9000 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9001 | | .each = .{ .once = &.{ |
| 9002 | | .{ ._, .p_b, .abs, .dst0q, .src0q, ._, ._ }, |
| 9003 | | } }, |
| 9004 | 8994 | }, .{ |
| 9005 | 8995 | .required_features = .{ .mmx, .ssse3, null, null }, |
| 9006 | 8996 | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .byte } }, .any }, |
| ... | ... | @@ -9008,20 +8998,10 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 9008 | 8998 | .{ .src = .{ .mem, .none } }, |
| 9009 | 8999 | .{ .src = .{ .to_mm, .none } }, |
| 9010 | 9000 | }, |
| 9011 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9001 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .mmx } }}, |
| 9012 | 9002 | .each = .{ .once = &.{ |
| 9013 | 9003 | .{ ._, .p_b, .abs, .dst0q, .src0q, ._, ._ }, |
| 9014 | 9004 | } }, |
| 9015 | | }, .{ |
| 9016 | | .required_features = .{ .mmx, .ssse3, null, null }, |
| 9017 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .word } }, .any }, |
| 9018 | | .patterns = &.{ |
| 9019 | | .{ .src = .{ .mut_mm, .none } }, |
| 9020 | | }, |
| 9021 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9022 | | .each = .{ .once = &.{ |
| 9023 | | .{ ._, .p_w, .abs, .dst0q, .src0q, ._, ._ }, |
| 9024 | | } }, |
| 9025 | 9005 | }, .{ |
| 9026 | 9006 | .required_features = .{ .mmx, .ssse3, null, null }, |
| 9027 | 9007 | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .word } }, .any }, |
| ... | ... | @@ -9029,20 +9009,10 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 9029 | 9009 | .{ .src = .{ .mem, .none } }, |
| 9030 | 9010 | .{ .src = .{ .to_mm, .none } }, |
| 9031 | 9011 | }, |
| 9032 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9012 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .mmx } }}, |
| 9033 | 9013 | .each = .{ .once = &.{ |
| 9034 | 9014 | .{ ._, .p_w, .abs, .dst0q, .src0q, ._, ._ }, |
| 9035 | 9015 | } }, |
| 9036 | | }, .{ |
| 9037 | | .required_features = .{ .mmx, .ssse3, null, null }, |
| 9038 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .dword } }, .any }, |
| 9039 | | .patterns = &.{ |
| 9040 | | .{ .src = .{ .mut_mm, .none } }, |
| 9041 | | }, |
| 9042 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9043 | | .each = .{ .once = &.{ |
| 9044 | | .{ ._, .p_d, .abs, .dst0q, .src0q, ._, ._ }, |
| 9045 | | } }, |
| 9046 | 9016 | }, .{ |
| 9047 | 9017 | .required_features = .{ .mmx, .ssse3, null, null }, |
| 9048 | 9018 | .src_constraints = .{ .{ .scalar_int = .{ .of = .qword, .is = .dword } }, .any }, |
| ... | ... | @@ -9050,196 +9020,106 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 9050 | 9020 | .{ .src = .{ .mem, .none } }, |
| 9051 | 9021 | .{ .src = .{ .to_mm, .none } }, |
| 9052 | 9022 | }, |
| 9053 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9023 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .mmx } }}, |
| 9054 | 9024 | .each = .{ .once = &.{ |
| 9055 | 9025 | .{ ._, .p_d, .abs, .dst0q, .src0q, ._, ._ }, |
| 9056 | 9026 | } }, |
| 9057 | | }, .{ |
| 9058 | | .required_features = .{ .ssse3, null, null, null }, |
| 9059 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .byte } }, .any }, |
| 9060 | | .patterns = &.{ |
| 9061 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9062 | | }, |
| 9063 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9064 | | .each = .{ .once = &.{ |
| 9065 | | .{ ._, .p_b, .abs, .dst0x, .src0x, ._, ._ }, |
| 9066 | | } }, |
| 9067 | 9027 | }, .{ |
| 9068 | 9028 | .required_features = .{ .ssse3, null, null, null }, |
| 9069 | 9029 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .byte } }, .any }, |
| 9070 | 9030 | .patterns = &.{ |
| 9071 | 9031 | .{ .src = .{ .mem, .none } }, |
| 9072 | | .{ .src = .{ .to_xmm, .none } }, |
| 9032 | .{ .src = .{ .to_sse, .none } }, |
| 9073 | 9033 | }, |
| 9074 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9034 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9075 | 9035 | .each = .{ .once = &.{ |
| 9076 | 9036 | .{ ._, .p_b, .abs, .dst0x, .src0x, ._, ._ }, |
| 9077 | 9037 | } }, |
| 9078 | | }, .{ |
| 9079 | | .required_features = .{ .ssse3, null, null, null }, |
| 9080 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .word } }, .any }, |
| 9081 | | .patterns = &.{ |
| 9082 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9083 | | }, |
| 9084 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9085 | | .each = .{ .once = &.{ |
| 9086 | | .{ ._, .p_w, .abs, .dst0x, .src0x, ._, ._ }, |
| 9087 | | } }, |
| 9088 | 9038 | }, .{ |
| 9089 | 9039 | .required_features = .{ .ssse3, null, null, null }, |
| 9090 | 9040 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .word } }, .any }, |
| 9091 | 9041 | .patterns = &.{ |
| 9092 | 9042 | .{ .src = .{ .mem, .none } }, |
| 9093 | | .{ .src = .{ .to_xmm, .none } }, |
| 9043 | .{ .src = .{ .to_sse, .none } }, |
| 9094 | 9044 | }, |
| 9095 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9045 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9096 | 9046 | .each = .{ .once = &.{ |
| 9097 | 9047 | .{ ._, .p_w, .abs, .dst0x, .src0x, ._, ._ }, |
| 9098 | 9048 | } }, |
| 9099 | | }, .{ |
| 9100 | | .required_features = .{ .ssse3, null, null, null }, |
| 9101 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .dword } }, .any }, |
| 9102 | | .patterns = &.{ |
| 9103 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9104 | | }, |
| 9105 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9106 | | .each = .{ .once = &.{ |
| 9107 | | .{ ._, .p_d, .abs, .dst0x, .src0x, ._, ._ }, |
| 9108 | | } }, |
| 9109 | 9049 | }, .{ |
| 9110 | 9050 | .required_features = .{ .ssse3, null, null, null }, |
| 9111 | 9051 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .dword } }, .any }, |
| 9112 | 9052 | .patterns = &.{ |
| 9113 | 9053 | .{ .src = .{ .mem, .none } }, |
| 9114 | | .{ .src = .{ .to_xmm, .none } }, |
| 9054 | .{ .src = .{ .to_sse, .none } }, |
| 9115 | 9055 | }, |
| 9116 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9056 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9117 | 9057 | .each = .{ .once = &.{ |
| 9118 | 9058 | .{ ._, .p_d, .abs, .dst0x, .src0x, ._, ._ }, |
| 9119 | 9059 | } }, |
| 9120 | | }, .{ |
| 9121 | | .required_features = .{ .avx, null, null, null }, |
| 9122 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .byte } }, .any }, |
| 9123 | | .patterns = &.{ |
| 9124 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9125 | | }, |
| 9126 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9127 | | .each = .{ .once = &.{ |
| 9128 | | .{ ._, .vp_b, .abs, .dst0x, .src0x, ._, ._ }, |
| 9129 | | } }, |
| 9130 | 9060 | }, .{ |
| 9131 | 9061 | .required_features = .{ .avx, null, null, null }, |
| 9132 | 9062 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .byte } }, .any }, |
| 9133 | 9063 | .patterns = &.{ |
| 9134 | 9064 | .{ .src = .{ .mem, .none } }, |
| 9135 | | .{ .src = .{ .to_xmm, .none } }, |
| 9065 | .{ .src = .{ .to_sse, .none } }, |
| 9136 | 9066 | }, |
| 9137 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9067 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9138 | 9068 | .each = .{ .once = &.{ |
| 9139 | 9069 | .{ ._, .vp_b, .abs, .dst0x, .src0x, ._, ._ }, |
| 9140 | 9070 | } }, |
| 9141 | | }, .{ |
| 9142 | | .required_features = .{ .avx, null, null, null }, |
| 9143 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .word } }, .any }, |
| 9144 | | .patterns = &.{ |
| 9145 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9146 | | }, |
| 9147 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9148 | | .each = .{ .once = &.{ |
| 9149 | | .{ ._, .vp_w, .abs, .dst0x, .src0x, ._, ._ }, |
| 9150 | | } }, |
| 9151 | 9071 | }, .{ |
| 9152 | 9072 | .required_features = .{ .avx, null, null, null }, |
| 9153 | 9073 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .word } }, .any }, |
| 9154 | 9074 | .patterns = &.{ |
| 9155 | 9075 | .{ .src = .{ .mem, .none } }, |
| 9156 | | .{ .src = .{ .to_xmm, .none } }, |
| 9076 | .{ .src = .{ .to_sse, .none } }, |
| 9157 | 9077 | }, |
| 9158 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9078 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9159 | 9079 | .each = .{ .once = &.{ |
| 9160 | 9080 | .{ ._, .vp_w, .abs, .dst0x, .src0x, ._, ._ }, |
| 9161 | 9081 | } }, |
| 9162 | | }, .{ |
| 9163 | | .required_features = .{ .avx, null, null, null }, |
| 9164 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .dword } }, .any }, |
| 9165 | | .patterns = &.{ |
| 9166 | | .{ .src = .{ .mut_xmm, .none } }, |
| 9167 | | }, |
| 9168 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9169 | | .each = .{ .once = &.{ |
| 9170 | | .{ ._, .vp_d, .abs, .dst0x, .src0x, ._, ._ }, |
| 9171 | | } }, |
| 9172 | 9082 | }, .{ |
| 9173 | 9083 | .required_features = .{ .avx, null, null, null }, |
| 9174 | 9084 | .src_constraints = .{ .{ .scalar_int = .{ .of = .xword, .is = .dword } }, .any }, |
| 9175 | 9085 | .patterns = &.{ |
| 9176 | 9086 | .{ .src = .{ .mem, .none } }, |
| 9177 | | .{ .src = .{ .to_xmm, .none } }, |
| 9087 | .{ .src = .{ .to_sse, .none } }, |
| 9178 | 9088 | }, |
| 9179 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9089 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9180 | 9090 | .each = .{ .once = &.{ |
| 9181 | 9091 | .{ ._, .vp_d, .abs, .dst0x, .src0x, ._, ._ }, |
| 9182 | 9092 | } }, |
| 9183 | | }, .{ |
| 9184 | | .required_features = .{ .avx2, null, null, null }, |
| 9185 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .byte } }, .any }, |
| 9186 | | .patterns = &.{ |
| 9187 | | .{ .src = .{ .mut_ymm, .none } }, |
| 9188 | | }, |
| 9189 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9190 | | .each = .{ .once = &.{ |
| 9191 | | .{ ._, .vp_b, .abs, .dst0y, .src0y, ._, ._ }, |
| 9192 | | } }, |
| 9193 | 9093 | }, .{ |
| 9194 | 9094 | .required_features = .{ .avx2, null, null, null }, |
| 9195 | 9095 | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .byte } }, .any }, |
| 9196 | 9096 | .patterns = &.{ |
| 9197 | 9097 | .{ .src = .{ .mem, .none } }, |
| 9198 | | .{ .src = .{ .to_ymm, .none } }, |
| 9098 | .{ .src = .{ .to_sse, .none } }, |
| 9199 | 9099 | }, |
| 9200 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9100 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9201 | 9101 | .each = .{ .once = &.{ |
| 9202 | 9102 | .{ ._, .vp_b, .abs, .dst0y, .src0y, ._, ._ }, |
| 9203 | 9103 | } }, |
| 9204 | | }, .{ |
| 9205 | | .required_features = .{ .avx2, null, null, null }, |
| 9206 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .word } }, .any }, |
| 9207 | | .patterns = &.{ |
| 9208 | | .{ .src = .{ .mut_ymm, .none } }, |
| 9209 | | }, |
| 9210 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9211 | | .each = .{ .once = &.{ |
| 9212 | | .{ ._, .vp_w, .abs, .dst0y, .src0y, ._, ._ }, |
| 9213 | | } }, |
| 9214 | 9104 | }, .{ |
| 9215 | 9105 | .required_features = .{ .avx2, null, null, null }, |
| 9216 | 9106 | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .word } }, .any }, |
| 9217 | 9107 | .patterns = &.{ |
| 9218 | 9108 | .{ .src = .{ .mem, .none } }, |
| 9219 | | .{ .src = .{ .to_ymm, .none } }, |
| 9109 | .{ .src = .{ .to_sse, .none } }, |
| 9220 | 9110 | }, |
| 9221 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9111 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9222 | 9112 | .each = .{ .once = &.{ |
| 9223 | 9113 | .{ ._, .vp_w, .abs, .dst0y, .src0y, ._, ._ }, |
| 9224 | 9114 | } }, |
| 9225 | | }, .{ |
| 9226 | | .required_features = .{ .avx2, null, null, null }, |
| 9227 | | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .dword } }, .any }, |
| 9228 | | .patterns = &.{ |
| 9229 | | .{ .src = .{ .mut_ymm, .none } }, |
| 9230 | | }, |
| 9231 | | .dst_temps = .{.{ .ref = .src0 }}, |
| 9232 | | .each = .{ .once = &.{ |
| 9233 | | .{ ._, .vp_d, .abs, .dst0y, .src0y, ._, ._ }, |
| 9234 | | } }, |
| 9235 | 9115 | }, .{ |
| 9236 | 9116 | .required_features = .{ .avx2, null, null, null }, |
| 9237 | 9117 | .src_constraints = .{ .{ .scalar_int = .{ .of = .yword, .is = .dword } }, .any }, |
| 9238 | 9118 | .patterns = &.{ |
| 9239 | 9119 | .{ .src = .{ .mem, .none } }, |
| 9240 | | .{ .src = .{ .to_ymm, .none } }, |
| 9120 | .{ .src = .{ .to_sse, .none } }, |
| 9241 | 9121 | }, |
| 9242 | | .dst_temps = .{.{ .rc = .sse }}, |
| 9122 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9243 | 9123 | .each = .{ .once = &.{ |
| 9244 | 9124 | .{ ._, .vp_d, .abs, .dst0y, .src0y, ._, ._ }, |
| 9245 | 9125 | } }, |
| ... | ... | @@ -9807,6 +9687,266 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void { |
| 9807 | 9687 | .{ ._, ._, .cmp, .tmp0d, .sa(.none, .add_src0_unaligned_size), ._, ._ }, |
| 9808 | 9688 | .{ ._, ._b, .j, .@"0b", ._, ._, ._ }, |
| 9809 | 9689 | } }, |
| 9690 | }, .{ |
| 9691 | .required_features = .{ .sse, null, null, null }, |
| 9692 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .dword } }, .any }, |
| 9693 | .patterns = &.{ |
| 9694 | .{ .src = .{ .to_mut_sse, .none } }, |
| 9695 | }, |
| 9696 | .extra_temps = .{ |
| 9697 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9698 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9699 | .unused, |
| 9700 | .unused, |
| 9701 | .unused, |
| 9702 | .unused, |
| 9703 | }, |
| 9704 | .dst_temps = .{.{ .ref = .src0 }}, |
| 9705 | .each = .{ .once = &.{ |
| 9706 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9707 | .{ ._, ._ps, .@"and", .dst0x, .lea(.xword, .tmp0), ._, ._ }, |
| 9708 | } }, |
| 9709 | }, .{ |
| 9710 | .required_features = .{ .sse2, null, null, null }, |
| 9711 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .qword } }, .any }, |
| 9712 | .patterns = &.{ |
| 9713 | .{ .src = .{ .to_mut_sse, .none } }, |
| 9714 | }, |
| 9715 | .extra_temps = .{ |
| 9716 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9717 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9718 | .unused, |
| 9719 | .unused, |
| 9720 | .unused, |
| 9721 | .unused, |
| 9722 | }, |
| 9723 | .dst_temps = .{.{ .ref = .src0 }}, |
| 9724 | .each = .{ .once = &.{ |
| 9725 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9726 | .{ ._, ._pd, .@"and", .dst0x, .lea(.xword, .tmp0), ._, ._ }, |
| 9727 | } }, |
| 9728 | }, .{ |
| 9729 | .required_features = .{ .sse, null, null, null }, |
| 9730 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .qword } }, .any }, |
| 9731 | .patterns = &.{ |
| 9732 | .{ .src = .{ .to_mut_sse, .none } }, |
| 9733 | }, |
| 9734 | .extra_temps = .{ |
| 9735 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9736 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9737 | .unused, |
| 9738 | .unused, |
| 9739 | .unused, |
| 9740 | .unused, |
| 9741 | }, |
| 9742 | .dst_temps = .{.{ .ref = .src0 }}, |
| 9743 | .each = .{ .once = &.{ |
| 9744 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9745 | .{ ._, ._ps, .@"and", .dst0x, .lea(.xword, .tmp0), ._, ._ }, |
| 9746 | } }, |
| 9747 | }, .{ |
| 9748 | .required_features = .{ .avx, null, null, null }, |
| 9749 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .dword } }, .any }, |
| 9750 | .patterns = &.{ |
| 9751 | .{ .src = .{ .to_sse, .none } }, |
| 9752 | }, |
| 9753 | .extra_temps = .{ |
| 9754 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9755 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9756 | .unused, |
| 9757 | .unused, |
| 9758 | .unused, |
| 9759 | .unused, |
| 9760 | }, |
| 9761 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9762 | .each = .{ .once = &.{ |
| 9763 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9764 | .{ ._, .v_ps, .@"and", .dst0x, .src0x, .lea(.xword, .tmp0), ._ }, |
| 9765 | } }, |
| 9766 | }, .{ |
| 9767 | .required_features = .{ .avx, null, null, null }, |
| 9768 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .qword } }, .any }, |
| 9769 | .patterns = &.{ |
| 9770 | .{ .src = .{ .to_sse, .none } }, |
| 9771 | }, |
| 9772 | .extra_temps = .{ |
| 9773 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9774 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9775 | .unused, |
| 9776 | .unused, |
| 9777 | .unused, |
| 9778 | .unused, |
| 9779 | }, |
| 9780 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9781 | .each = .{ .once = &.{ |
| 9782 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9783 | .{ ._, .v_pd, .@"and", .dst0x, .src0x, .lea(.xword, .tmp0), ._ }, |
| 9784 | } }, |
| 9785 | }, .{ |
| 9786 | .required_features = .{ .avx, null, null, null }, |
| 9787 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .yword, .is = .dword } }, .any }, |
| 9788 | .patterns = &.{ |
| 9789 | .{ .src = .{ .to_sse, .none } }, |
| 9790 | }, |
| 9791 | .extra_temps = .{ |
| 9792 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9793 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9794 | .unused, |
| 9795 | .unused, |
| 9796 | .unused, |
| 9797 | .unused, |
| 9798 | }, |
| 9799 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9800 | .each = .{ .once = &.{ |
| 9801 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9802 | .{ ._, .v_ps, .@"and", .dst0y, .src0y, .lea(.yword, .tmp0), ._ }, |
| 9803 | } }, |
| 9804 | }, .{ |
| 9805 | .required_features = .{ .avx, null, null, null }, |
| 9806 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .yword, .is = .qword } }, .any }, |
| 9807 | .patterns = &.{ |
| 9808 | .{ .src = .{ .to_sse, .none } }, |
| 9809 | }, |
| 9810 | .extra_temps = .{ |
| 9811 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9812 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9813 | .unused, |
| 9814 | .unused, |
| 9815 | .unused, |
| 9816 | .unused, |
| 9817 | }, |
| 9818 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9819 | .each = .{ .once = &.{ |
| 9820 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9821 | .{ ._, .v_pd, .@"and", .dst0y, .src0y, .lea(.yword, .tmp0), ._ }, |
| 9822 | } }, |
| 9823 | }, .{ |
| 9824 | .required_features = .{ .x87, null, null, null }, |
| 9825 | .src_constraints = .{ .{ .scalar_exact_float = .{ .of = .xword, .is = .tbyte } }, .any }, |
| 9826 | .patterns = &.{ |
| 9827 | .{ .src = .{ .to_x87, .none } }, |
| 9828 | }, |
| 9829 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .x87 } }}, |
| 9830 | .clobbers = .{ .st = 1 }, |
| 9831 | .each = .{ .once = &.{ |
| 9832 | .{ ._, .f_, .ld, .src0t, ._, ._, ._ }, |
| 9833 | .{ ._, .f_, .abs, ._, ._, ._, ._ }, |
| 9834 | .{ ._, .f_p, .st, .dst0t, ._, ._, ._ }, |
| 9835 | } }, |
| 9836 | }, .{ |
| 9837 | .required_features = .{ .avx2, null, null, null }, |
| 9838 | .src_constraints = .{ .{ .scalar_float = .{ .of = .xword, .is = .xword } }, .any }, |
| 9839 | .patterns = &.{ |
| 9840 | .{ .src = .{ .to_sse, .none } }, |
| 9841 | }, |
| 9842 | .extra_temps = .{ |
| 9843 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9844 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9845 | .unused, |
| 9846 | .unused, |
| 9847 | .unused, |
| 9848 | .unused, |
| 9849 | }, |
| 9850 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9851 | .each = .{ .once = &.{ |
| 9852 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9853 | .{ ._, .vp_, .@"and", .dst0x, .src0x, .lea(.xword, .tmp0), ._ }, |
| 9854 | } }, |
| 9855 | }, .{ |
| 9856 | .required_features = .{ .avx, null, null, null }, |
| 9857 | .src_constraints = .{ .{ .scalar_float = .{ .of = .xword, .is = .xword } }, .any }, |
| 9858 | .patterns = &.{ |
| 9859 | .{ .src = .{ .to_sse, .none } }, |
| 9860 | }, |
| 9861 | .extra_temps = .{ |
| 9862 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9863 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9864 | .unused, |
| 9865 | .unused, |
| 9866 | .unused, |
| 9867 | .unused, |
| 9868 | }, |
| 9869 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9870 | .each = .{ .once = &.{ |
| 9871 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9872 | .{ ._, .vp_, .@"and", .dst0x, .src0x, .lea(.xword, .tmp0), ._ }, |
| 9873 | } }, |
| 9874 | }, .{ |
| 9875 | .required_features = .{ .sse2, null, null, null }, |
| 9876 | .src_constraints = .{ .{ .scalar_float = .{ .of = .xword, .is = .xword } }, .any }, |
| 9877 | .patterns = &.{ |
| 9878 | .{ .src = .{ .to_mut_sse, .none } }, |
| 9879 | }, |
| 9880 | .extra_temps = .{ |
| 9881 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9882 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9883 | .unused, |
| 9884 | .unused, |
| 9885 | .unused, |
| 9886 | .unused, |
| 9887 | }, |
| 9888 | .dst_temps = .{.{ .ref = .src0 }}, |
| 9889 | .each = .{ .once = &.{ |
| 9890 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9891 | .{ ._, .p_, .@"and", .dst0x, .lea(.xword, .tmp0), ._, ._ }, |
| 9892 | } }, |
| 9893 | }, .{ |
| 9894 | .required_features = .{ .sse, null, null, null }, |
| 9895 | .src_constraints = .{ .{ .scalar_float = .{ .of = .xword, .is = .xword } }, .any }, |
| 9896 | .patterns = &.{ |
| 9897 | .{ .src = .{ .to_mut_sse, .none } }, |
| 9898 | }, |
| 9899 | .extra_temps = .{ |
| 9900 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9901 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9902 | .unused, |
| 9903 | .unused, |
| 9904 | .unused, |
| 9905 | .unused, |
| 9906 | }, |
| 9907 | .dst_temps = .{.{ .ref = .src0 }}, |
| 9908 | .each = .{ .once = &.{ |
| 9909 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9910 | .{ ._, ._ps, .@"and", .dst0x, .lea(.xword, .tmp0), ._, ._ }, |
| 9911 | } }, |
| 9912 | }, .{ |
| 9913 | .required_features = .{ .avx2, null, null, null }, |
| 9914 | .src_constraints = .{ .{ .scalar_float = .{ .of = .yword, .is = .xword } }, .any }, |
| 9915 | .patterns = &.{ |
| 9916 | .{ .src = .{ .to_sse, .none } }, |
| 9917 | }, |
| 9918 | .extra_temps = .{ |
| 9919 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9920 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9921 | .unused, |
| 9922 | .unused, |
| 9923 | .unused, |
| 9924 | .unused, |
| 9925 | }, |
| 9926 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9927 | .each = .{ .once = &.{ |
| 9928 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9929 | .{ ._, .vp_, .@"and", .dst0y, .src0y, .lea(.yword, .tmp0), ._ }, |
| 9930 | } }, |
| 9931 | }, .{ |
| 9932 | .required_features = .{ .avx, null, null, null }, |
| 9933 | .src_constraints = .{ .{ .scalar_float = .{ .of = .yword, .is = .xword } }, .any }, |
| 9934 | .patterns = &.{ |
| 9935 | .{ .src = .{ .to_sse, .none } }, |
| 9936 | }, |
| 9937 | .extra_temps = .{ |
| 9938 | .{ .type = .usize, .kind = .{ .rc = .general_purpose } }, |
| 9939 | .{ .kind = .{ .smax_mem = .{ .ref = .src0, .vectorize = true } } }, |
| 9940 | .unused, |
| 9941 | .unused, |
| 9942 | .unused, |
| 9943 | .unused, |
| 9944 | }, |
| 9945 | .dst_temps = .{.{ .mut_reg = .{ .ref = .src0, .rc = .sse } }}, |
| 9946 | .each = .{ .once = &.{ |
| 9947 | .{ ._, ._, .lea, .tmp0p, .mem(.tmp1), ._, ._ }, |
| 9948 | .{ ._, .v_pd, .@"and", .dst0y, .src0y, .lea(.yword, .tmp0), ._ }, |
| 9949 | } }, |
| 9810 | 9950 | } }) catch |err| switch (err) { |
| 9811 | 9951 | error.SelectFailed => return cg.fail("failed to select {s} {} {}", .{ |
| 9812 | 9952 | @tagName(air_tag), |
| ... | ... | @@ -21372,10 +21512,11 @@ fn airCmp(self: *CodeGen, inst: Air.Inst.Index, op: std.math.CompareOperator) !v |
| 21372 | 21512 | switch (ty.zigTypeTag(zcu)) { |
| 21373 | 21513 | .float => { |
| 21374 | 21514 | const float_bits = ty.floatBits(self.target.*); |
| 21375 | | if (switch (float_bits) { |
| 21376 | | 16 => !self.hasFeature(.f16c), |
| 21377 | | 32, 64 => false, |
| 21378 | | 80, 128 => true, |
| 21515 | if (!switch (float_bits) { |
| 21516 | 16 => self.hasFeature(.f16c), |
| 21517 | 32 => self.hasFeature(.sse), |
| 21518 | 64 => self.hasFeature(.sse2), |
| 21519 | 80, 128 => false, |
| 21379 | 21520 | else => unreachable, |
| 21380 | 21521 | }) { |
| 21381 | 21522 | var callee_buf: ["__???f2".len]u8 = undefined; |
| ... | ... | @@ -23640,12 +23781,24 @@ const MoveStrategy = union(enum) { |
| 23640 | 23781 | assert(dst_reg != .st7); |
| 23641 | 23782 | try self.asmRegister(.{ .f_p, .st }, @enumFromInt(@intFromEnum(dst_reg) + 1)); |
| 23642 | 23783 | }, |
| 23643 | | .insert_extract => |ie| try self.asmRegisterMemoryImmediate( |
| 23644 | | ie.insert, |
| 23645 | | dst_reg, |
| 23646 | | src_mem, |
| 23647 | | .u(0), |
| 23648 | | ), |
| 23784 | .insert_extract => |ie| if (ie.insert[0] != .p_w or self.hasFeature(.sse2)) |
| 23785 | try self.asmRegisterMemoryImmediate(ie.insert, dst_reg, src_mem, .u(0)) |
| 23786 | else { |
| 23787 | const tmp_frame_index = try self.allocFrameIndex(.init(.{ |
| 23788 | .size = 16, |
| 23789 | .alignment = .@"16", |
| 23790 | })); |
| 23791 | const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp); |
| 23792 | try self.asmRegisterMemory(.{ ._, .movzx }, tmp_reg.to32(), src_mem); |
| 23793 | try self.asmMemoryRegister(.{ ._, .mov }, .{ |
| 23794 | .base = .{ .frame = tmp_frame_index }, |
| 23795 | .mod = .{ .rm = .{ .size = .word } }, |
| 23796 | }, tmp_reg.to16()); |
| 23797 | try self.asmRegisterMemory(.{ ._ps, .mova }, dst_reg.to128(), .{ |
| 23798 | .base = .{ .frame = tmp_frame_index }, |
| 23799 | .mod = .{ .rm = .{ .size = .xword } }, |
| 23800 | }); |
| 23801 | }, |
| 23649 | 23802 | .vex_insert_extract => |ie| try self.asmRegisterRegisterMemoryImmediate( |
| 23650 | 23803 | ie.insert, |
| 23651 | 23804 | dst_reg, |
| ... | ... | @@ -23678,7 +23831,7 @@ const MoveStrategy = union(enum) { |
| 23678 | 23831 | .mod = .{ .rm = .{ .size = .xword } }, |
| 23679 | 23832 | }, src_reg.to128()); |
| 23680 | 23833 | const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp); |
| 23681 | | try self.asmRegisterMemory(.{ ._, .mov }, tmp_reg.to16(), .{ |
| 23834 | try self.asmRegisterMemory(.{ ._, .movzx }, tmp_reg.to32(), .{ |
| 23682 | 23835 | .base = .{ .frame = tmp_frame_index }, |
| 23683 | 23836 | .mod = .{ .rm = .{ .size = .word } }, |
| 23684 | 23837 | }); |
| ... | ... | @@ -24122,7 +24275,18 @@ fn genSetReg( |
| 24122 | 24275 | ), |
| 24123 | 24276 | else => unreachable, |
| 24124 | 24277 | }, |
| 24125 | | .segment, .x87, .mmx, .sse => try self.genSetReg(dst_reg, ty, try self.genTypedValue(try pt.undefValue(ty)), opts), |
| 24278 | .segment, .x87, .mmx, .sse => { |
| 24279 | const full_ty = try pt.vectorType(.{ |
| 24280 | .len = self.vectorSize(.float), |
| 24281 | .child = .u8_type, |
| 24282 | }); |
| 24283 | try self.genSetReg(dst_reg, full_ty, try self.genTypedValue( |
| 24284 | .fromInterned(try pt.intern(.{ .aggregate = .{ |
| 24285 | .ty = full_ty.toIntern(), |
| 24286 | .storage = .{ .repeated_elem = (try pt.intValue(.u8, 0xaa)).toIntern() }, |
| 24287 | } })), |
| 24288 | ), opts); |
| 24289 | }, |
| 24126 | 24290 | .ip, .cr, .dr => unreachable, |
| 24127 | 24291 | }, |
| 24128 | 24292 | .eflags => |cc| try self.asmSetccRegister(cc, dst_reg.to8()), |
| ... | ... | @@ -24171,13 +24335,19 @@ fn genSetReg( |
| 24171 | 24335 | registerAlias(dst_reg, @max(abi_size, 4)), |
| 24172 | 24336 | src_reg.to128(), |
| 24173 | 24337 | ) else { |
| 24338 | const frame_size = std.math.ceilPowerOfTwoAssert(u32, @max(abi_size, 4)); |
| 24174 | 24339 | const frame_index = try self.allocFrameIndex(.init(.{ |
| 24175 | | .size = 4, |
| 24176 | | .alignment = .@"4", |
| 24340 | .size = frame_size, |
| 24341 | .alignment = .fromNonzeroByteUnits(frame_size), |
| 24177 | 24342 | })); |
| 24178 | | try self.asmMemoryRegister(.{ ._ss, .mov }, .{ |
| 24343 | try self.asmMemoryRegister(switch (frame_size) { |
| 24344 | 4 => .{ ._ss, .mov }, |
| 24345 | 8 => .{ ._ps, .movl }, |
| 24346 | 16 => .{ ._ps, .mov }, |
| 24347 | else => unreachable, |
| 24348 | }, .{ |
| 24179 | 24349 | .base = .{ .frame = frame_index }, |
| 24180 | | .mod = .{ .rm = .{ .size = .dword } }, |
| 24350 | .mod = .{ .rm = .{ .size = .fromSize(frame_size) } }, |
| 24181 | 24351 | }, src_reg.to128()); |
| 24182 | 24352 | try self.asmRegisterMemory(.{ ._, .mov }, registerAlias(dst_reg, abi_size), .{ |
| 24183 | 24353 | .base = .{ .frame = frame_index }, |
| ... | ... | @@ -28572,7 +28742,7 @@ fn resolveCallingConventionValues( |
| 28572 | 28742 | arg_mcv_i += 1; |
| 28573 | 28743 | }, |
| 28574 | 28744 | .sse, .float, .float_combine => { |
| 28575 | | const param_sse_regs = abi.getCAbiSseParamRegs(cc); |
| 28745 | const param_sse_regs = abi.getCAbiSseParamRegs(cc, self.target); |
| 28576 | 28746 | const abi_size: u32 = @intCast(ty.abiSize(zcu)); |
| 28577 | 28747 | const reg_size = @min(abi_size, self.vectorSize(.float)); |
| 28578 | 28748 | var byte_offset: u32 = 0; |
| ... | ... | @@ -28670,7 +28840,7 @@ fn resolveCallingConventionValues( |
| 28670 | 28840 | |
| 28671 | 28841 | var param_gpr = abi.getCAbiIntParamRegs(cc); |
| 28672 | 28842 | var param_x87 = abi.getCAbiX87ParamRegs(cc); |
| 28673 | | var param_sse = abi.getCAbiSseParamRegs(cc); |
| 28843 | var param_sse = abi.getCAbiSseParamRegs(cc, self.target); |
| 28674 | 28844 | |
| 28675 | 28845 | // Return values |
| 28676 | 28846 | result.return_value = if (ret_ty.isNoReturn(zcu)) |
| ... | ... | @@ -29156,6 +29326,10 @@ fn intInfo(cg: *CodeGen, ty: Type) ?std.builtin.Type.Int { |
| 29156 | 29326 | }; |
| 29157 | 29327 | } |
| 29158 | 29328 | |
| 29329 | fn floatBits(cg: *CodeGen, ty: Type) ?u16 { |
| 29330 | return if (ty.isRuntimeFloat()) ty.floatBits(cg.target.*) else null; |
| 29331 | } |
| 29332 | |
| 29159 | 29333 | const Temp = struct { |
| 29160 | 29334 | index: Air.Inst.Index, |
| 29161 | 29335 | |
| ... | ... | @@ -30234,6 +30408,7 @@ const Select = struct { |
| 30234 | 30408 | backward: ?Mir.Inst.Index, |
| 30235 | 30409 | forward: [1]?Mir.Inst.Index, |
| 30236 | 30410 | }, |
| 30411 | top: u3, |
| 30237 | 30412 | |
| 30238 | 30413 | fn emitLabel(s: *Select, label_index: Label) void { |
| 30239 | 30414 | if (label_index == ._) return; |
| ... | ... | @@ -30269,6 +30444,92 @@ const Select = struct { |
| 30269 | 30444 | }, |
| 30270 | 30445 | else => |e| return e, |
| 30271 | 30446 | }; |
| 30447 | switch (mir_tag[0]) { |
| 30448 | .f_ => switch (mir_tag[1]) { |
| 30449 | .abs, .st => {}, |
| 30450 | .ld => s.top -%= 1, |
| 30451 | else => { |
| 30452 | const fixes = @tagName(mir_tag[0]); |
| 30453 | const fixes_blank = std.mem.indexOfScalar(u8, fixes, '_').?; |
| 30454 | std.debug.panic("{s}: {s}{s}{s}\n", .{ |
| 30455 | @src().fn_name, |
| 30456 | fixes[0..fixes_blank], |
| 30457 | @tagName(mir_tag[1]), |
| 30458 | fixes[fixes_blank + 1 ..], |
| 30459 | }); |
| 30460 | }, |
| 30461 | }, |
| 30462 | .f_p => switch (mir_tag[1]) { |
| 30463 | .st => s.top +%= 1, |
| 30464 | else => { |
| 30465 | const fixes = @tagName(mir_tag[0]); |
| 30466 | const fixes_blank = std.mem.indexOfScalar(u8, fixes, '_').?; |
| 30467 | std.debug.panic("{s}: {s}{s}{s}\n", .{ |
| 30468 | @src().fn_name, |
| 30469 | fixes[0..fixes_blank], |
| 30470 | @tagName(mir_tag[1]), |
| 30471 | fixes[fixes_blank + 1 ..], |
| 30472 | }); |
| 30473 | }, |
| 30474 | }, |
| 30475 | .f_1, |
| 30476 | => switch (mir_tag[1]) { |
| 30477 | .ld => s.top -%= 1, |
| 30478 | else => { |
| 30479 | const fixes = @tagName(mir_tag[0]); |
| 30480 | const fixes_blank = std.mem.indexOfScalar(u8, fixes, '_').?; |
| 30481 | std.debug.panic("{s}: {s}{s}{s}\n", .{ |
| 30482 | @src().fn_name, |
| 30483 | fixes[0..fixes_blank], |
| 30484 | @tagName(mir_tag[1]), |
| 30485 | fixes[fixes_blank + 1 ..], |
| 30486 | }); |
| 30487 | }, |
| 30488 | }, |
| 30489 | .f_l2e, |
| 30490 | .f_l2t, |
| 30491 | .f_lg2, |
| 30492 | .f_ln2, |
| 30493 | .f_pi, |
| 30494 | .f_z, |
| 30495 | => switch (mir_tag[1]) { |
| 30496 | .ld => s.top -%= 1, |
| 30497 | else => unreachable, |
| 30498 | }, |
| 30499 | .f_b, |
| 30500 | .f_be, |
| 30501 | .f_cw, |
| 30502 | .f_e, |
| 30503 | .f_env, |
| 30504 | .f_nb, |
| 30505 | .f_nbe, |
| 30506 | .f_ne, |
| 30507 | .f_nu, |
| 30508 | .f_p1, |
| 30509 | .f_pp, |
| 30510 | .f_sw, |
| 30511 | .f_u, |
| 30512 | .fb_, |
| 30513 | .fb_p, |
| 30514 | .fi_, |
| 30515 | .fi_p, |
| 30516 | .fn_, |
| 30517 | .fn_cw, |
| 30518 | .fn_env, |
| 30519 | .fn_sw, |
| 30520 | => {}, |
| 30521 | .f_cstp => switch (mir_tag[1]) { |
| 30522 | .de => s.top -%= 1, |
| 30523 | .in => s.top +%= 1, |
| 30524 | else => unreachable, |
| 30525 | }, |
| 30526 | else => {}, |
| 30527 | } |
| 30528 | } |
| 30529 | |
| 30530 | fn lowerReg(s: *const Select, reg: Register) Register { |
| 30531 | if (reg.class() != .x87) return reg; |
| 30532 | return @enumFromInt(@intFromEnum(Register.st0) + (@as(u3, @intCast(reg.enc())) -% s.top)); |
| 30272 | 30533 | } |
| 30273 | 30534 | |
| 30274 | 30535 | const Case = struct { |
| ... | ... | @@ -30278,7 +30539,7 @@ const Select = struct { |
| 30278 | 30539 | patterns: []const Select.Pattern, |
| 30279 | 30540 | extra_temps: [@intFromEnum(Select.Operand.Ref.dst0) - @intFromEnum(Select.Operand.Ref.tmp0)]TempSpec = @splat(.unused), |
| 30280 | 30541 | dst_temps: [@intFromEnum(Select.Operand.Ref.src0) - @intFromEnum(Select.Operand.Ref.dst0)]TempSpec.Kind = @splat(.unused), |
| 30281 | | clobbers: struct { eflags: bool = false } = .{}, |
| 30542 | clobbers: struct { eflags: bool = false, st: u3 = 0 } = .{}, |
| 30282 | 30543 | each: union(enum) { |
| 30283 | 30544 | once: []const Instruction, |
| 30284 | 30545 | }, |
| ... | ... | @@ -30305,6 +30566,8 @@ const Select = struct { |
| 30305 | 30566 | scalar_signed_int: Memory.Size, |
| 30306 | 30567 | scalar_unsigned_int: Memory.Size, |
| 30307 | 30568 | scalar_remainder_int: struct { of: Memory.Size, is: Memory.Size }, |
| 30569 | scalar_float: struct { of: Memory.Size, is: Memory.Size }, |
| 30570 | scalar_exact_float: struct { of: Memory.Size, is: Memory.Size }, |
| 30308 | 30571 | multiple_scalar_int: struct { of: Memory.Size, is: Memory.Size }, |
| 30309 | 30572 | exact_int: u16, |
| 30310 | 30573 | exact_signed_int: u16, |
| ... | ... | @@ -30338,23 +30601,23 @@ const Select = struct { |
| 30338 | 30601 | size.bitSize(cg.target) >= ty.vectorLen(zcu), |
| 30339 | 30602 | .vec => |size| ty.isVector(zcu) and ty.scalarType(zcu).toIntern() != .bool_type and |
| 30340 | 30603 | size.bitSize(cg.target) >= ty.abiSize(zcu), |
| 30341 | | .signed_int_vec => |size| ty.isVector(zcu) and size.bitSize(cg.target) >= 8 * ty.abiSize(zcu) and |
| 30604 | .signed_int_vec => |size| ty.isVector(zcu) and @divExact(size.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30342 | 30605 | if (cg.intInfo(ty.childType(zcu))) |int_info| int_info.signedness == .signed else false, |
| 30343 | | .signed_int_or_full_vec => |size| ty.isVector(zcu) and size.bitSize(cg.target) >= 8 * ty.abiSize(zcu) and |
| 30606 | .signed_int_or_full_vec => |size| ty.isVector(zcu) and @divExact(size.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30344 | 30607 | if (cg.intInfo(ty.childType(zcu))) |int_info| switch (int_info.signedness) { |
| 30345 | 30608 | .signed => true, |
| 30346 | 30609 | .unsigned => int_info.bits >= 8 and std.math.isPowerOfTwo(int_info.bits), |
| 30347 | 30610 | } else false, |
| 30348 | | .unsigned_int_vec => |size| ty.isVector(zcu) and size.bitSize(cg.target) >= 8 * ty.abiSize(zcu) and |
| 30611 | .unsigned_int_vec => |size| ty.isVector(zcu) and @divExact(size.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30349 | 30612 | if (cg.intInfo(ty.childType(zcu))) |int_info| int_info.signedness == .unsigned else false, |
| 30350 | | .size => |size| size.bitSize(cg.target) >= 8 * ty.abiSize(zcu), |
| 30351 | | .multiple_size => |size| size.bitSize(cg.target) % 8 * ty.abiSize(zcu) == 0, |
| 30613 | .size => |size| @divExact(size.bitSize(cg.target), 8) >= ty.abiSize(zcu), |
| 30614 | .multiple_size => |size| ty.abiSize(zcu) % @divExact(size.bitSize(cg.target), 8) == 0, |
| 30352 | 30615 | .int => |size| if (cg.intInfo(ty)) |int_info| size.bitSize(cg.target) >= int_info.bits else false, |
| 30353 | 30616 | .scalar_int_is => |size| if (cg.intInfo(ty.scalarType(zcu))) |int_info| |
| 30354 | 30617 | size.bitSize(cg.target) >= int_info.bits |
| 30355 | 30618 | else |
| 30356 | 30619 | false, |
| 30357 | | .scalar_int => |of_is| of_is.of.bitSize(cg.target) >= 8 * ty.abiSize(zcu) and |
| 30620 | .scalar_int => |of_is| @divExact(of_is.of.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30358 | 30621 | if (cg.intInfo(ty.scalarType(zcu))) |int_info| of_is.is.bitSize(cg.target) >= int_info.bits else false, |
| 30359 | 30622 | .scalar_signed_int => |size| if (cg.intInfo(ty.scalarType(zcu))) |int_info| switch (int_info.signedness) { |
| 30360 | 30623 | .signed => size.bitSize(cg.target) >= int_info.bits, |
| ... | ... | @@ -30364,12 +30627,16 @@ const Select = struct { |
| 30364 | 30627 | .signed => false, |
| 30365 | 30628 | .unsigned => size.bitSize(cg.target) >= int_info.bits, |
| 30366 | 30629 | } else false, |
| 30367 | | .multiple_scalar_int => |of_is| of_is.of.bitSize(cg.target) % 8 * ty.abiSize(zcu) == 0 and |
| 30630 | .multiple_scalar_int => |of_is| ty.abiSize(zcu) % @divExact(of_is.of.bitSize(cg.target), 8) == 0 and |
| 30368 | 30631 | if (cg.intInfo(ty.scalarType(zcu))) |int_info| of_is.is.bitSize(cg.target) >= int_info.bits else false, |
| 30369 | 30632 | .scalar_remainder_int => |of_is| if (cg.intInfo(ty.scalarType(zcu))) |int_info| |
| 30370 | 30633 | of_is.is.bitSize(cg.target) >= (int_info.bits - 1) % of_is.of.bitSize(cg.target) + 1 |
| 30371 | 30634 | else |
| 30372 | 30635 | false, |
| 30636 | .scalar_float => |of_is| @divExact(of_is.of.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30637 | if (cg.floatBits(ty.scalarType(zcu))) |float_bits| of_is.is.bitSize(cg.target) >= float_bits else false, |
| 30638 | .scalar_exact_float => |of_is| @divExact(of_is.of.bitSize(cg.target), 8) >= ty.abiSize(zcu) and |
| 30639 | if (cg.floatBits(ty.scalarType(zcu))) |float_bits| of_is.is.bitSize(cg.target) == float_bits else false, |
| 30373 | 30640 | .exact_int => |bit_size| if (cg.intInfo(ty)) |int_info| bit_size == int_info.bits else false, |
| 30374 | 30641 | .exact_signed_int => |bit_size| if (cg.intInfo(ty)) |int_info| switch (int_info.signedness) { |
| 30375 | 30642 | .signed => bit_size == int_info.bits, |
| ... | ... | @@ -30452,10 +30719,18 @@ const Select = struct { |
| 30452 | 30719 | to_gpr, |
| 30453 | 30720 | mut_gpr, |
| 30454 | 30721 | to_mut_gpr, |
| 30722 | x87, |
| 30723 | to_x87, |
| 30724 | mut_x87, |
| 30725 | to_mut_x87, |
| 30455 | 30726 | mm, |
| 30456 | 30727 | to_mm, |
| 30457 | 30728 | mut_mm, |
| 30458 | 30729 | to_mut_mm, |
| 30730 | sse, |
| 30731 | to_sse, |
| 30732 | mut_sse, |
| 30733 | to_mut_sse, |
| 30459 | 30734 | xmm, |
| 30460 | 30735 | to_xmm, |
| 30461 | 30736 | mut_xmm, |
| ... | ... | @@ -30499,6 +30774,17 @@ const Select = struct { |
| 30499 | 30774 | else => false, |
| 30500 | 30775 | }, |
| 30501 | 30776 | .to_gpr, .to_mut_gpr => temp.typeOf(cg).abiSize(cg.pt.zcu) <= 8, |
| 30777 | .x87 => switch (temp.tracking(cg).short) { |
| 30778 | .register => |reg| reg.class() == .x87, |
| 30779 | .register_offset => |reg_off| reg_off.reg.class() == .x87 and reg_off.off == 0, |
| 30780 | else => false, |
| 30781 | }, |
| 30782 | .mut_x87 => temp.isMut(cg) and switch (temp.tracking(cg).short) { |
| 30783 | .register => |reg| reg.class() == .x87, |
| 30784 | .register_offset => |reg_off| reg_off.reg.class() == .x87 and reg_off.off == 0, |
| 30785 | else => false, |
| 30786 | }, |
| 30787 | .to_x87, .to_mut_x87 => true, |
| 30502 | 30788 | .mm => temp.typeOf(cg).abiSize(cg.pt.zcu) == 8 and switch (temp.tracking(cg).short) { |
| 30503 | 30789 | .register => |reg| reg.class() == .mmx, |
| 30504 | 30790 | .register_offset => |reg_off| reg_off.reg.class() == .mmx and reg_off.off == 0, |
| ... | ... | @@ -30510,6 +30796,17 @@ const Select = struct { |
| 30510 | 30796 | else => false, |
| 30511 | 30797 | }, |
| 30512 | 30798 | .to_mm, .to_mut_mm => temp.typeOf(cg).abiSize(cg.pt.zcu) == 8, |
| 30799 | .sse => switch (temp.tracking(cg).short) { |
| 30800 | .register => |reg| reg.class() == .sse, |
| 30801 | .register_offset => |reg_off| reg_off.reg.class() == .sse and reg_off.off == 0, |
| 30802 | else => false, |
| 30803 | }, |
| 30804 | .mut_sse => temp.isMut(cg) and switch (temp.tracking(cg).short) { |
| 30805 | .register => |reg| reg.class() == .sse, |
| 30806 | .register_offset => |reg_off| reg_off.reg.class() == .sse and reg_off.off == 0, |
| 30807 | else => false, |
| 30808 | }, |
| 30809 | .to_sse, .to_mut_sse => true, |
| 30513 | 30810 | .xmm => temp.typeOf(cg).abiSize(cg.pt.zcu) == 16 and switch (temp.tracking(cg).short) { |
| 30514 | 30811 | .register => |reg| reg.class() == .sse, |
| 30515 | 30812 | .register_offset => |reg_off| reg_off.reg.class() == .sse and reg_off.off == 0, |
| ... | ... | @@ -30542,10 +30839,12 @@ const Select = struct { |
| 30542 | 30839 | .mem, .to_mem, .mut_mem, .to_mut_mem => try temp.toBase(cg), |
| 30543 | 30840 | .gpr, .to_gpr => try temp.toRegClass(false, .general_purpose, cg), |
| 30544 | 30841 | .mut_gpr, .to_mut_gpr => try temp.toRegClass(true, .general_purpose, cg), |
| 30842 | .x87, .to_x87 => try temp.toRegClass(false, .x87, cg), |
| 30843 | .mut_x87, .to_mut_x87 => try temp.toRegClass(true, .x87, cg), |
| 30545 | 30844 | .mm, .to_mm => try temp.toRegClass(false, .mmx, cg), |
| 30546 | 30845 | .mut_mm, .to_mut_mm => try temp.toRegClass(true, .mmx, cg), |
| 30547 | | .xmm, .to_xmm, .ymm, .to_ymm => try temp.toRegClass(false, .sse, cg), |
| 30548 | | .mut_xmm, .to_mut_xmm, .mut_ymm, .to_mut_ymm => try temp.toRegClass(true, .sse, cg), |
| 30846 | .sse, .to_sse, .xmm, .to_xmm, .ymm, .to_ymm => try temp.toRegClass(false, .sse, cg), |
| 30847 | .mut_sse, .to_mut_sse, .mut_xmm, .to_mut_xmm, .mut_ymm, .to_mut_ymm => try temp.toRegClass(true, .sse, cg), |
| 30549 | 30848 | }; |
| 30550 | 30849 | } |
| 30551 | 30850 | }; |
| ... | ... | @@ -30565,12 +30864,15 @@ const Select = struct { |
| 30565 | 30864 | rc: Register.Class, |
| 30566 | 30865 | rc_mask: struct { rc: Register.Class, info: MaskInfo }, |
| 30567 | 30866 | mem, |
| 30568 | | smin_mem: Select.Operand.Ref, |
| 30569 | | smax_mem: Select.Operand.Ref, |
| 30570 | | umin_mem: Select.Operand.Ref, |
| 30571 | | umax_mem: Select.Operand.Ref, |
| 30867 | smin_mem: ConstInfo, |
| 30868 | smax_mem: ConstInfo, |
| 30869 | umin_mem: ConstInfo, |
| 30870 | umax_mem: ConstInfo, |
| 30572 | 30871 | ref: Select.Operand.Ref, |
| 30573 | 30872 | ref_mask: struct { ref: Select.Operand.Ref, info: MaskInfo }, |
| 30873 | mut_reg: struct { ref: Select.Operand.Ref, rc: Register.Class }, |
| 30874 | |
| 30875 | const ConstInfo = struct { ref: Select.Operand.Ref, vectorize: bool = false }; |
| 30574 | 30876 | |
| 30575 | 30877 | fn finish(kind: Kind, temp: Temp, s: *const Select) void { |
| 30576 | 30878 | switch (kind) { |
| ... | ... | @@ -30590,13 +30892,13 @@ const Select = struct { |
| 30590 | 30892 | .rc => |rc| try cg.tempAllocReg(spec.type, regSetForRegClass(rc)), |
| 30591 | 30893 | .rc_mask => |rc_mask| try cg.tempAllocReg(spec.type, regSetForRegClass(rc_mask.rc)), |
| 30592 | 30894 | .mem => try cg.tempAllocMem(spec.type), |
| 30593 | | .smin_mem, .smax_mem, .umin_mem, .umax_mem => |ty_ref| { |
| 30895 | .smin_mem, .smax_mem, .umin_mem, .umax_mem => |const_info| { |
| 30594 | 30896 | const pt = cg.pt; |
| 30595 | 30897 | const zcu = pt.zcu; |
| 30596 | 30898 | const ip = &zcu.intern_pool; |
| 30597 | | const ty = ty_ref.deref(s).typeOf(s.cg); |
| 30598 | | const vector_len, const scalar_ty: Type = switch (ip.indexToKey(ty.toIntern())) { |
| 30599 | | else => .{ null, ty }, |
| 30899 | const ty = const_info.ref.deref(s).typeOf(s.cg); |
| 30900 | const vector_len: ?u32, const scalar_ty: Type = switch (ip.indexToKey(ty.toIntern())) { |
| 30901 | else => .{ if (const_info.vectorize) 1 else null, ty }, |
| 30600 | 30902 | .vector_type => |vector_type| .{ vector_type.len, .fromInterned(vector_type.child) }, |
| 30601 | 30903 | }; |
| 30602 | 30904 | const res_scalar_ty, const res_scalar_val: Value = res_scalar: switch (scalar_ty.toIntern()) { |
| ... | ... | @@ -30609,7 +30911,10 @@ const Select = struct { |
| 30609 | 30911 | }), |
| 30610 | 30912 | }, |
| 30611 | 30913 | else => { |
| 30612 | | const scalar_info = cg.intInfo(scalar_ty).?; |
| 30914 | const scalar_info: std.builtin.Type.Int = cg.intInfo(scalar_ty) orelse .{ |
| 30915 | .signedness = .signed, |
| 30916 | .bits = cg.floatBits(scalar_ty).?, |
| 30917 | }; |
| 30613 | 30918 | const scalar_int_ty = try pt.intType(scalar_info.signedness, scalar_info.bits); |
| 30614 | 30919 | if (scalar_info.bits <= 64) { |
| 30615 | 30920 | const int_val: i64 = switch (spec.kind) { |
| ... | ... | @@ -30651,6 +30956,15 @@ const Select = struct { |
| 30651 | 30956 | }, |
| 30652 | 30957 | .ref => |ref| ref.deref(s), |
| 30653 | 30958 | .ref_mask => |ref_mask| ref_mask.ref.deref(s), |
| 30959 | .mut_reg => |ref_rc| { |
| 30960 | const temp = ref_rc.ref.deref(s); |
| 30961 | if (temp.isMut(cg)) switch (temp.tracking(cg).short) { |
| 30962 | .register => |reg| if (reg.class() == ref_rc.rc) return temp, |
| 30963 | .register_offset => |reg_off| if (reg_off.off == 0 and reg_off.reg.class() == ref_rc.rc) return temp, |
| 30964 | else => {}, |
| 30965 | }; |
| 30966 | return try cg.tempAllocReg(spec.type, regSetForRegClass(ref_rc.rc)); |
| 30967 | }, |
| 30654 | 30968 | }; |
| 30655 | 30969 | } |
| 30656 | 30970 | }; |
| ... | ... | @@ -30759,6 +31073,7 @@ const Select = struct { |
| 30759 | 31073 | const tmp0d: Sized = .{ .ref = .tmp0, .size = .dword }; |
| 30760 | 31074 | const tmp0p: Sized = .{ .ref = .tmp0, .size = .ptr }; |
| 30761 | 31075 | const tmp0q: Sized = .{ .ref = .tmp0, .size = .qword }; |
| 31076 | const tmp0t: Sized = .{ .ref = .tmp0, .size = .tbyte }; |
| 30762 | 31077 | const tmp0x: Sized = .{ .ref = .tmp0, .size = .xword }; |
| 30763 | 31078 | const tmp0y: Sized = .{ .ref = .tmp0, .size = .yword }; |
| 30764 | 31079 | |
| ... | ... | @@ -30768,6 +31083,7 @@ const Select = struct { |
| 30768 | 31083 | const tmp1d: Sized = .{ .ref = .tmp1, .size = .dword }; |
| 30769 | 31084 | const tmp1p: Sized = .{ .ref = .tmp1, .size = .ptr }; |
| 30770 | 31085 | const tmp1q: Sized = .{ .ref = .tmp1, .size = .qword }; |
| 31086 | const tmp1t: Sized = .{ .ref = .tmp1, .size = .tbyte }; |
| 30771 | 31087 | const tmp1x: Sized = .{ .ref = .tmp1, .size = .xword }; |
| 30772 | 31088 | const tmp1y: Sized = .{ .ref = .tmp1, .size = .yword }; |
| 30773 | 31089 | |
| ... | ... | @@ -30777,6 +31093,7 @@ const Select = struct { |
| 30777 | 31093 | const tmp2d: Sized = .{ .ref = .tmp2, .size = .dword }; |
| 30778 | 31094 | const tmp2p: Sized = .{ .ref = .tmp2, .size = .ptr }; |
| 30779 | 31095 | const tmp2q: Sized = .{ .ref = .tmp2, .size = .qword }; |
| 31096 | const tmp2t: Sized = .{ .ref = .tmp2, .size = .tbyte }; |
| 30780 | 31097 | const tmp2x: Sized = .{ .ref = .tmp2, .size = .xword }; |
| 30781 | 31098 | const tmp2y: Sized = .{ .ref = .tmp2, .size = .yword }; |
| 30782 | 31099 | |
| ... | ... | @@ -30786,6 +31103,7 @@ const Select = struct { |
| 30786 | 31103 | const tmp3d: Sized = .{ .ref = .tmp3, .size = .dword }; |
| 30787 | 31104 | const tmp3p: Sized = .{ .ref = .tmp3, .size = .ptr }; |
| 30788 | 31105 | const tmp3q: Sized = .{ .ref = .tmp3, .size = .qword }; |
| 31106 | const tmp3t: Sized = .{ .ref = .tmp3, .size = .tbyte }; |
| 30789 | 31107 | const tmp3x: Sized = .{ .ref = .tmp3, .size = .xword }; |
| 30790 | 31108 | const tmp3y: Sized = .{ .ref = .tmp3, .size = .yword }; |
| 30791 | 31109 | |
| ... | ... | @@ -30795,6 +31113,7 @@ const Select = struct { |
| 30795 | 31113 | const tmp4d: Sized = .{ .ref = .tmp4, .size = .dword }; |
| 30796 | 31114 | const tmp4p: Sized = .{ .ref = .tmp4, .size = .ptr }; |
| 30797 | 31115 | const tmp4q: Sized = .{ .ref = .tmp4, .size = .qword }; |
| 31116 | const tmp4t: Sized = .{ .ref = .tmp4, .size = .tbyte }; |
| 30798 | 31117 | const tmp4x: Sized = .{ .ref = .tmp4, .size = .xword }; |
| 30799 | 31118 | const tmp4y: Sized = .{ .ref = .tmp4, .size = .yword }; |
| 30800 | 31119 | |
| ... | ... | @@ -30804,6 +31123,7 @@ const Select = struct { |
| 30804 | 31123 | const tmp5d: Sized = .{ .ref = .tmp5, .size = .dword }; |
| 30805 | 31124 | const tmp5p: Sized = .{ .ref = .tmp5, .size = .ptr }; |
| 30806 | 31125 | const tmp5q: Sized = .{ .ref = .tmp5, .size = .qword }; |
| 31126 | const tmp5t: Sized = .{ .ref = .tmp5, .size = .tbyte }; |
| 30807 | 31127 | const tmp5x: Sized = .{ .ref = .tmp5, .size = .xword }; |
| 30808 | 31128 | const tmp5y: Sized = .{ .ref = .tmp5, .size = .yword }; |
| 30809 | 31129 | |
| ... | ... | @@ -30813,6 +31133,7 @@ const Select = struct { |
| 30813 | 31133 | const dst0d: Sized = .{ .ref = .dst0, .size = .dword }; |
| 30814 | 31134 | const dst0p: Sized = .{ .ref = .dst0, .size = .ptr }; |
| 30815 | 31135 | const dst0q: Sized = .{ .ref = .dst0, .size = .qword }; |
| 31136 | const dst0t: Sized = .{ .ref = .dst0, .size = .tbyte }; |
| 30816 | 31137 | const dst0x: Sized = .{ .ref = .dst0, .size = .xword }; |
| 30817 | 31138 | const dst0y: Sized = .{ .ref = .dst0, .size = .yword }; |
| 30818 | 31139 | |
| ... | ... | @@ -30822,6 +31143,7 @@ const Select = struct { |
| 30822 | 31143 | const src0d: Sized = .{ .ref = .src0, .size = .dword }; |
| 30823 | 31144 | const src0p: Sized = .{ .ref = .src0, .size = .ptr }; |
| 30824 | 31145 | const src0q: Sized = .{ .ref = .src0, .size = .qword }; |
| 31146 | const src0t: Sized = .{ .ref = .src0, .size = .tbyte }; |
| 30825 | 31147 | const src0x: Sized = .{ .ref = .src0, .size = .xword }; |
| 30826 | 31148 | const src0y: Sized = .{ .ref = .src0, .size = .yword }; |
| 30827 | 31149 | |
| ... | ... | @@ -30831,6 +31153,7 @@ const Select = struct { |
| 30831 | 31153 | const src1d: Sized = .{ .ref = .src1, .size = .dword }; |
| 30832 | 31154 | const src1p: Sized = .{ .ref = .src1, .size = .ptr }; |
| 30833 | 31155 | const src1q: Sized = .{ .ref = .src1, .size = .qword }; |
| 31156 | const src1t: Sized = .{ .ref = .src1, .size = .tbyte }; |
| 30834 | 31157 | const src1x: Sized = .{ .ref = .src1, .size = .xword }; |
| 30835 | 31158 | const src1y: Sized = .{ .ref = .src1, .size = .yword }; |
| 30836 | 31159 | }; |
| ... | ... | @@ -30852,6 +31175,7 @@ const Select = struct { |
| 30852 | 31175 | const tmp0d: Select.Operand = .{ .tag = .ref, .base = .tmp0d }; |
| 30853 | 31176 | const tmp0p: Select.Operand = .{ .tag = .ref, .base = .tmp0p }; |
| 30854 | 31177 | const tmp0q: Select.Operand = .{ .tag = .ref, .base = .tmp0q }; |
| 31178 | const tmp0t: Select.Operand = .{ .tag = .ref, .base = .tmp0t }; |
| 30855 | 31179 | const tmp0x: Select.Operand = .{ .tag = .ref, .base = .tmp0x }; |
| 30856 | 31180 | const tmp0y: Select.Operand = .{ .tag = .ref, .base = .tmp0y }; |
| 30857 | 31181 | |
| ... | ... | @@ -30860,6 +31184,7 @@ const Select = struct { |
| 30860 | 31184 | const tmp1d: Select.Operand = .{ .tag = .ref, .base = .tmp1d }; |
| 30861 | 31185 | const tmp1p: Select.Operand = .{ .tag = .ref, .base = .tmp1p }; |
| 30862 | 31186 | const tmp1q: Select.Operand = .{ .tag = .ref, .base = .tmp1q }; |
| 31187 | const tmp1t: Select.Operand = .{ .tag = .ref, .base = .tmp1t }; |
| 30863 | 31188 | const tmp1x: Select.Operand = .{ .tag = .ref, .base = .tmp1x }; |
| 30864 | 31189 | const tmp1y: Select.Operand = .{ .tag = .ref, .base = .tmp1y }; |
| 30865 | 31190 | |
| ... | ... | @@ -30868,6 +31193,7 @@ const Select = struct { |
| 30868 | 31193 | const tmp2d: Select.Operand = .{ .tag = .ref, .base = .tmp2d }; |
| 30869 | 31194 | const tmp2p: Select.Operand = .{ .tag = .ref, .base = .tmp2p }; |
| 30870 | 31195 | const tmp2q: Select.Operand = .{ .tag = .ref, .base = .tmp2q }; |
| 31196 | const tmp2t: Select.Operand = .{ .tag = .ref, .base = .tmp2t }; |
| 30871 | 31197 | const tmp2x: Select.Operand = .{ .tag = .ref, .base = .tmp2x }; |
| 30872 | 31198 | const tmp2y: Select.Operand = .{ .tag = .ref, .base = .tmp2y }; |
| 30873 | 31199 | |
| ... | ... | @@ -30876,6 +31202,7 @@ const Select = struct { |
| 30876 | 31202 | const tmp3d: Select.Operand = .{ .tag = .ref, .base = .tmp3d }; |
| 30877 | 31203 | const tmp3p: Select.Operand = .{ .tag = .ref, .base = .tmp3p }; |
| 30878 | 31204 | const tmp3q: Select.Operand = .{ .tag = .ref, .base = .tmp3q }; |
| 31205 | const tmp3t: Select.Operand = .{ .tag = .ref, .base = .tmp3t }; |
| 30879 | 31206 | const tmp3x: Select.Operand = .{ .tag = .ref, .base = .tmp3x }; |
| 30880 | 31207 | const tmp3y: Select.Operand = .{ .tag = .ref, .base = .tmp3y }; |
| 30881 | 31208 | |
| ... | ... | @@ -30884,6 +31211,7 @@ const Select = struct { |
| 30884 | 31211 | const tmp4d: Select.Operand = .{ .tag = .ref, .base = .tmp4d }; |
| 30885 | 31212 | const tmp4p: Select.Operand = .{ .tag = .ref, .base = .tmp4p }; |
| 30886 | 31213 | const tmp4q: Select.Operand = .{ .tag = .ref, .base = .tmp4q }; |
| 31214 | const tmp4t: Select.Operand = .{ .tag = .ref, .base = .tmp4t }; |
| 30887 | 31215 | const tmp4x: Select.Operand = .{ .tag = .ref, .base = .tmp4x }; |
| 30888 | 31216 | const tmp4y: Select.Operand = .{ .tag = .ref, .base = .tmp4y }; |
| 30889 | 31217 | |
| ... | ... | @@ -30892,6 +31220,7 @@ const Select = struct { |
| 30892 | 31220 | const tmp5d: Select.Operand = .{ .tag = .ref, .base = .tmp5d }; |
| 30893 | 31221 | const tmp5p: Select.Operand = .{ .tag = .ref, .base = .tmp5p }; |
| 30894 | 31222 | const tmp5q: Select.Operand = .{ .tag = .ref, .base = .tmp5q }; |
| 31223 | const tmp5t: Select.Operand = .{ .tag = .ref, .base = .tmp5t }; |
| 30895 | 31224 | const tmp5x: Select.Operand = .{ .tag = .ref, .base = .tmp5x }; |
| 30896 | 31225 | const tmp5y: Select.Operand = .{ .tag = .ref, .base = .tmp5y }; |
| 30897 | 31226 | |
| ... | ... | @@ -30900,6 +31229,7 @@ const Select = struct { |
| 30900 | 31229 | const dst0d: Select.Operand = .{ .tag = .ref, .base = .dst0d }; |
| 30901 | 31230 | const dst0p: Select.Operand = .{ .tag = .ref, .base = .dst0p }; |
| 30902 | 31231 | const dst0q: Select.Operand = .{ .tag = .ref, .base = .dst0q }; |
| 31232 | const dst0t: Select.Operand = .{ .tag = .ref, .base = .dst0t }; |
| 30903 | 31233 | const dst0x: Select.Operand = .{ .tag = .ref, .base = .dst0x }; |
| 30904 | 31234 | const dst0y: Select.Operand = .{ .tag = .ref, .base = .dst0y }; |
| 30905 | 31235 | |
| ... | ... | @@ -30908,6 +31238,7 @@ const Select = struct { |
| 30908 | 31238 | const src0d: Select.Operand = .{ .tag = .ref, .base = .src0d }; |
| 30909 | 31239 | const src0p: Select.Operand = .{ .tag = .ref, .base = .src0p }; |
| 30910 | 31240 | const src0q: Select.Operand = .{ .tag = .ref, .base = .src0q }; |
| 31241 | const src0t: Select.Operand = .{ .tag = .ref, .base = .src0t }; |
| 30911 | 31242 | const src0x: Select.Operand = .{ .tag = .ref, .base = .src0x }; |
| 30912 | 31243 | const src0y: Select.Operand = .{ .tag = .ref, .base = .src0y }; |
| 30913 | 31244 | |
| ... | ... | @@ -30916,6 +31247,7 @@ const Select = struct { |
| 30916 | 31247 | const src1d: Select.Operand = .{ .tag = .ref, .base = .src1d }; |
| 30917 | 31248 | const src1p: Select.Operand = .{ .tag = .ref, .base = .src1p }; |
| 30918 | 31249 | const src1q: Select.Operand = .{ .tag = .ref, .base = .src1q }; |
| 31250 | const src1t: Select.Operand = .{ .tag = .ref, .base = .src1t }; |
| 30919 | 31251 | const src1x: Select.Operand = .{ .tag = .ref, .base = .src1x }; |
| 30920 | 31252 | const src1y: Select.Operand = .{ .tag = .ref, .base = .src1y }; |
| 30921 | 31253 | |
| ... | ... | @@ -31150,7 +31482,7 @@ const Select = struct { |
| 31150 | 31482 | else => unreachable, |
| 31151 | 31483 | } }, |
| 31152 | 31484 | else => |mcv| .{ .mem = try mcv.mem(s.cg, .{ .size = op.base.size }) }, |
| 31153 | | .register => |reg| .{ .reg = registerAlias(reg, @intCast(@divExact(op.base.size.bitSize(s.cg.target), 8))) }, |
| 31485 | .register => |reg| .{ .reg = s.lowerReg(registerAlias(reg, @intCast(@divExact(op.base.size.bitSize(s.cg.target), 8)))) }, |
| 31154 | 31486 | }, |
| 31155 | 31487 | .simm => .{ .imm = .s(op.adjustedImm(i32, s)) }, |
| 31156 | 31488 | .uimm => .{ .imm = .u(@bitCast(op.adjustedImm(i64, s))) }, |
| ... | ... | @@ -31202,11 +31534,18 @@ fn select( |
| 31202 | 31534 | .cg = cg, |
| 31203 | 31535 | .temps = undefined, |
| 31204 | 31536 | .labels = @splat(.{ .forward = @splat(null), .backward = null }), |
| 31537 | .top = 0, |
| 31205 | 31538 | }; |
| 31206 | 31539 | const tmp_slots = s.temps[@intFromEnum(Select.Operand.Ref.tmp0)..@intFromEnum(Select.Operand.Ref.dst0)]; |
| 31207 | 31540 | const dst_slots = s.temps[@intFromEnum(Select.Operand.Ref.dst0)..@intFromEnum(Select.Operand.Ref.src0)]; |
| 31208 | 31541 | const src_slots = s.temps[@intFromEnum(Select.Operand.Ref.src0)..@intFromEnum(Select.Operand.Ref.none)]; |
| 31209 | 31542 | |
| 31543 | for (0..case.clobbers.st -| 1) |i| { |
| 31544 | const tracked_index: RegisterManager.TrackedIndex = @intCast(RegisterManager.indexOfKnownRegIntoTracked(.st6).? - i); |
| 31545 | try cg.register_manager.getRegIndex(tracked_index, null); |
| 31546 | _ = cg.register_manager.lockRegIndexAssumeUnused(tracked_index); |
| 31547 | } |
| 31548 | |
| 31210 | 31549 | @memcpy(src_slots[0..src_temps.len], src_temps); |
| 31211 | 31550 | std.mem.swap(Temp, &src_slots[pattern.commute[0]], &src_slots[pattern.commute[1]]); |
| 31212 | 31551 | for (tmp_slots, case.extra_temps) |*slot, spec| slot.* = try spec.create(&s) orelse continue; |
| ... | ... | @@ -31217,7 +31556,7 @@ fn select( |
| 31217 | 31556 | @memcpy(src_slots[0..src_temps.len], src_temps); |
| 31218 | 31557 | std.mem.swap(Temp, &src_slots[pattern.commute[0]], &src_slots[pattern.commute[1]]); |
| 31219 | 31558 | |
| 31220 | | if (case.clobbers.eflags or case.each != .once) try cg.spillEflagsIfOccupied(); |
| 31559 | if (case.clobbers.eflags) try cg.spillEflagsIfOccupied(); |
| 31221 | 31560 | |
| 31222 | 31561 | for (dst_temps, dst_tys, case.dst_temps[0..dst_temps.len]) |*dst_temp, dst_ty, dst_kind| |
| 31223 | 31562 | dst_temp.* = (try Select.TempSpec.create(.{ .type = dst_ty, .kind = dst_kind }, &s)).?; |
| ... | ... | @@ -31229,7 +31568,11 @@ fn select( |
| 31229 | 31568 | s.emitLabel(.@"0:"); |
| 31230 | 31569 | }, |
| 31231 | 31570 | } |
| 31571 | assert(s.top == 0); |
| 31232 | 31572 | |
| 31573 | for (0..case.clobbers.st -| 1) |i| cg.register_manager.unlockReg(.{ |
| 31574 | .tracked_index = @intCast(RegisterManager.indexOfKnownRegIntoTracked(.st6).? - i), |
| 31575 | }); |
| 31233 | 31576 | for (dst_temps, case.dst_temps[0..dst_temps.len]) |dst_temp, dst_kind| dst_kind.finish(dst_temp, &s); |
| 31234 | 31577 | for (case.extra_temps, tmp_slots) |spec, temp| if (spec.kind != .unused) try temp.die(cg); |
| 31235 | 31578 | return; |