authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-08-23 02:04:59+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-09-19 18:20:21-07:00
logda8b7fb0c01f3b71af99eee6fcff6b1a9d216f13
tree2e0c314c3f636e279b19455de39d5fd59db8f17a
parent662683cafd552404fb704e9d0a8caf1eaaf35af8

std.Target: Update CPU models/features for LLVM 19.

11 files changed, 2156 insertions(+), 584 deletions(-)

lib/std/Target/aarch64.zig+701-379
...@@ -5,15 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -5,15 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;5const CpuModel = std.Target.Cpu.Model;
66
7pub const Feature = enum {7pub const Feature = enum {
8 a510,8 addr_lsl_slow_14,
9 a520,
10 a65,
11 a710,
12 a720,
13 a76,
14 a78,
15 a78c,
16 addr_lsl_fast,
17 aes,9 aes,
18 aggressive_fma,10 aggressive_fma,
19 alternate_sextload_cvt_f32_pattern,11 alternate_sextload_cvt_f32_pattern,
...@@ -46,7 +38,6 @@ pub const Feature = enum {...@@ -46,7 +38,6 @@ pub const Feature = enum {
46 cmp_bcc_fusion,38 cmp_bcc_fusion,
47 complxnum,39 complxnum,
48 contextidr_el2,40 contextidr_el2,
49 cortex_r82,
50 cpa,41 cpa,
51 crc,42 crc,
52 crypto,43 crypto,
...@@ -77,7 +68,7 @@ pub const Feature = enum {...@@ -77,7 +68,7 @@ pub const Feature = enum {
77 fp8dot4,68 fp8dot4,
78 fp8fma,69 fp8fma,
79 fp_armv8,70 fp_armv8,
80 fpmr,71 fpac,
81 fptoint,72 fptoint,
82 fullfp16,73 fullfp16,
83 fuse_address,74 fuse_address,
...@@ -131,6 +122,7 @@ pub const Feature = enum {...@@ -131,6 +122,7 @@ pub const Feature = enum {
131 rcpc3,122 rcpc3,
132 rcpc_immo,123 rcpc_immo,
133 rdm,124 rdm,
125 reserve_lr_for_ra,
134 reserve_x1,126 reserve_x1,
135 reserve_x10,127 reserve_x10,
136 reserve_x11,128 reserve_x11,
...@@ -150,7 +142,6 @@ pub const Feature = enum {...@@ -150,7 +142,6 @@ pub const Feature = enum {
150 reserve_x27,142 reserve_x27,
151 reserve_x28,143 reserve_x28,
152 reserve_x3,144 reserve_x3,
153 reserve_x30,
154 reserve_x4,145 reserve_x4,
155 reserve_x5,146 reserve_x5,
156 reserve_x6,147 reserve_x6,
...@@ -168,6 +159,7 @@ pub const Feature = enum {...@@ -168,6 +159,7 @@ pub const Feature = enum {
168 sme,159 sme,
169 sme2,160 sme2,
170 sme2p1,161 sme2p1,
162 sme_b16b16,
171 sme_f16f16,163 sme_f16f16,
172 sme_f64f64,164 sme_f64f64,
173 sme_f8f16,165 sme_f8f16,
...@@ -193,6 +185,7 @@ pub const Feature = enum {...@@ -193,6 +185,7 @@ pub const Feature = enum {
193 sve2_sha3,185 sve2_sha3,
194 sve2_sm4,186 sve2_sm4,
195 sve2p1,187 sve2p1,
188 sve_b16b16,
196 tagged_globals,189 tagged_globals,
197 the,190 the,
198 tlb_rmi,191 tlb_rmi,
...@@ -206,6 +199,7 @@ pub const Feature = enum {...@@ -206,6 +199,7 @@ pub const Feature = enum {
206 trbe,199 trbe,
207 uaops,200 uaops,
208 use_experimental_zeroing_pseudos,201 use_experimental_zeroing_pseudos,
202 use_fixed_over_scalable_if_equal_cost,
209 use_postra_scheduler,203 use_postra_scheduler,
210 use_reciprocal_square_root,204 use_reciprocal_square_root,
211 use_scalar_inc_vl,205 use_scalar_inc_vl,
...@@ -245,112 +239,14 @@ pub const all_features = blk: {...@@ -245,112 +239,14 @@ pub const all_features = blk: {
245 const len = @typeInfo(Feature).@"enum".fields.len;239 const len = @typeInfo(Feature).@"enum".fields.len;
246 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);240 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
247 var result: [len]CpuFeature = undefined;241 var result: [len]CpuFeature = undefined;
248 result[@intFromEnum(Feature.a510)] = .{242 result[@intFromEnum(Feature.addr_lsl_slow_14)] = .{
249 .llvm_name = "a510",243 .llvm_name = "addr-lsl-slow-14",
250 .description = "Cortex-A510 ARM processors",244 .description = "Address operands with shift amount of 1 or 4 are slow",
251 .dependencies = featureSet(&[_]Feature{
252 .fuse_adrp_add,
253 .fuse_aes,
254 .use_postra_scheduler,
255 }),
256 };
257 result[@intFromEnum(Feature.a520)] = .{
258 .llvm_name = "a520",
259 .description = "Cortex-A520 ARM processors",
260 .dependencies = featureSet(&[_]Feature{
261 .fuse_adrp_add,
262 .fuse_aes,
263 .use_postra_scheduler,
264 }),
265 };
266 result[@intFromEnum(Feature.a65)] = .{
267 .llvm_name = "a65",
268 .description = "Cortex-A65 ARM processors",
269 .dependencies = featureSet(&[_]Feature{
270 .enable_select_opt,
271 .fuse_address,
272 .fuse_adrp_add,
273 .fuse_aes,
274 .fuse_literals,
275 .predictable_select_expensive,
276 }),
277 };
278 result[@intFromEnum(Feature.a710)] = .{
279 .llvm_name = "a710",
280 .description = "Cortex-A710 ARM processors",
281 .dependencies = featureSet(&[_]Feature{
282 .addr_lsl_fast,
283 .alu_lsl_fast,
284 .cmp_bcc_fusion,
285 .enable_select_opt,
286 .fuse_adrp_add,
287 .fuse_aes,
288 .predictable_select_expensive,
289 .use_postra_scheduler,
290 }),
291 };
292 result[@intFromEnum(Feature.a720)] = .{
293 .llvm_name = "a720",
294 .description = "Cortex-A720 ARM processors",
295 .dependencies = featureSet(&[_]Feature{
296 .addr_lsl_fast,
297 .alu_lsl_fast,
298 .cmp_bcc_fusion,
299 .enable_select_opt,
300 .fuse_adrp_add,
301 .fuse_aes,
302 .predictable_select_expensive,
303 .use_postra_scheduler,
304 }),
305 };
306 result[@intFromEnum(Feature.a76)] = .{
307 .llvm_name = "a76",
308 .description = "Cortex-A76 ARM processors",
309 .dependencies = featureSet(&[_]Feature{
310 .addr_lsl_fast,
311 .alu_lsl_fast,
312 .enable_select_opt,
313 .fuse_adrp_add,
314 .fuse_aes,
315 .predictable_select_expensive,
316 }),
317 };
318 result[@intFromEnum(Feature.a78)] = .{
319 .llvm_name = "a78",
320 .description = "Cortex-A78 ARM processors",
321 .dependencies = featureSet(&[_]Feature{
322 .addr_lsl_fast,
323 .alu_lsl_fast,
324 .cmp_bcc_fusion,
325 .enable_select_opt,
326 .fuse_adrp_add,
327 .fuse_aes,
328 .predictable_select_expensive,
329 .use_postra_scheduler,
330 }),
331 };
332 result[@intFromEnum(Feature.a78c)] = .{
333 .llvm_name = "a78c",
334 .description = "Cortex-A78C ARM processors",
335 .dependencies = featureSet(&[_]Feature{
336 .addr_lsl_fast,
337 .alu_lsl_fast,
338 .cmp_bcc_fusion,
339 .enable_select_opt,
340 .fuse_adrp_add,
341 .fuse_aes,
342 .predictable_select_expensive,
343 .use_postra_scheduler,
344 }),
345 };
346 result[@intFromEnum(Feature.addr_lsl_fast)] = .{
347 .llvm_name = "addr-lsl-fast",
348 .description = "Address operands with logical shift of up to 3 places are cheap",
349 .dependencies = featureSet(&[_]Feature{}),245 .dependencies = featureSet(&[_]Feature{}),
350 };246 };
351 result[@intFromEnum(Feature.aes)] = .{247 result[@intFromEnum(Feature.aes)] = .{
352 .llvm_name = "aes",248 .llvm_name = "aes",
353 .description = "Enable AES support (FEAT_AES, FEAT_PMULL)",249 .description = "Enable AES support",
354 .dependencies = featureSet(&[_]Feature{250 .dependencies = featureSet(&[_]Feature{
355 .neon,251 .neon,
356 }),252 }),
...@@ -367,7 +263,7 @@ pub const all_features = blk: {...@@ -367,7 +263,7 @@ pub const all_features = blk: {
367 };263 };
368 result[@intFromEnum(Feature.altnzcv)] = .{264 result[@intFromEnum(Feature.altnzcv)] = .{
369 .llvm_name = "altnzcv",265 .llvm_name = "altnzcv",
370 .description = "Enable alternative NZCV format for floating point comparisons (FEAT_FlagM2)",266 .description = "Enable alternative NZCV format for floating point comparisons",
371 .dependencies = featureSet(&[_]Feature{}),267 .dependencies = featureSet(&[_]Feature{}),
372 };268 };
373 result[@intFromEnum(Feature.alu_lsl_fast)] = .{269 result[@intFromEnum(Feature.alu_lsl_fast)] = .{
...@@ -377,12 +273,12 @@ pub const all_features = blk: {...@@ -377,12 +273,12 @@ pub const all_features = blk: {
377 };273 };
378 result[@intFromEnum(Feature.am)] = .{274 result[@intFromEnum(Feature.am)] = .{
379 .llvm_name = "am",275 .llvm_name = "am",
380 .description = "Enable v8.4-A Activity Monitors extension (FEAT_AMUv1)",276 .description = "Enable Armv8.4-A Activity Monitors extension",
381 .dependencies = featureSet(&[_]Feature{}),277 .dependencies = featureSet(&[_]Feature{}),
382 };278 };
383 result[@intFromEnum(Feature.amvs)] = .{279 result[@intFromEnum(Feature.amvs)] = .{
384 .llvm_name = "amvs",280 .llvm_name = "amvs",
385 .description = "Enable v8.6-A Activity Monitors Virtualization support (FEAT_AMUv1p1)",281 .description = "Enable Armv8.6-A Activity Monitors Virtualization support",
386 .dependencies = featureSet(&[_]Feature{282 .dependencies = featureSet(&[_]Feature{
387 .am,283 .am,
388 }),284 }),
...@@ -404,7 +300,7 @@ pub const all_features = blk: {...@@ -404,7 +300,7 @@ pub const all_features = blk: {
404 };300 };
405 result[@intFromEnum(Feature.b16b16)] = .{301 result[@intFromEnum(Feature.b16b16)] = .{
406 .llvm_name = "b16b16",302 .llvm_name = "b16b16",
407 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions (FEAT_B16B16)",303 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions",
408 .dependencies = featureSet(&[_]Feature{304 .dependencies = featureSet(&[_]Feature{
409 .bf16,305 .bf16,
410 }),306 }),
...@@ -416,17 +312,17 @@ pub const all_features = blk: {...@@ -416,17 +312,17 @@ pub const all_features = blk: {
416 };312 };
417 result[@intFromEnum(Feature.bf16)] = .{313 result[@intFromEnum(Feature.bf16)] = .{
418 .llvm_name = "bf16",314 .llvm_name = "bf16",
419 .description = "Enable BFloat16 Extension (FEAT_BF16)",315 .description = "Enable BFloat16 Extension",
420 .dependencies = featureSet(&[_]Feature{}),316 .dependencies = featureSet(&[_]Feature{}),
421 };317 };
422 result[@intFromEnum(Feature.brbe)] = .{318 result[@intFromEnum(Feature.brbe)] = .{
423 .llvm_name = "brbe",319 .llvm_name = "brbe",
424 .description = "Enable Branch Record Buffer Extension (FEAT_BRBE)",320 .description = "Enable Branch Record Buffer Extension",
425 .dependencies = featureSet(&[_]Feature{}),321 .dependencies = featureSet(&[_]Feature{}),
426 };322 };
427 result[@intFromEnum(Feature.bti)] = .{323 result[@intFromEnum(Feature.bti)] = .{
428 .llvm_name = "bti",324 .llvm_name = "bti",
429 .description = "Enable Branch Target Identification (FEAT_BTI)",325 .description = "Enable Branch Target Identification",
430 .dependencies = featureSet(&[_]Feature{}),326 .dependencies = featureSet(&[_]Feature{}),
431 };327 };
432 result[@intFromEnum(Feature.call_saved_x10)] = .{328 result[@intFromEnum(Feature.call_saved_x10)] = .{
...@@ -476,27 +372,27 @@ pub const all_features = blk: {...@@ -476,27 +372,27 @@ pub const all_features = blk: {
476 };372 };
477 result[@intFromEnum(Feature.ccdp)] = .{373 result[@intFromEnum(Feature.ccdp)] = .{
478 .llvm_name = "ccdp",374 .llvm_name = "ccdp",
479 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)",375 .description = "Enable Armv8.5-A Cache Clean to Point of Deep Persistence",
480 .dependencies = featureSet(&[_]Feature{}),376 .dependencies = featureSet(&[_]Feature{}),
481 };377 };
482 result[@intFromEnum(Feature.ccidx)] = .{378 result[@intFromEnum(Feature.ccidx)] = .{
483 .llvm_name = "ccidx",379 .llvm_name = "ccidx",
484 .description = "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)",380 .description = "Enable Armv8.3-A Extend of the CCSIDR number of sets",
485 .dependencies = featureSet(&[_]Feature{}),381 .dependencies = featureSet(&[_]Feature{}),
486 };382 };
487 result[@intFromEnum(Feature.ccpp)] = .{383 result[@intFromEnum(Feature.ccpp)] = .{
488 .llvm_name = "ccpp",384 .llvm_name = "ccpp",
489 .description = "Enable v8.2 data Cache Clean to Point of Persistence (FEAT_DPB)",385 .description = "Enable Armv8.2-A data Cache Clean to Point of Persistence",
490 .dependencies = featureSet(&[_]Feature{}),386 .dependencies = featureSet(&[_]Feature{}),
491 };387 };
492 result[@intFromEnum(Feature.chk)] = .{388 result[@intFromEnum(Feature.chk)] = .{
493 .llvm_name = "chk",389 .llvm_name = "chk",
494 .description = "Enable Armv8.0-A Check Feature Status Extension (FEAT_CHK)",390 .description = "Enable Armv8.0-A Check Feature Status Extension",
495 .dependencies = featureSet(&[_]Feature{}),391 .dependencies = featureSet(&[_]Feature{}),
496 };392 };
497 result[@intFromEnum(Feature.clrbhb)] = .{393 result[@intFromEnum(Feature.clrbhb)] = .{
498 .llvm_name = "clrbhb",394 .llvm_name = "clrbhb",
499 .description = "Enable Clear BHB instruction (FEAT_CLRBHB)",395 .description = "Enable Clear BHB instruction",
500 .dependencies = featureSet(&[_]Feature{}),396 .dependencies = featureSet(&[_]Feature{}),
501 };397 };
502 result[@intFromEnum(Feature.cmp_bcc_fusion)] = .{398 result[@intFromEnum(Feature.cmp_bcc_fusion)] = .{
...@@ -506,7 +402,7 @@ pub const all_features = blk: {...@@ -506,7 +402,7 @@ pub const all_features = blk: {
506 };402 };
507 result[@intFromEnum(Feature.complxnum)] = .{403 result[@intFromEnum(Feature.complxnum)] = .{
508 .llvm_name = "complxnum",404 .llvm_name = "complxnum",
509 .description = "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)",405 .description = "Enable Armv8.3-A Floating-point complex number support",
510 .dependencies = featureSet(&[_]Feature{406 .dependencies = featureSet(&[_]Feature{
511 .neon,407 .neon,
512 }),408 }),
...@@ -516,21 +412,14 @@ pub const all_features = blk: {...@@ -516,21 +412,14 @@ pub const all_features = blk: {
516 .description = "Enable RW operand Context ID Register (EL2)",412 .description = "Enable RW operand Context ID Register (EL2)",
517 .dependencies = featureSet(&[_]Feature{}),413 .dependencies = featureSet(&[_]Feature{}),
518 };414 };
519 result[@intFromEnum(Feature.cortex_r82)] = .{
520 .llvm_name = "cortex-r82",
521 .description = "Cortex-R82 ARM processors",
522 .dependencies = featureSet(&[_]Feature{
523 .use_postra_scheduler,
524 }),
525 };
526 result[@intFromEnum(Feature.cpa)] = .{415 result[@intFromEnum(Feature.cpa)] = .{
527 .llvm_name = "cpa",416 .llvm_name = "cpa",
528 .description = "Enable Armv9.5-A Checked Pointer Arithmetic (FEAT_CPA)",417 .description = "Enable Armv9.5-A Checked Pointer Arithmetic",
529 .dependencies = featureSet(&[_]Feature{}),418 .dependencies = featureSet(&[_]Feature{}),
530 };419 };
531 result[@intFromEnum(Feature.crc)] = .{420 result[@intFromEnum(Feature.crc)] = .{
532 .llvm_name = "crc",421 .llvm_name = "crc",
533 .description = "Enable ARMv8 CRC-32 checksum instructions (FEAT_CRC32)",422 .description = "Enable Armv8.0-A CRC-32 checksum instructions",
534 .dependencies = featureSet(&[_]Feature{}),423 .dependencies = featureSet(&[_]Feature{}),
535 };424 };
536 result[@intFromEnum(Feature.crypto)] = .{425 result[@intFromEnum(Feature.crypto)] = .{
...@@ -543,12 +432,12 @@ pub const all_features = blk: {...@@ -543,12 +432,12 @@ pub const all_features = blk: {
543 };432 };
544 result[@intFromEnum(Feature.cssc)] = .{433 result[@intFromEnum(Feature.cssc)] = .{
545 .llvm_name = "cssc",434 .llvm_name = "cssc",
546 .description = "Enable Common Short Sequence Compression (CSSC) instructions (FEAT_CSSC)",435 .description = "Enable Common Short Sequence Compression (CSSC) instructions",
547 .dependencies = featureSet(&[_]Feature{}),436 .dependencies = featureSet(&[_]Feature{}),
548 };437 };
549 result[@intFromEnum(Feature.d128)] = .{438 result[@intFromEnum(Feature.d128)] = .{
550 .llvm_name = "d128",439 .llvm_name = "d128",
551 .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and Instructions (FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128)",440 .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and instructions",
552 .dependencies = featureSet(&[_]Feature{441 .dependencies = featureSet(&[_]Feature{
553 .lse128,442 .lse128,
554 }),443 }),
...@@ -570,17 +459,19 @@ pub const all_features = blk: {...@@ -570,17 +459,19 @@ pub const all_features = blk: {
570 };459 };
571 result[@intFromEnum(Feature.dit)] = .{460 result[@intFromEnum(Feature.dit)] = .{
572 .llvm_name = "dit",461 .llvm_name = "dit",
573 .description = "Enable v8.4-A Data Independent Timing instructions (FEAT_DIT)",462 .description = "Enable Armv8.4-A Data Independent Timing instructions",
574 .dependencies = featureSet(&[_]Feature{}),463 .dependencies = featureSet(&[_]Feature{}),
575 };464 };
576 result[@intFromEnum(Feature.dotprod)] = .{465 result[@intFromEnum(Feature.dotprod)] = .{
577 .llvm_name = "dotprod",466 .llvm_name = "dotprod",
578 .description = "Enable dot product support (FEAT_DotProd)",467 .description = "Enable dot product support",
579 .dependencies = featureSet(&[_]Feature{}),468 .dependencies = featureSet(&[_]Feature{
469 .neon,
470 }),
580 };471 };
581 result[@intFromEnum(Feature.ecv)] = .{472 result[@intFromEnum(Feature.ecv)] = .{
582 .llvm_name = "ecv",473 .llvm_name = "ecv",
583 .description = "Enable enhanced counter virtualization extension (FEAT_ECV)",474 .description = "Enable enhanced counter virtualization extension",
584 .dependencies = featureSet(&[_]Feature{}),475 .dependencies = featureSet(&[_]Feature{}),
585 };476 };
586 result[@intFromEnum(Feature.el2vmsa)] = .{477 result[@intFromEnum(Feature.el2vmsa)] = .{
...@@ -600,7 +491,7 @@ pub const all_features = blk: {...@@ -600,7 +491,7 @@ pub const all_features = blk: {
600 };491 };
601 result[@intFromEnum(Feature.ete)] = .{492 result[@intFromEnum(Feature.ete)] = .{
602 .llvm_name = "ete",493 .llvm_name = "ete",
603 .description = "Enable Embedded Trace Extension (FEAT_ETE)",494 .description = "Enable Embedded Trace Extension",
604 .dependencies = featureSet(&[_]Feature{495 .dependencies = featureSet(&[_]Feature{
605 .trbe,496 .trbe,
606 }),497 }),
...@@ -612,26 +503,26 @@ pub const all_features = blk: {...@@ -612,26 +503,26 @@ pub const all_features = blk: {
612 };503 };
613 result[@intFromEnum(Feature.f32mm)] = .{504 result[@intFromEnum(Feature.f32mm)] = .{
614 .llvm_name = "f32mm",505 .llvm_name = "f32mm",
615 .description = "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)",506 .description = "Enable Matrix Multiply FP32 Extension",
616 .dependencies = featureSet(&[_]Feature{507 .dependencies = featureSet(&[_]Feature{
617 .sve,508 .sve,
618 }),509 }),
619 };510 };
620 result[@intFromEnum(Feature.f64mm)] = .{511 result[@intFromEnum(Feature.f64mm)] = .{
621 .llvm_name = "f64mm",512 .llvm_name = "f64mm",
622 .description = "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)",513 .description = "Enable Matrix Multiply FP64 Extension",
623 .dependencies = featureSet(&[_]Feature{514 .dependencies = featureSet(&[_]Feature{
624 .sve,515 .sve,
625 }),516 }),
626 };517 };
627 result[@intFromEnum(Feature.faminmax)] = .{518 result[@intFromEnum(Feature.faminmax)] = .{
628 .llvm_name = "faminmax",519 .llvm_name = "faminmax",
629 .description = "Enable FAMIN and FAMAX instructions (FEAT_FAMINMAX)",520 .description = "Enable FAMIN and FAMAX instructions",
630 .dependencies = featureSet(&[_]Feature{}),521 .dependencies = featureSet(&[_]Feature{}),
631 };522 };
632 result[@intFromEnum(Feature.fgt)] = .{523 result[@intFromEnum(Feature.fgt)] = .{
633 .llvm_name = "fgt",524 .llvm_name = "fgt",
634 .description = "Enable fine grained virtualization traps extension (FEAT_FGT)",525 .description = "Enable fine grained virtualization traps extension",
635 .dependencies = featureSet(&[_]Feature{}),526 .dependencies = featureSet(&[_]Feature{}),
636 };527 };
637 result[@intFromEnum(Feature.fix_cortex_a53_835769)] = .{528 result[@intFromEnum(Feature.fix_cortex_a53_835769)] = .{
...@@ -641,7 +532,7 @@ pub const all_features = blk: {...@@ -641,7 +532,7 @@ pub const all_features = blk: {
641 };532 };
642 result[@intFromEnum(Feature.flagm)] = .{533 result[@intFromEnum(Feature.flagm)] = .{
643 .llvm_name = "flagm",534 .llvm_name = "flagm",
644 .description = "Enable v8.4-A Flag Manipulation Instructions (FEAT_FlagM)",535 .description = "Enable Armv8.4-A Flag Manipulation instructions",
645 .dependencies = featureSet(&[_]Feature{}),536 .dependencies = featureSet(&[_]Feature{}),
646 };537 };
647 result[@intFromEnum(Feature.fmv)] = .{538 result[@intFromEnum(Feature.fmv)] = .{
...@@ -656,49 +547,59 @@ pub const all_features = blk: {...@@ -656,49 +547,59 @@ pub const all_features = blk: {
656 };547 };
657 result[@intFromEnum(Feature.fp16fml)] = .{548 result[@intFromEnum(Feature.fp16fml)] = .{
658 .llvm_name = "fp16fml",549 .llvm_name = "fp16fml",
659 .description = "Enable FP16 FML instructions (FEAT_FHM)",550 .description = "Enable FP16 FML instructions",
660 .dependencies = featureSet(&[_]Feature{551 .dependencies = featureSet(&[_]Feature{
661 .fullfp16,552 .fullfp16,
662 }),553 }),
663 };554 };
664 result[@intFromEnum(Feature.fp8)] = .{555 result[@intFromEnum(Feature.fp8)] = .{
665 .llvm_name = "fp8",556 .llvm_name = "fp8",
666 .description = "Enable FP8 instructions (FEAT_FP8)",557 .description = "Enable FP8 instructions",
667 .dependencies = featureSet(&[_]Feature{}),558 .dependencies = featureSet(&[_]Feature{
559 .bf16,
560 .faminmax,
561 .lut,
562 }),
668 };563 };
669 result[@intFromEnum(Feature.fp8dot2)] = .{564 result[@intFromEnum(Feature.fp8dot2)] = .{
670 .llvm_name = "fp8dot2",565 .llvm_name = "fp8dot2",
671 .description = "Enable fp8 2-way dot instructions (FEAT_FP8DOT2)",566 .description = "Enable FP8 2-way dot instructions",
672 .dependencies = featureSet(&[_]Feature{}),567 .dependencies = featureSet(&[_]Feature{
568 .fp8dot4,
569 }),
673 };570 };
674 result[@intFromEnum(Feature.fp8dot4)] = .{571 result[@intFromEnum(Feature.fp8dot4)] = .{
675 .llvm_name = "fp8dot4",572 .llvm_name = "fp8dot4",
676 .description = "Enable fp8 4-way dot instructions (FEAT_FP8DOT4)",573 .description = "Enable FP8 4-way dot instructions",
677 .dependencies = featureSet(&[_]Feature{}),574 .dependencies = featureSet(&[_]Feature{
575 .fp8fma,
576 }),
678 };577 };
679 result[@intFromEnum(Feature.fp8fma)] = .{578 result[@intFromEnum(Feature.fp8fma)] = .{
680 .llvm_name = "fp8fma",579 .llvm_name = "fp8fma",
681 .description = "Enable fp8 multiply-add instructions (FEAT_FP8FMA)",580 .description = "Enable Armv9.5-A FP8 multiply-add instructions",
682 .dependencies = featureSet(&[_]Feature{}),581 .dependencies = featureSet(&[_]Feature{
582 .fp8,
583 }),
683 };584 };
684 result[@intFromEnum(Feature.fp_armv8)] = .{585 result[@intFromEnum(Feature.fp_armv8)] = .{
685 .llvm_name = "fp-armv8",586 .llvm_name = "fp-armv8",
686 .description = "Enable ARMv8 FP (FEAT_FP)",587 .description = "Enable Armv8.0-A Floating Point Extensions",
687 .dependencies = featureSet(&[_]Feature{}),588 .dependencies = featureSet(&[_]Feature{}),
688 };589 };
689 result[@intFromEnum(Feature.fpmr)] = .{590 result[@intFromEnum(Feature.fpac)] = .{
690 .llvm_name = "fpmr",591 .llvm_name = "fpac",
691 .description = "Enable FPMR Register (FEAT_FPMR)",592 .description = "Enable v8.3-A Pointer Authentication Faulting enhancement",
692 .dependencies = featureSet(&[_]Feature{}),593 .dependencies = featureSet(&[_]Feature{}),
693 };594 };
694 result[@intFromEnum(Feature.fptoint)] = .{595 result[@intFromEnum(Feature.fptoint)] = .{
695 .llvm_name = "fptoint",596 .llvm_name = "fptoint",
696 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int (FEAT_FRINTTS)",597 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
697 .dependencies = featureSet(&[_]Feature{}),598 .dependencies = featureSet(&[_]Feature{}),
698 };599 };
699 result[@intFromEnum(Feature.fullfp16)] = .{600 result[@intFromEnum(Feature.fullfp16)] = .{
700 .llvm_name = "fullfp16",601 .llvm_name = "fullfp16",
701 .description = "Full FP16 (FEAT_FP16)",602 .description = "Enable half-precision floating-point data processing",
702 .dependencies = featureSet(&[_]Feature{603 .dependencies = featureSet(&[_]Feature{
703 .fp_armv8,604 .fp_armv8,
704 }),605 }),
...@@ -767,29 +668,29 @@ pub const all_features = blk: {...@@ -767,29 +668,29 @@ pub const all_features = blk: {
767 };668 };
768 result[@intFromEnum(Feature.hbc)] = .{669 result[@intFromEnum(Feature.hbc)] = .{
769 .llvm_name = "hbc",670 .llvm_name = "hbc",
770 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension (FEAT_HBC)",671 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension",
771 .dependencies = featureSet(&[_]Feature{}),672 .dependencies = featureSet(&[_]Feature{}),
772 };673 };
773 result[@intFromEnum(Feature.hcx)] = .{674 result[@intFromEnum(Feature.hcx)] = .{
774 .llvm_name = "hcx",675 .llvm_name = "hcx",
775 .description = "Enable Armv8.7-A HCRX_EL2 system register (FEAT_HCX)",676 .description = "Enable Armv8.7-A HCRX_EL2 system register",
776 .dependencies = featureSet(&[_]Feature{}),677 .dependencies = featureSet(&[_]Feature{}),
777 };678 };
778 result[@intFromEnum(Feature.i8mm)] = .{679 result[@intFromEnum(Feature.i8mm)] = .{
779 .llvm_name = "i8mm",680 .llvm_name = "i8mm",
780 .description = "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)",681 .description = "Enable Matrix Multiply Int8 Extension",
781 .dependencies = featureSet(&[_]Feature{}),682 .dependencies = featureSet(&[_]Feature{}),
782 };683 };
783 result[@intFromEnum(Feature.ite)] = .{684 result[@intFromEnum(Feature.ite)] = .{
784 .llvm_name = "ite",685 .llvm_name = "ite",
785 .description = "Enable Armv9.4-A Instrumentation Extension FEAT_ITE",686 .description = "Enable Armv9.4-A Instrumentation Extension",
786 .dependencies = featureSet(&[_]Feature{687 .dependencies = featureSet(&[_]Feature{
787 .ete,688 .ete,
788 }),689 }),
789 };690 };
790 result[@intFromEnum(Feature.jsconv)] = .{691 result[@intFromEnum(Feature.jsconv)] = .{
791 .llvm_name = "jsconv",692 .llvm_name = "jsconv",
792 .description = "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)",693 .description = "Enable Armv8.3-A JavaScript FP conversion instructions",
793 .dependencies = featureSet(&[_]Feature{694 .dependencies = featureSet(&[_]Feature{
794 .fp_armv8,695 .fp_armv8,
795 }),696 }),
...@@ -801,34 +702,34 @@ pub const all_features = blk: {...@@ -801,34 +702,34 @@ pub const all_features = blk: {
801 };702 };
802 result[@intFromEnum(Feature.lor)] = .{703 result[@intFromEnum(Feature.lor)] = .{
803 .llvm_name = "lor",704 .llvm_name = "lor",
804 .description = "Enables ARM v8.1 Limited Ordering Regions extension (FEAT_LOR)",705 .description = "Enable Armv8.1-A Limited Ordering Regions extension",
805 .dependencies = featureSet(&[_]Feature{}),706 .dependencies = featureSet(&[_]Feature{}),
806 };707 };
807 result[@intFromEnum(Feature.ls64)] = .{708 result[@intFromEnum(Feature.ls64)] = .{
808 .llvm_name = "ls64",709 .llvm_name = "ls64",
809 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)",710 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension",
810 .dependencies = featureSet(&[_]Feature{}),711 .dependencies = featureSet(&[_]Feature{}),
811 };712 };
812 result[@intFromEnum(Feature.lse)] = .{713 result[@intFromEnum(Feature.lse)] = .{
813 .llvm_name = "lse",714 .llvm_name = "lse",
814 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions (FEAT_LSE)",715 .description = "Enable Armv8.1-A Large System Extension (LSE) atomic instructions",
815 .dependencies = featureSet(&[_]Feature{}),716 .dependencies = featureSet(&[_]Feature{}),
816 };717 };
817 result[@intFromEnum(Feature.lse128)] = .{718 result[@intFromEnum(Feature.lse128)] = .{
818 .llvm_name = "lse128",719 .llvm_name = "lse128",
819 .description = "Enable Armv9.4-A 128-bit Atomic Instructions (FEAT_LSE128)",720 .description = "Enable Armv9.4-A 128-bit Atomic instructions",
820 .dependencies = featureSet(&[_]Feature{721 .dependencies = featureSet(&[_]Feature{
821 .lse,722 .lse,
822 }),723 }),
823 };724 };
824 result[@intFromEnum(Feature.lse2)] = .{725 result[@intFromEnum(Feature.lse2)] = .{
825 .llvm_name = "lse2",726 .llvm_name = "lse2",
826 .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules (FEAT_LSE2)",727 .description = "Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules",
827 .dependencies = featureSet(&[_]Feature{}),728 .dependencies = featureSet(&[_]Feature{}),
828 };729 };
829 result[@intFromEnum(Feature.lut)] = .{730 result[@intFromEnum(Feature.lut)] = .{
830 .llvm_name = "lut",731 .llvm_name = "lut",
831 .description = "Enable Lookup Table instructions (FEAT_LUT)",732 .description = "Enable Lookup Table instructions",
832 .dependencies = featureSet(&[_]Feature{}),733 .dependencies = featureSet(&[_]Feature{}),
833 };734 };
834 result[@intFromEnum(Feature.mec)] = .{735 result[@intFromEnum(Feature.mec)] = .{
...@@ -840,29 +741,29 @@ pub const all_features = blk: {...@@ -840,29 +741,29 @@ pub const all_features = blk: {
840 };741 };
841 result[@intFromEnum(Feature.mops)] = .{742 result[@intFromEnum(Feature.mops)] = .{
842 .llvm_name = "mops",743 .llvm_name = "mops",
843 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions (FEAT_MOPS)",744 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions",
844 .dependencies = featureSet(&[_]Feature{}),745 .dependencies = featureSet(&[_]Feature{}),
845 };746 };
846 result[@intFromEnum(Feature.mpam)] = .{747 result[@intFromEnum(Feature.mpam)] = .{
847 .llvm_name = "mpam",748 .llvm_name = "mpam",
848 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension (FEAT_MPAM)",749 .description = "Enable Armv8.4-A Memory system Partitioning and Monitoring extension",
849 .dependencies = featureSet(&[_]Feature{}),750 .dependencies = featureSet(&[_]Feature{}),
850 };751 };
851 result[@intFromEnum(Feature.mte)] = .{752 result[@intFromEnum(Feature.mte)] = .{
852 .llvm_name = "mte",753 .llvm_name = "mte",
853 .description = "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)",754 .description = "Enable Memory Tagging Extension",
854 .dependencies = featureSet(&[_]Feature{}),755 .dependencies = featureSet(&[_]Feature{}),
855 };756 };
856 result[@intFromEnum(Feature.neon)] = .{757 result[@intFromEnum(Feature.neon)] = .{
857 .llvm_name = "neon",758 .llvm_name = "neon",
858 .description = "Enable Advanced SIMD instructions (FEAT_AdvSIMD)",759 .description = "Enable Advanced SIMD instructions",
859 .dependencies = featureSet(&[_]Feature{760 .dependencies = featureSet(&[_]Feature{
860 .fp_armv8,761 .fp_armv8,
861 }),762 }),
862 };763 };
863 result[@intFromEnum(Feature.nmi)] = .{764 result[@intFromEnum(Feature.nmi)] = .{
864 .llvm_name = "nmi",765 .llvm_name = "nmi",
865 .description = "Enable Armv8.8-A Non-maskable Interrupts (FEAT_NMI, FEAT_GICv3_NMI)",766 .description = "Enable Armv8.8-A Non-maskable Interrupts",
866 .dependencies = featureSet(&[_]Feature{}),767 .dependencies = featureSet(&[_]Feature{}),
867 };768 };
868 result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{769 result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{
...@@ -887,7 +788,7 @@ pub const all_features = blk: {...@@ -887,7 +788,7 @@ pub const all_features = blk: {
887 };788 };
888 result[@intFromEnum(Feature.nv)] = .{789 result[@intFromEnum(Feature.nv)] = .{
889 .llvm_name = "nv",790 .llvm_name = "nv",
890 .description = "Enable v8.4-A Nested Virtualization Enhancement (FEAT_NV, FEAT_NV2)",791 .description = "Enable Armv8.4-A Nested Virtualization Enchancement",
891 .dependencies = featureSet(&[_]Feature{}),792 .dependencies = featureSet(&[_]Feature{}),
892 };793 };
893 result[@intFromEnum(Feature.outline_atomics)] = .{794 result[@intFromEnum(Feature.outline_atomics)] = .{
...@@ -897,29 +798,29 @@ pub const all_features = blk: {...@@ -897,29 +798,29 @@ pub const all_features = blk: {
897 };798 };
898 result[@intFromEnum(Feature.pan)] = .{799 result[@intFromEnum(Feature.pan)] = .{
899 .llvm_name = "pan",800 .llvm_name = "pan",
900 .description = "Enables ARM v8.1 Privileged Access-Never extension (FEAT_PAN)",801 .description = "Enable Armv8.1-A Privileged Access-Never extension",
901 .dependencies = featureSet(&[_]Feature{}),802 .dependencies = featureSet(&[_]Feature{}),
902 };803 };
903 result[@intFromEnum(Feature.pan_rwv)] = .{804 result[@intFromEnum(Feature.pan_rwv)] = .{
904 .llvm_name = "pan-rwv",805 .llvm_name = "pan-rwv",
905 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants (FEAT_PAN2)",806 .description = "Enable Armv8.2-A PAN s1e1R and s1e1W Variants",
906 .dependencies = featureSet(&[_]Feature{807 .dependencies = featureSet(&[_]Feature{
907 .pan,808 .pan,
908 }),809 }),
909 };810 };
910 result[@intFromEnum(Feature.pauth)] = .{811 result[@intFromEnum(Feature.pauth)] = .{
911 .llvm_name = "pauth",812 .llvm_name = "pauth",
912 .description = "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)",813 .description = "Enable Armv8.3-A Pointer Authentication extension",
913 .dependencies = featureSet(&[_]Feature{}),814 .dependencies = featureSet(&[_]Feature{}),
914 };815 };
915 result[@intFromEnum(Feature.pauth_lr)] = .{816 result[@intFromEnum(Feature.pauth_lr)] = .{
916 .llvm_name = "pauth-lr",817 .llvm_name = "pauth-lr",
917 .description = "Enable Armv9.5-A PAC enhancements (FEAT_PAuth_LR)",818 .description = "Enable Armv9.5-A PAC enhancements",
918 .dependencies = featureSet(&[_]Feature{}),819 .dependencies = featureSet(&[_]Feature{}),
919 };820 };
920 result[@intFromEnum(Feature.perfmon)] = .{821 result[@intFromEnum(Feature.perfmon)] = .{
921 .llvm_name = "perfmon",822 .llvm_name = "perfmon",
922 .description = "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)",823 .description = "Enable Armv8.0-A PMUv3 Performance Monitors extension",
923 .dependencies = featureSet(&[_]Feature{}),824 .dependencies = featureSet(&[_]Feature{}),
924 };825 };
925 result[@intFromEnum(Feature.predictable_select_expensive)] = .{826 result[@intFromEnum(Feature.predictable_select_expensive)] = .{
...@@ -929,7 +830,7 @@ pub const all_features = blk: {...@@ -929,7 +830,7 @@ pub const all_features = blk: {
929 };830 };
930 result[@intFromEnum(Feature.predres)] = .{831 result[@intFromEnum(Feature.predres)] = .{
931 .llvm_name = "predres",832 .llvm_name = "predres",
932 .description = "Enable v8.5a execution and data prediction invalidation instructions (FEAT_SPECRES)",833 .description = "Enable Armv8.5-A execution and data prediction invalidation instructions",
933 .dependencies = featureSet(&[_]Feature{}),834 .dependencies = featureSet(&[_]Feature{}),
934 };835 };
935 result[@intFromEnum(Feature.prfm_slc_target)] = .{836 result[@intFromEnum(Feature.prfm_slc_target)] = .{
...@@ -939,43 +840,50 @@ pub const all_features = blk: {...@@ -939,43 +840,50 @@ pub const all_features = blk: {
939 };840 };
940 result[@intFromEnum(Feature.rand)] = .{841 result[@intFromEnum(Feature.rand)] = .{
941 .llvm_name = "rand",842 .llvm_name = "rand",
942 .description = "Enable Random Number generation instructions (FEAT_RNG)",843 .description = "Enable Random Number generation instructions",
943 .dependencies = featureSet(&[_]Feature{}),844 .dependencies = featureSet(&[_]Feature{}),
944 };845 };
945 result[@intFromEnum(Feature.ras)] = .{846 result[@intFromEnum(Feature.ras)] = .{
946 .llvm_name = "ras",847 .llvm_name = "ras",
947 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions (FEAT_RAS, FEAT_RASv1p1)",848 .description = "Enable Armv8.0-A Reliability, Availability and Serviceability Extensions",
948 .dependencies = featureSet(&[_]Feature{}),849 .dependencies = featureSet(&[_]Feature{}),
949 };850 };
950 result[@intFromEnum(Feature.rasv2)] = .{851 result[@intFromEnum(Feature.rasv2)] = .{
951 .llvm_name = "rasv2",852 .llvm_name = "rasv2",
952 .description = "Enable ARMv8.9-A Reliability, Availability and Serviceability Extensions (FEAT_RASv2)",853 .description = "Enable Armv8.9-A Reliability, Availability and Serviceability Extensions",
953 .dependencies = featureSet(&[_]Feature{854 .dependencies = featureSet(&[_]Feature{
954 .ras,855 .ras,
955 }),856 }),
956 };857 };
957 result[@intFromEnum(Feature.rcpc)] = .{858 result[@intFromEnum(Feature.rcpc)] = .{
958 .llvm_name = "rcpc",859 .llvm_name = "rcpc",
959 .description = "Enable support for RCPC extension (FEAT_LRCPC)",860 .description = "Enable support for RCPC extension",
960 .dependencies = featureSet(&[_]Feature{}),861 .dependencies = featureSet(&[_]Feature{}),
961 };862 };
962 result[@intFromEnum(Feature.rcpc3)] = .{863 result[@intFromEnum(Feature.rcpc3)] = .{
963 .llvm_name = "rcpc3",864 .llvm_name = "rcpc3",
964 .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set (FEAT_LRCPC3)",865 .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set",
965 .dependencies = featureSet(&[_]Feature{866 .dependencies = featureSet(&[_]Feature{
966 .rcpc_immo,867 .rcpc_immo,
967 }),868 }),
968 };869 };
969 result[@intFromEnum(Feature.rcpc_immo)] = .{870 result[@intFromEnum(Feature.rcpc_immo)] = .{
970 .llvm_name = "rcpc-immo",871 .llvm_name = "rcpc-immo",
971 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets (FEAT_LRCPC2)",872 .description = "Enable Armv8.4-A RCPC instructions with Immediate Offsets",
972 .dependencies = featureSet(&[_]Feature{873 .dependencies = featureSet(&[_]Feature{
973 .rcpc,874 .rcpc,
974 }),875 }),
975 };876 };
976 result[@intFromEnum(Feature.rdm)] = .{877 result[@intFromEnum(Feature.rdm)] = .{
977 .llvm_name = "rdm",878 .llvm_name = "rdm",
978 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)",879 .description = "Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions",
880 .dependencies = featureSet(&[_]Feature{
881 .neon,
882 }),
883 };
884 result[@intFromEnum(Feature.reserve_lr_for_ra)] = .{
885 .llvm_name = "reserve-lr-for-ra",
886 .description = "Reserve LR for call use only",
979 .dependencies = featureSet(&[_]Feature{}),887 .dependencies = featureSet(&[_]Feature{}),
980 };888 };
981 result[@intFromEnum(Feature.reserve_x1)] = .{889 result[@intFromEnum(Feature.reserve_x1)] = .{
...@@ -1073,11 +981,6 @@ pub const all_features = blk: {...@@ -1073,11 +981,6 @@ pub const all_features = blk: {
1073 .description = "Reserve X3, making it unavailable as a GPR",981 .description = "Reserve X3, making it unavailable as a GPR",
1074 .dependencies = featureSet(&[_]Feature{}),982 .dependencies = featureSet(&[_]Feature{}),
1075 };983 };
1076 result[@intFromEnum(Feature.reserve_x30)] = .{
1077 .llvm_name = "reserve-x30",
1078 .description = "Reserve X30, making it unavailable as a GPR",
1079 .dependencies = featureSet(&[_]Feature{}),
1080 };
1081 result[@intFromEnum(Feature.reserve_x4)] = .{984 result[@intFromEnum(Feature.reserve_x4)] = .{
1082 .llvm_name = "reserve-x4",985 .llvm_name = "reserve-x4",
1083 .description = "Reserve X4, making it unavailable as a GPR",986 .description = "Reserve X4, making it unavailable as a GPR",
...@@ -1105,29 +1008,29 @@ pub const all_features = blk: {...@@ -1105,29 +1008,29 @@ pub const all_features = blk: {
1105 };1008 };
1106 result[@intFromEnum(Feature.rme)] = .{1009 result[@intFromEnum(Feature.rme)] = .{
1107 .llvm_name = "rme",1010 .llvm_name = "rme",
1108 .description = "Enable Realm Management Extension (FEAT_RME)",1011 .description = "Enable Realm Management Extension",
1109 .dependencies = featureSet(&[_]Feature{}),1012 .dependencies = featureSet(&[_]Feature{}),
1110 };1013 };
1111 result[@intFromEnum(Feature.sb)] = .{1014 result[@intFromEnum(Feature.sb)] = .{
1112 .llvm_name = "sb",1015 .llvm_name = "sb",
1113 .description = "Enable v8.5 Speculation Barrier (FEAT_SB)",1016 .description = "Enable Armv8.5-A Speculation Barrier",
1114 .dependencies = featureSet(&[_]Feature{}),1017 .dependencies = featureSet(&[_]Feature{}),
1115 };1018 };
1116 result[@intFromEnum(Feature.sel2)] = .{1019 result[@intFromEnum(Feature.sel2)] = .{
1117 .llvm_name = "sel2",1020 .llvm_name = "sel2",
1118 .description = "Enable v8.4-A Secure Exception Level 2 extension (FEAT_SEL2)",1021 .description = "Enable Armv8.4-A Secure Exception Level 2 extension",
1119 .dependencies = featureSet(&[_]Feature{}),1022 .dependencies = featureSet(&[_]Feature{}),
1120 };1023 };
1121 result[@intFromEnum(Feature.sha2)] = .{1024 result[@intFromEnum(Feature.sha2)] = .{
1122 .llvm_name = "sha2",1025 .llvm_name = "sha2",
1123 .description = "Enable SHA1 and SHA256 support (FEAT_SHA1, FEAT_SHA256)",1026 .description = "Enable SHA1 and SHA256 support",
1124 .dependencies = featureSet(&[_]Feature{1027 .dependencies = featureSet(&[_]Feature{
1125 .neon,1028 .neon,
1126 }),1029 }),
1127 };1030 };
1128 result[@intFromEnum(Feature.sha3)] = .{1031 result[@intFromEnum(Feature.sha3)] = .{
1129 .llvm_name = "sha3",1032 .llvm_name = "sha3",
1130 .description = "Enable SHA512 and SHA3 support (FEAT_SHA3, FEAT_SHA512)",1033 .description = "Enable SHA512 and SHA3 support",
1131 .dependencies = featureSet(&[_]Feature{1034 .dependencies = featureSet(&[_]Feature{
1132 .sha2,1035 .sha2,
1133 }),1036 }),
...@@ -1149,14 +1052,14 @@ pub const all_features = blk: {...@@ -1149,14 +1052,14 @@ pub const all_features = blk: {
1149 };1052 };
1150 result[@intFromEnum(Feature.sm4)] = .{1053 result[@intFromEnum(Feature.sm4)] = .{
1151 .llvm_name = "sm4",1054 .llvm_name = "sm4",
1152 .description = "Enable SM3 and SM4 support (FEAT_SM4, FEAT_SM3)",1055 .description = "Enable SM3 and SM4 support",
1153 .dependencies = featureSet(&[_]Feature{1056 .dependencies = featureSet(&[_]Feature{
1154 .neon,1057 .neon,
1155 }),1058 }),
1156 };1059 };
1157 result[@intFromEnum(Feature.sme)] = .{1060 result[@intFromEnum(Feature.sme)] = .{
1158 .llvm_name = "sme",1061 .llvm_name = "sme",
1159 .description = "Enable Scalable Matrix Extension (SME) (FEAT_SME)",1062 .description = "Enable Scalable Matrix Extension (SME)",
1160 .dependencies = featureSet(&[_]Feature{1063 .dependencies = featureSet(&[_]Feature{
1161 .bf16,1064 .bf16,
1162 .use_scalar_inc_vl,1065 .use_scalar_inc_vl,
...@@ -1171,34 +1074,43 @@ pub const all_features = blk: {...@@ -1171,34 +1074,43 @@ pub const all_features = blk: {
1171 };1074 };
1172 result[@intFromEnum(Feature.sme2p1)] = .{1075 result[@intFromEnum(Feature.sme2p1)] = .{
1173 .llvm_name = "sme2p1",1076 .llvm_name = "sme2p1",
1174 .description = "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions",1077 .description = "Enable Scalable Matrix Extension 2.1 instructions",
1078 .dependencies = featureSet(&[_]Feature{
1079 .sme2,
1080 }),
1081 };
1082 result[@intFromEnum(Feature.sme_b16b16)] = .{
1083 .llvm_name = "sme-b16b16",
1084 .description = "Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
1175 .dependencies = featureSet(&[_]Feature{1085 .dependencies = featureSet(&[_]Feature{
1086 .b16b16,
1176 .sme2,1087 .sme2,
1177 }),1088 }),
1178 };1089 };
1179 result[@intFromEnum(Feature.sme_f16f16)] = .{1090 result[@intFromEnum(Feature.sme_f16f16)] = .{
1180 .llvm_name = "sme-f16f16",1091 .llvm_name = "sme-f16f16",
1181 .description = "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)",1092 .description = "Enable SME non-widening Float16 instructions",
1182 .dependencies = featureSet(&[_]Feature{}),1093 .dependencies = featureSet(&[_]Feature{
1094 .sme2,
1095 }),
1183 };1096 };
1184 result[@intFromEnum(Feature.sme_f64f64)] = .{1097 result[@intFromEnum(Feature.sme_f64f64)] = .{
1185 .llvm_name = "sme-f64f64",1098 .llvm_name = "sme-f64f64",
1186 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions (FEAT_SME_F64F64)",1099 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions",
1187 .dependencies = featureSet(&[_]Feature{1100 .dependencies = featureSet(&[_]Feature{
1188 .sme,1101 .sme,
1189 }),1102 }),
1190 };1103 };
1191 result[@intFromEnum(Feature.sme_f8f16)] = .{1104 result[@intFromEnum(Feature.sme_f8f16)] = .{
1192 .llvm_name = "sme-f8f16",1105 .llvm_name = "sme-f8f16",
1193 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions(FEAT_SME_F8F16)",1106 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions",
1194 .dependencies = featureSet(&[_]Feature{1107 .dependencies = featureSet(&[_]Feature{
1195 .fp8,1108 .sme_f8f32,
1196 .sme2,
1197 }),1109 }),
1198 };1110 };
1199 result[@intFromEnum(Feature.sme_f8f32)] = .{1111 result[@intFromEnum(Feature.sme_f8f32)] = .{
1200 .llvm_name = "sme-f8f32",1112 .llvm_name = "sme-f8f32",
1201 .description = "Enable Scalable Matrix Extension (SME) F8F32 instructions (FEAT_SME_F8F32)",1113 .description = "Enable Scalable Matrix Extension (SME) F8F32 instructions",
1202 .dependencies = featureSet(&[_]Feature{1114 .dependencies = featureSet(&[_]Feature{
1203 .fp8,1115 .fp8,
1204 .sme2,1116 .sme2,
...@@ -1206,7 +1118,7 @@ pub const all_features = blk: {...@@ -1206,7 +1118,7 @@ pub const all_features = blk: {
1206 };1118 };
1207 result[@intFromEnum(Feature.sme_fa64)] = .{1119 result[@intFromEnum(Feature.sme_fa64)] = .{
1208 .llvm_name = "sme-fa64",1120 .llvm_name = "sme-fa64",
1209 .description = "Enable the full A64 instruction set in streaming SVE mode (FEAT_SME_FA64)",1121 .description = "Enable the full A64 instruction set in streaming SVE mode",
1210 .dependencies = featureSet(&[_]Feature{1122 .dependencies = featureSet(&[_]Feature{
1211 .sme,1123 .sme,
1212 .sve2,1124 .sve2,
...@@ -1214,61 +1126,62 @@ pub const all_features = blk: {...@@ -1214,61 +1126,62 @@ pub const all_features = blk: {
1214 };1126 };
1215 result[@intFromEnum(Feature.sme_i16i64)] = .{1127 result[@intFromEnum(Feature.sme_i16i64)] = .{
1216 .llvm_name = "sme-i16i64",1128 .llvm_name = "sme-i16i64",
1217 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)",1129 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions",
1218 .dependencies = featureSet(&[_]Feature{1130 .dependencies = featureSet(&[_]Feature{
1219 .sme,1131 .sme,
1220 }),1132 }),
1221 };1133 };
1222 result[@intFromEnum(Feature.sme_lutv2)] = .{1134 result[@intFromEnum(Feature.sme_lutv2)] = .{
1223 .llvm_name = "sme-lutv2",1135 .llvm_name = "sme-lutv2",
1224 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions (FEAT_SME_LUTv2)",1136 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions",
1225 .dependencies = featureSet(&[_]Feature{}),1137 .dependencies = featureSet(&[_]Feature{}),
1226 };1138 };
1227 result[@intFromEnum(Feature.spe)] = .{1139 result[@intFromEnum(Feature.spe)] = .{
1228 .llvm_name = "spe",1140 .llvm_name = "spe",
1229 .description = "Enable Statistical Profiling extension (FEAT_SPE)",1141 .description = "Enable Statistical Profiling extension",
1230 .dependencies = featureSet(&[_]Feature{}),1142 .dependencies = featureSet(&[_]Feature{}),
1231 };1143 };
1232 result[@intFromEnum(Feature.spe_eef)] = .{1144 result[@intFromEnum(Feature.spe_eef)] = .{
1233 .llvm_name = "spe-eef",1145 .llvm_name = "spe-eef",
1234 .description = "Enable extra register in the Statistical Profiling Extension (FEAT_SPEv1p2)",1146 .description = "Enable extra register in the Statistical Profiling Extension",
1235 .dependencies = featureSet(&[_]Feature{}),1147 .dependencies = featureSet(&[_]Feature{}),
1236 };1148 };
1237 result[@intFromEnum(Feature.specres2)] = .{1149 result[@intFromEnum(Feature.specres2)] = .{
1238 .llvm_name = "specres2",1150 .llvm_name = "specres2",
1239 .description = "Enable Speculation Restriction Instruction (FEAT_SPECRES2)",1151 .description = "Enable Speculation Restriction Instruction",
1240 .dependencies = featureSet(&[_]Feature{1152 .dependencies = featureSet(&[_]Feature{
1241 .predres,1153 .predres,
1242 }),1154 }),
1243 };1155 };
1244 result[@intFromEnum(Feature.specrestrict)] = .{1156 result[@intFromEnum(Feature.specrestrict)] = .{
1245 .llvm_name = "specrestrict",1157 .llvm_name = "specrestrict",
1246 .description = "Enable architectural speculation restriction (FEAT_CSV2_2)",1158 .description = "Enable architectural speculation restriction",
1247 .dependencies = featureSet(&[_]Feature{}),1159 .dependencies = featureSet(&[_]Feature{}),
1248 };1160 };
1249 result[@intFromEnum(Feature.ssbs)] = .{1161 result[@intFromEnum(Feature.ssbs)] = .{
1250 .llvm_name = "ssbs",1162 .llvm_name = "ssbs",
1251 .description = "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)",1163 .description = "Enable Speculative Store Bypass Safe bit",
1252 .dependencies = featureSet(&[_]Feature{}),1164 .dependencies = featureSet(&[_]Feature{}),
1253 };1165 };
1254 result[@intFromEnum(Feature.ssve_fp8dot2)] = .{1166 result[@intFromEnum(Feature.ssve_fp8dot2)] = .{
1255 .llvm_name = "ssve-fp8dot2",1167 .llvm_name = "ssve-fp8dot2",
1256 .description = "Enable SVE2 fp8 2-way dot product instructions (FEAT_SSVE_FP8DOT2)",1168 .description = "Enable SVE2 FP8 2-way dot product instructions",
1257 .dependencies = featureSet(&[_]Feature{1169 .dependencies = featureSet(&[_]Feature{
1258 .sme2,1170 .ssve_fp8dot4,
1259 }),1171 }),
1260 };1172 };
1261 result[@intFromEnum(Feature.ssve_fp8dot4)] = .{1173 result[@intFromEnum(Feature.ssve_fp8dot4)] = .{
1262 .llvm_name = "ssve-fp8dot4",1174 .llvm_name = "ssve-fp8dot4",
1263 .description = "Enable SVE2 fp8 4-way dot product instructions (FEAT_SSVE_FP8DOT4)",1175 .description = "Enable SVE2 FP8 4-way dot product instructions",
1264 .dependencies = featureSet(&[_]Feature{1176 .dependencies = featureSet(&[_]Feature{
1265 .sme2,1177 .ssve_fp8fma,
1266 }),1178 }),
1267 };1179 };
1268 result[@intFromEnum(Feature.ssve_fp8fma)] = .{1180 result[@intFromEnum(Feature.ssve_fp8fma)] = .{
1269 .llvm_name = "ssve-fp8fma",1181 .llvm_name = "ssve-fp8fma",
1270 .description = "Enable SVE2 fp8 multiply-add instructions (FEAT_SSVE_FP8FMA)",1182 .description = "Enable SVE2 FP8 multiply-add instructions",
1271 .dependencies = featureSet(&[_]Feature{1183 .dependencies = featureSet(&[_]Feature{
1184 .fp8,
1272 .sme2,1185 .sme2,
1273 }),1186 }),
1274 };1187 };
...@@ -1289,14 +1202,14 @@ pub const all_features = blk: {...@@ -1289,14 +1202,14 @@ pub const all_features = blk: {
1289 };1202 };
1290 result[@intFromEnum(Feature.sve)] = .{1203 result[@intFromEnum(Feature.sve)] = .{
1291 .llvm_name = "sve",1204 .llvm_name = "sve",
1292 .description = "Enable Scalable Vector Extension (SVE) instructions (FEAT_SVE)",1205 .description = "Enable Scalable Vector Extension (SVE) instructions",
1293 .dependencies = featureSet(&[_]Feature{1206 .dependencies = featureSet(&[_]Feature{
1294 .fullfp16,1207 .fullfp16,
1295 }),1208 }),
1296 };1209 };
1297 result[@intFromEnum(Feature.sve2)] = .{1210 result[@intFromEnum(Feature.sve2)] = .{
1298 .llvm_name = "sve2",1211 .llvm_name = "sve2",
1299 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions (FEAT_SVE2)",1212 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
1300 .dependencies = featureSet(&[_]Feature{1213 .dependencies = featureSet(&[_]Feature{
1301 .sve,1214 .sve,
1302 .use_scalar_inc_vl,1215 .use_scalar_inc_vl,
...@@ -1304,7 +1217,7 @@ pub const all_features = blk: {...@@ -1304,7 +1217,7 @@ pub const all_features = blk: {
1304 };1217 };
1305 result[@intFromEnum(Feature.sve2_aes)] = .{1218 result[@intFromEnum(Feature.sve2_aes)] = .{
1306 .llvm_name = "sve2-aes",1219 .llvm_name = "sve2-aes",
1307 .description = "Enable AES SVE2 instructions (FEAT_SVE_AES, FEAT_SVE_PMULL128)",1220 .description = "Enable AES SVE2 instructions",
1308 .dependencies = featureSet(&[_]Feature{1221 .dependencies = featureSet(&[_]Feature{
1309 .aes,1222 .aes,
1310 .sve2,1223 .sve2,
...@@ -1312,14 +1225,14 @@ pub const all_features = blk: {...@@ -1312,14 +1225,14 @@ pub const all_features = blk: {
1312 };1225 };
1313 result[@intFromEnum(Feature.sve2_bitperm)] = .{1226 result[@intFromEnum(Feature.sve2_bitperm)] = .{
1314 .llvm_name = "sve2-bitperm",1227 .llvm_name = "sve2-bitperm",
1315 .description = "Enable bit permutation SVE2 instructions (FEAT_SVE_BitPerm)",1228 .description = "Enable bit permutation SVE2 instructions",
1316 .dependencies = featureSet(&[_]Feature{1229 .dependencies = featureSet(&[_]Feature{
1317 .sve2,1230 .sve2,
1318 }),1231 }),
1319 };1232 };
1320 result[@intFromEnum(Feature.sve2_sha3)] = .{1233 result[@intFromEnum(Feature.sve2_sha3)] = .{
1321 .llvm_name = "sve2-sha3",1234 .llvm_name = "sve2-sha3",
1322 .description = "Enable SHA3 SVE2 instructions (FEAT_SVE_SHA3)",1235 .description = "Enable SHA3 SVE2 instructions",
1323 .dependencies = featureSet(&[_]Feature{1236 .dependencies = featureSet(&[_]Feature{
1324 .sha3,1237 .sha3,
1325 .sve2,1238 .sve2,
...@@ -1327,7 +1240,7 @@ pub const all_features = blk: {...@@ -1327,7 +1240,7 @@ pub const all_features = blk: {
1327 };1240 };
1328 result[@intFromEnum(Feature.sve2_sm4)] = .{1241 result[@intFromEnum(Feature.sve2_sm4)] = .{
1329 .llvm_name = "sve2-sm4",1242 .llvm_name = "sve2-sm4",
1330 .description = "Enable SM4 SVE2 instructions (FEAT_SVE_SM4)",1243 .description = "Enable SM4 SVE2 instructions",
1331 .dependencies = featureSet(&[_]Feature{1244 .dependencies = featureSet(&[_]Feature{
1332 .sm4,1245 .sm4,
1333 .sve2,1246 .sve2,
...@@ -1340,6 +1253,13 @@ pub const all_features = blk: {...@@ -1340,6 +1253,13 @@ pub const all_features = blk: {
1340 .sve2,1253 .sve2,
1341 }),1254 }),
1342 };1255 };
1256 result[@intFromEnum(Feature.sve_b16b16)] = .{
1257 .llvm_name = "sve-b16b16",
1258 .description = "Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions",
1259 .dependencies = featureSet(&[_]Feature{
1260 .b16b16,
1261 }),
1262 };
1343 result[@intFromEnum(Feature.tagged_globals)] = .{1263 result[@intFromEnum(Feature.tagged_globals)] = .{
1344 .llvm_name = "tagged-globals",1264 .llvm_name = "tagged-globals",
1345 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",1265 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
...@@ -1347,22 +1267,22 @@ pub const all_features = blk: {...@@ -1347,22 +1267,22 @@ pub const all_features = blk: {
1347 };1267 };
1348 result[@intFromEnum(Feature.the)] = .{1268 result[@intFromEnum(Feature.the)] = .{
1349 .llvm_name = "the",1269 .llvm_name = "the",
1350 .description = "Enable Armv8.9-A Translation Hardening Extension (FEAT_THE)",1270 .description = "Enable Armv8.9-A Translation Hardening Extension",
1351 .dependencies = featureSet(&[_]Feature{}),1271 .dependencies = featureSet(&[_]Feature{}),
1352 };1272 };
1353 result[@intFromEnum(Feature.tlb_rmi)] = .{1273 result[@intFromEnum(Feature.tlb_rmi)] = .{
1354 .llvm_name = "tlb-rmi",1274 .llvm_name = "tlb-rmi",
1355 .description = "Enable v8.4-A TLB Range and Maintenance Instructions (FEAT_TLBIOS, FEAT_TLBIRANGE)",1275 .description = "Enable Armv8.4-A TLB Range and Maintenance instructions",
1356 .dependencies = featureSet(&[_]Feature{}),1276 .dependencies = featureSet(&[_]Feature{}),
1357 };1277 };
1358 result[@intFromEnum(Feature.tlbiw)] = .{1278 result[@intFromEnum(Feature.tlbiw)] = .{
1359 .llvm_name = "tlbiw",1279 .llvm_name = "tlbiw",
1360 .description = "Enable ARMv9.5-A TLBI VMALL for Dirty State (FEAT_TLBIW)",1280 .description = "Enable Armv9.5-A TLBI VMALL for Dirty State",
1361 .dependencies = featureSet(&[_]Feature{}),1281 .dependencies = featureSet(&[_]Feature{}),
1362 };1282 };
1363 result[@intFromEnum(Feature.tme)] = .{1283 result[@intFromEnum(Feature.tme)] = .{
1364 .llvm_name = "tme",1284 .llvm_name = "tme",
1365 .description = "Enable Transactional Memory Extension (FEAT_TME)",1285 .description = "Enable Transactional Memory Extension",
1366 .dependencies = featureSet(&[_]Feature{}),1286 .dependencies = featureSet(&[_]Feature{}),
1367 };1287 };
1368 result[@intFromEnum(Feature.tpidr_el1)] = .{1288 result[@intFromEnum(Feature.tpidr_el1)] = .{
...@@ -1387,17 +1307,17 @@ pub const all_features = blk: {...@@ -1387,17 +1307,17 @@ pub const all_features = blk: {
1387 };1307 };
1388 result[@intFromEnum(Feature.tracev8_4)] = .{1308 result[@intFromEnum(Feature.tracev8_4)] = .{
1389 .llvm_name = "tracev8.4",1309 .llvm_name = "tracev8.4",
1390 .description = "Enable v8.4-A Trace extension (FEAT_TRF)",1310 .description = "Enable Armv8.4-A Trace extension",
1391 .dependencies = featureSet(&[_]Feature{}),1311 .dependencies = featureSet(&[_]Feature{}),
1392 };1312 };
1393 result[@intFromEnum(Feature.trbe)] = .{1313 result[@intFromEnum(Feature.trbe)] = .{
1394 .llvm_name = "trbe",1314 .llvm_name = "trbe",
1395 .description = "Enable Trace Buffer Extension (FEAT_TRBE)",1315 .description = "Enable Trace Buffer Extension",
1396 .dependencies = featureSet(&[_]Feature{}),1316 .dependencies = featureSet(&[_]Feature{}),
1397 };1317 };
1398 result[@intFromEnum(Feature.uaops)] = .{1318 result[@intFromEnum(Feature.uaops)] = .{
1399 .llvm_name = "uaops",1319 .llvm_name = "uaops",
1400 .description = "Enable v8.2 UAO PState (FEAT_UAO)",1320 .description = "Enable Armv8.2-A UAO PState",
1401 .dependencies = featureSet(&[_]Feature{}),1321 .dependencies = featureSet(&[_]Feature{}),
1402 };1322 };
1403 result[@intFromEnum(Feature.use_experimental_zeroing_pseudos)] = .{1323 result[@intFromEnum(Feature.use_experimental_zeroing_pseudos)] = .{
...@@ -1405,6 +1325,11 @@ pub const all_features = blk: {...@@ -1405,6 +1325,11 @@ pub const all_features = blk: {
1405 .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations",1325 .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations",
1406 .dependencies = featureSet(&[_]Feature{}),1326 .dependencies = featureSet(&[_]Feature{}),
1407 };1327 };
1328 result[@intFromEnum(Feature.use_fixed_over_scalable_if_equal_cost)] = .{
1329 .llvm_name = "use-fixed-over-scalable-if-equal-cost",
1330 .description = "Prefer fixed width loop vectorization over scalable if the cost-model assigns equal costs",
1331 .dependencies = featureSet(&[_]Feature{}),
1332 };
1408 result[@intFromEnum(Feature.use_postra_scheduler)] = .{1333 result[@intFromEnum(Feature.use_postra_scheduler)] = .{
1409 .llvm_name = "use-postra-scheduler",1334 .llvm_name = "use-postra-scheduler",
1410 .description = "Schedule again after register allocation",1335 .description = "Schedule again after register allocation",
...@@ -1422,7 +1347,7 @@ pub const all_features = blk: {...@@ -1422,7 +1347,7 @@ pub const all_features = blk: {
1422 };1347 };
1423 result[@intFromEnum(Feature.v8_1a)] = .{1348 result[@intFromEnum(Feature.v8_1a)] = .{
1424 .llvm_name = "v8.1a",1349 .llvm_name = "v8.1a",
1425 .description = "Support ARM v8.1a instructions",1350 .description = "Support ARM v8.1a architecture",
1426 .dependencies = featureSet(&[_]Feature{1351 .dependencies = featureSet(&[_]Feature{
1427 .crc,1352 .crc,
1428 .lor,1353 .lor,
...@@ -1435,7 +1360,7 @@ pub const all_features = blk: {...@@ -1435,7 +1360,7 @@ pub const all_features = blk: {
1435 };1360 };
1436 result[@intFromEnum(Feature.v8_2a)] = .{1361 result[@intFromEnum(Feature.v8_2a)] = .{
1437 .llvm_name = "v8.2a",1362 .llvm_name = "v8.2a",
1438 .description = "Support ARM v8.2a instructions",1363 .description = "Support ARM v8.2a architecture",
1439 .dependencies = featureSet(&[_]Feature{1364 .dependencies = featureSet(&[_]Feature{
1440 .ccpp,1365 .ccpp,
1441 .pan_rwv,1366 .pan_rwv,
...@@ -1446,9 +1371,8 @@ pub const all_features = blk: {...@@ -1446,9 +1371,8 @@ pub const all_features = blk: {
1446 };1371 };
1447 result[@intFromEnum(Feature.v8_3a)] = .{1372 result[@intFromEnum(Feature.v8_3a)] = .{
1448 .llvm_name = "v8.3a",1373 .llvm_name = "v8.3a",
1449 .description = "Support ARM v8.3a instructions",1374 .description = "Support ARM v8.3a architecture",
1450 .dependencies = featureSet(&[_]Feature{1375 .dependencies = featureSet(&[_]Feature{
1451 .ccidx,
1452 .complxnum,1376 .complxnum,
1453 .jsconv,1377 .jsconv,
1454 .pauth,1378 .pauth,
...@@ -1458,7 +1382,7 @@ pub const all_features = blk: {...@@ -1458,7 +1382,7 @@ pub const all_features = blk: {
1458 };1382 };
1459 result[@intFromEnum(Feature.v8_4a)] = .{1383 result[@intFromEnum(Feature.v8_4a)] = .{
1460 .llvm_name = "v8.4a",1384 .llvm_name = "v8.4a",
1461 .description = "Support ARM v8.4a instructions",1385 .description = "Support ARM v8.4a architecture",
1462 .dependencies = featureSet(&[_]Feature{1386 .dependencies = featureSet(&[_]Feature{
1463 .am,1387 .am,
1464 .dit,1388 .dit,
...@@ -1476,7 +1400,7 @@ pub const all_features = blk: {...@@ -1476,7 +1400,7 @@ pub const all_features = blk: {
1476 };1400 };
1477 result[@intFromEnum(Feature.v8_5a)] = .{1401 result[@intFromEnum(Feature.v8_5a)] = .{
1478 .llvm_name = "v8.5a",1402 .llvm_name = "v8.5a",
1479 .description = "Support ARM v8.5a instructions",1403 .description = "Support ARM v8.5a architecture",
1480 .dependencies = featureSet(&[_]Feature{1404 .dependencies = featureSet(&[_]Feature{
1481 .altnzcv,1405 .altnzcv,
1482 .bti,1406 .bti,
...@@ -1485,13 +1409,12 @@ pub const all_features = blk: {...@@ -1485,13 +1409,12 @@ pub const all_features = blk: {
1485 .predres,1409 .predres,
1486 .sb,1410 .sb,
1487 .specrestrict,1411 .specrestrict,
1488 .ssbs,
1489 .v8_4a,1412 .v8_4a,
1490 }),1413 }),
1491 };1414 };
1492 result[@intFromEnum(Feature.v8_6a)] = .{1415 result[@intFromEnum(Feature.v8_6a)] = .{
1493 .llvm_name = "v8.6a",1416 .llvm_name = "v8.6a",
1494 .description = "Support ARM v8.6a instructions",1417 .description = "Support ARM v8.6a architecture",
1495 .dependencies = featureSet(&[_]Feature{1418 .dependencies = featureSet(&[_]Feature{
1496 .amvs,1419 .amvs,
1497 .bf16,1420 .bf16,
...@@ -1503,7 +1426,7 @@ pub const all_features = blk: {...@@ -1503,7 +1426,7 @@ pub const all_features = blk: {
1503 };1426 };
1504 result[@intFromEnum(Feature.v8_7a)] = .{1427 result[@intFromEnum(Feature.v8_7a)] = .{
1505 .llvm_name = "v8.7a",1428 .llvm_name = "v8.7a",
1506 .description = "Support ARM v8.7a instructions",1429 .description = "Support ARM v8.7a architecture",
1507 .dependencies = featureSet(&[_]Feature{1430 .dependencies = featureSet(&[_]Feature{
1508 .hcx,1431 .hcx,
1509 .v8_6a,1432 .v8_6a,
...@@ -1513,7 +1436,7 @@ pub const all_features = blk: {...@@ -1513,7 +1436,7 @@ pub const all_features = blk: {
1513 };1436 };
1514 result[@intFromEnum(Feature.v8_8a)] = .{1437 result[@intFromEnum(Feature.v8_8a)] = .{
1515 .llvm_name = "v8.8a",1438 .llvm_name = "v8.8a",
1516 .description = "Support ARM v8.8a instructions",1439 .description = "Support ARM v8.8a architecture",
1517 .dependencies = featureSet(&[_]Feature{1440 .dependencies = featureSet(&[_]Feature{
1518 .hbc,1441 .hbc,
1519 .mops,1442 .mops,
...@@ -1523,7 +1446,7 @@ pub const all_features = blk: {...@@ -1523,7 +1446,7 @@ pub const all_features = blk: {
1523 };1446 };
1524 result[@intFromEnum(Feature.v8_9a)] = .{1447 result[@intFromEnum(Feature.v8_9a)] = .{
1525 .llvm_name = "v8.9a",1448 .llvm_name = "v8.9a",
1526 .description = "Support ARM v8.9a instructions",1449 .description = "Support ARM v8.9a architecture",
1527 .dependencies = featureSet(&[_]Feature{1450 .dependencies = featureSet(&[_]Feature{
1528 .chk,1451 .chk,
1529 .clrbhb,1452 .clrbhb,
...@@ -1536,7 +1459,7 @@ pub const all_features = blk: {...@@ -1536,7 +1459,7 @@ pub const all_features = blk: {
1536 };1459 };
1537 result[@intFromEnum(Feature.v8a)] = .{1460 result[@intFromEnum(Feature.v8a)] = .{
1538 .llvm_name = "v8a",1461 .llvm_name = "v8a",
1539 .description = "Support ARM v8.0a instructions",1462 .description = "Support ARM v8a architecture",
1540 .dependencies = featureSet(&[_]Feature{1463 .dependencies = featureSet(&[_]Feature{
1541 .el2vmsa,1464 .el2vmsa,
1542 .el3,1465 .el3,
...@@ -1545,23 +1468,18 @@ pub const all_features = blk: {...@@ -1545,23 +1468,18 @@ pub const all_features = blk: {
1545 };1468 };
1546 result[@intFromEnum(Feature.v8r)] = .{1469 result[@intFromEnum(Feature.v8r)] = .{
1547 .llvm_name = "v8r",1470 .llvm_name = "v8r",
1548 .description = "Support ARM v8r instructions",1471 .description = "Support ARM v8r architecture",
1549 .dependencies = featureSet(&[_]Feature{1472 .dependencies = featureSet(&[_]Feature{
1550 .ccidx,
1551 .ccpp,1473 .ccpp,
1552 .complxnum,
1553 .contextidr_el2,1474 .contextidr_el2,
1554 .crc,1475 .crc,
1555 .dit,1476 .dit,
1556 .dotprod,
1557 .flagm,1477 .flagm,
1558 .jsconv,
1559 .lse,1478 .lse,
1560 .pan_rwv,1479 .pan_rwv,
1561 .pauth,1480 .pauth,
1562 .ras,1481 .ras,
1563 .rcpc_immo,1482 .rcpc_immo,
1564 .rdm,
1565 .sel2,1483 .sel2,
1566 .specrestrict,1484 .specrestrict,
1567 .tlb_rmi,1485 .tlb_rmi,
...@@ -1571,7 +1489,7 @@ pub const all_features = blk: {...@@ -1571,7 +1489,7 @@ pub const all_features = blk: {
1571 };1489 };
1572 result[@intFromEnum(Feature.v9_1a)] = .{1490 result[@intFromEnum(Feature.v9_1a)] = .{
1573 .llvm_name = "v9.1a",1491 .llvm_name = "v9.1a",
1574 .description = "Support ARM v9.1a instructions",1492 .description = "Support ARM v9.1a architecture",
1575 .dependencies = featureSet(&[_]Feature{1493 .dependencies = featureSet(&[_]Feature{
1576 .v8_6a,1494 .v8_6a,
1577 .v9a,1495 .v9a,
...@@ -1579,7 +1497,7 @@ pub const all_features = blk: {...@@ -1579,7 +1497,7 @@ pub const all_features = blk: {
1579 };1497 };
1580 result[@intFromEnum(Feature.v9_2a)] = .{1498 result[@intFromEnum(Feature.v9_2a)] = .{
1581 .llvm_name = "v9.2a",1499 .llvm_name = "v9.2a",
1582 .description = "Support ARM v9.2a instructions",1500 .description = "Support ARM v9.2a architecture",
1583 .dependencies = featureSet(&[_]Feature{1501 .dependencies = featureSet(&[_]Feature{
1584 .v8_7a,1502 .v8_7a,
1585 .v9_1a,1503 .v9_1a,
...@@ -1587,7 +1505,7 @@ pub const all_features = blk: {...@@ -1587,7 +1505,7 @@ pub const all_features = blk: {
1587 };1505 };
1588 result[@intFromEnum(Feature.v9_3a)] = .{1506 result[@intFromEnum(Feature.v9_3a)] = .{
1589 .llvm_name = "v9.3a",1507 .llvm_name = "v9.3a",
1590 .description = "Support ARM v9.3a instructions",1508 .description = "Support ARM v9.3a architecture",
1591 .dependencies = featureSet(&[_]Feature{1509 .dependencies = featureSet(&[_]Feature{
1592 .v8_8a,1510 .v8_8a,
1593 .v9_2a,1511 .v9_2a,
...@@ -1595,7 +1513,7 @@ pub const all_features = blk: {...@@ -1595,7 +1513,7 @@ pub const all_features = blk: {
1595 };1513 };
1596 result[@intFromEnum(Feature.v9_4a)] = .{1514 result[@intFromEnum(Feature.v9_4a)] = .{
1597 .llvm_name = "v9.4a",1515 .llvm_name = "v9.4a",
1598 .description = "Support ARM v9.4a instructions",1516 .description = "Support ARM v9.4a architecture",
1599 .dependencies = featureSet(&[_]Feature{1517 .dependencies = featureSet(&[_]Feature{
1600 .v8_9a,1518 .v8_9a,
1601 .v9_3a,1519 .v9_3a,
...@@ -1603,7 +1521,7 @@ pub const all_features = blk: {...@@ -1603,7 +1521,7 @@ pub const all_features = blk: {
1603 };1521 };
1604 result[@intFromEnum(Feature.v9_5a)] = .{1522 result[@intFromEnum(Feature.v9_5a)] = .{
1605 .llvm_name = "v9.5a",1523 .llvm_name = "v9.5a",
1606 .description = "Support ARM v9.5a instructions",1524 .description = "Support ARM v9.5a architecture",
1607 .dependencies = featureSet(&[_]Feature{1525 .dependencies = featureSet(&[_]Feature{
1608 .cpa,1526 .cpa,
1609 .v9_4a,1527 .v9_4a,
...@@ -1611,28 +1529,26 @@ pub const all_features = blk: {...@@ -1611,28 +1529,26 @@ pub const all_features = blk: {
1611 };1529 };
1612 result[@intFromEnum(Feature.v9a)] = .{1530 result[@intFromEnum(Feature.v9a)] = .{
1613 .llvm_name = "v9a",1531 .llvm_name = "v9a",
1614 .description = "Support ARM v9a instructions",1532 .description = "Support ARM v9a architecture",
1615 .dependencies = featureSet(&[_]Feature{1533 .dependencies = featureSet(&[_]Feature{
1616 .mec,
1617 .sve2,
1618 .v8_5a,1534 .v8_5a,
1619 }),1535 }),
1620 };1536 };
1621 result[@intFromEnum(Feature.vh)] = .{1537 result[@intFromEnum(Feature.vh)] = .{
1622 .llvm_name = "vh",1538 .llvm_name = "vh",
1623 .description = "Enables ARM v8.1 Virtual Host extension (FEAT_VHE)",1539 .description = "Enable Armv8.1-A Virtual Host extension",
1624 .dependencies = featureSet(&[_]Feature{1540 .dependencies = featureSet(&[_]Feature{
1625 .contextidr_el2,1541 .contextidr_el2,
1626 }),1542 }),
1627 };1543 };
1628 result[@intFromEnum(Feature.wfxt)] = .{1544 result[@intFromEnum(Feature.wfxt)] = .{
1629 .llvm_name = "wfxt",1545 .llvm_name = "wfxt",
1630 .description = "Enable Armv8.7-A WFET and WFIT instruction (FEAT_WFxT)",1546 .description = "Enable Armv8.7-A WFET and WFIT instruction",
1631 .dependencies = featureSet(&[_]Feature{}),1547 .dependencies = featureSet(&[_]Feature{}),
1632 };1548 };
1633 result[@intFromEnum(Feature.xs)] = .{1549 result[@intFromEnum(Feature.xs)] = .{
1634 .llvm_name = "xs",1550 .llvm_name = "xs",
1635 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction (FEAT_XS)",1551 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction",
1636 .dependencies = featureSet(&[_]Feature{}),1552 .dependencies = featureSet(&[_]Feature{}),
1637 };1553 };
1638 result[@intFromEnum(Feature.zcm)] = .{1554 result[@intFromEnum(Feature.zcm)] = .{
...@@ -1670,6 +1586,7 @@ pub const cpu = struct {...@@ -1670,6 +1586,7 @@ pub const cpu = struct {
1670 .name = "a64fx",1586 .name = "a64fx",
1671 .llvm_name = "a64fx",1587 .llvm_name = "a64fx",
1672 .features = featureSet(&[_]Feature{1588 .features = featureSet(&[_]Feature{
1589 .aes,
1673 .aggressive_fma,1590 .aggressive_fma,
1674 .arith_bcc_fusion,1591 .arith_bcc_fusion,
1675 .complxnum,1592 .complxnum,
...@@ -1686,19 +1603,22 @@ pub const cpu = struct {...@@ -1686,19 +1603,22 @@ pub const cpu = struct {
1686 .name = "ampere1",1603 .name = "ampere1",
1687 .llvm_name = "ampere1",1604 .llvm_name = "ampere1",
1688 .features = featureSet(&[_]Feature{1605 .features = featureSet(&[_]Feature{
1689 .addr_lsl_fast,
1690 .aes,1606 .aes,
1691 .aggressive_fma,1607 .aggressive_fma,
1692 .alu_lsl_fast,1608 .alu_lsl_fast,
1693 .arith_bcc_fusion,1609 .arith_bcc_fusion,
1610 .ccidx,
1694 .cmp_bcc_fusion,1611 .cmp_bcc_fusion,
1612 .fullfp16,
1695 .fuse_address,1613 .fuse_address,
1614 .fuse_adrp_add,
1696 .fuse_aes,1615 .fuse_aes,
1697 .fuse_literals,1616 .fuse_literals,
1698 .ldp_aligned_only,1617 .ldp_aligned_only,
1699 .perfmon,1618 .perfmon,
1700 .rand,1619 .rand,
1701 .sha3,1620 .sha3,
1621 .ssbs,
1702 .store_pair_suppress,1622 .store_pair_suppress,
1703 .stp_aligned_only,1623 .stp_aligned_only,
1704 .use_postra_scheduler,1624 .use_postra_scheduler,
...@@ -1709,13 +1629,16 @@ pub const cpu = struct {...@@ -1709,13 +1629,16 @@ pub const cpu = struct {
1709 .name = "ampere1a",1629 .name = "ampere1a",
1710 .llvm_name = "ampere1a",1630 .llvm_name = "ampere1a",
1711 .features = featureSet(&[_]Feature{1631 .features = featureSet(&[_]Feature{
1712 .addr_lsl_fast,
1713 .aes,1632 .aes,
1714 .aggressive_fma,1633 .aggressive_fma,
1715 .alu_lsl_fast,1634 .alu_lsl_fast,
1716 .arith_bcc_fusion,1635 .arith_bcc_fusion,
1636 .ccidx,
1717 .cmp_bcc_fusion,1637 .cmp_bcc_fusion,
1638 .fullfp16,
1718 .fuse_address,1639 .fuse_address,
1640 .fuse_addsub_2reg_const1,
1641 .fuse_adrp_add,
1719 .fuse_aes,1642 .fuse_aes,
1720 .fuse_literals,1643 .fuse_literals,
1721 .ldp_aligned_only,1644 .ldp_aligned_only,
...@@ -1724,6 +1647,7 @@ pub const cpu = struct {...@@ -1724,6 +1647,7 @@ pub const cpu = struct {
1724 .rand,1647 .rand,
1725 .sha3,1648 .sha3,
1726 .sm4,1649 .sm4,
1650 .ssbs,
1727 .store_pair_suppress,1651 .store_pair_suppress,
1728 .stp_aligned_only,1652 .stp_aligned_only,
1729 .use_postra_scheduler,1653 .use_postra_scheduler,
...@@ -1734,11 +1658,11 @@ pub const cpu = struct {...@@ -1734,11 +1658,11 @@ pub const cpu = struct {
1734 .name = "ampere1b",1658 .name = "ampere1b",
1735 .llvm_name = "ampere1b",1659 .llvm_name = "ampere1b",
1736 .features = featureSet(&[_]Feature{1660 .features = featureSet(&[_]Feature{
1737 .addr_lsl_fast,
1738 .aes,1661 .aes,
1739 .aggressive_fma,1662 .aggressive_fma,
1740 .alu_lsl_fast,1663 .alu_lsl_fast,
1741 .arith_bcc_fusion,1664 .arith_bcc_fusion,
1665 .ccidx,
1742 .cmp_bcc_fusion,1666 .cmp_bcc_fusion,
1743 .cssc,1667 .cssc,
1744 .enable_select_opt,1668 .enable_select_opt,
...@@ -1754,6 +1678,7 @@ pub const cpu = struct {...@@ -1754,6 +1678,7 @@ pub const cpu = struct {
1754 .rand,1678 .rand,
1755 .sha3,1679 .sha3,
1756 .sm4,1680 .sm4,
1681 .ssbs,
1757 .store_pair_suppress,1682 .store_pair_suppress,
1758 .stp_aligned_only,1683 .stp_aligned_only,
1759 .use_postra_scheduler,1684 .use_postra_scheduler,
...@@ -1764,11 +1689,11 @@ pub const cpu = struct {...@@ -1764,11 +1689,11 @@ pub const cpu = struct {
1764 .name = "apple_a10",1689 .name = "apple_a10",
1765 .llvm_name = "apple-a10",1690 .llvm_name = "apple-a10",
1766 .features = featureSet(&[_]Feature{1691 .features = featureSet(&[_]Feature{
1692 .aes,
1767 .alternate_sextload_cvt_f32_pattern,1693 .alternate_sextload_cvt_f32_pattern,
1768 .arith_bcc_fusion,1694 .arith_bcc_fusion,
1769 .arith_cbz_fusion,1695 .arith_cbz_fusion,
1770 .crc,1696 .crc,
1771 .crypto,
1772 .disable_latency_sched_heuristic,1697 .disable_latency_sched_heuristic,
1773 .fuse_aes,1698 .fuse_aes,
1774 .fuse_crypto_eor,1699 .fuse_crypto_eor,
...@@ -1776,6 +1701,7 @@ pub const cpu = struct {...@@ -1776,6 +1701,7 @@ pub const cpu = struct {
1776 .pan,1701 .pan,
1777 .perfmon,1702 .perfmon,
1778 .rdm,1703 .rdm,
1704 .sha2,
1779 .store_pair_suppress,1705 .store_pair_suppress,
1780 .v8a,1706 .v8a,
1781 .vh,1707 .vh,
...@@ -1787,15 +1713,16 @@ pub const cpu = struct {...@@ -1787,15 +1713,16 @@ pub const cpu = struct {
1787 .name = "apple_a11",1713 .name = "apple_a11",
1788 .llvm_name = "apple-a11",1714 .llvm_name = "apple-a11",
1789 .features = featureSet(&[_]Feature{1715 .features = featureSet(&[_]Feature{
1716 .aes,
1790 .alternate_sextload_cvt_f32_pattern,1717 .alternate_sextload_cvt_f32_pattern,
1791 .arith_bcc_fusion,1718 .arith_bcc_fusion,
1792 .arith_cbz_fusion,1719 .arith_cbz_fusion,
1793 .crypto,
1794 .disable_latency_sched_heuristic,1720 .disable_latency_sched_heuristic,
1795 .fullfp16,1721 .fullfp16,
1796 .fuse_aes,1722 .fuse_aes,
1797 .fuse_crypto_eor,1723 .fuse_crypto_eor,
1798 .perfmon,1724 .perfmon,
1725 .sha2,
1799 .store_pair_suppress,1726 .store_pair_suppress,
1800 .v8_2a,1727 .v8_2a,
1801 .zcm,1728 .zcm,
...@@ -1806,15 +1733,16 @@ pub const cpu = struct {...@@ -1806,15 +1733,16 @@ pub const cpu = struct {
1806 .name = "apple_a12",1733 .name = "apple_a12",
1807 .llvm_name = "apple-a12",1734 .llvm_name = "apple-a12",
1808 .features = featureSet(&[_]Feature{1735 .features = featureSet(&[_]Feature{
1736 .aes,
1809 .alternate_sextload_cvt_f32_pattern,1737 .alternate_sextload_cvt_f32_pattern,
1810 .arith_bcc_fusion,1738 .arith_bcc_fusion,
1811 .arith_cbz_fusion,1739 .arith_cbz_fusion,
1812 .crypto,
1813 .disable_latency_sched_heuristic,1740 .disable_latency_sched_heuristic,
1814 .fullfp16,1741 .fullfp16,
1815 .fuse_aes,1742 .fuse_aes,
1816 .fuse_crypto_eor,1743 .fuse_crypto_eor,
1817 .perfmon,1744 .perfmon,
1745 .sha2,
1818 .store_pair_suppress,1746 .store_pair_suppress,
1819 .v8_3a,1747 .v8_3a,
1820 .zcm,1748 .zcm,
...@@ -1825,10 +1753,10 @@ pub const cpu = struct {...@@ -1825,10 +1753,10 @@ pub const cpu = struct {
1825 .name = "apple_a13",1753 .name = "apple_a13",
1826 .llvm_name = "apple-a13",1754 .llvm_name = "apple-a13",
1827 .features = featureSet(&[_]Feature{1755 .features = featureSet(&[_]Feature{
1756 .aes,
1828 .alternate_sextload_cvt_f32_pattern,1757 .alternate_sextload_cvt_f32_pattern,
1829 .arith_bcc_fusion,1758 .arith_bcc_fusion,
1830 .arith_cbz_fusion,1759 .arith_cbz_fusion,
1831 .crypto,
1832 .disable_latency_sched_heuristic,1760 .disable_latency_sched_heuristic,
1833 .fp16fml,1761 .fp16fml,
1834 .fuse_aes,1762 .fuse_aes,
...@@ -1845,18 +1773,17 @@ pub const cpu = struct {...@@ -1845,18 +1773,17 @@ pub const cpu = struct {
1845 .name = "apple_a14",1773 .name = "apple_a14",
1846 .llvm_name = "apple-a14",1774 .llvm_name = "apple-a14",
1847 .features = featureSet(&[_]Feature{1775 .features = featureSet(&[_]Feature{
1776 .aes,
1848 .aggressive_fma,1777 .aggressive_fma,
1849 .alternate_sextload_cvt_f32_pattern,1778 .alternate_sextload_cvt_f32_pattern,
1850 .altnzcv,1779 .altnzcv,
1851 .arith_bcc_fusion,1780 .arith_bcc_fusion,
1852 .arith_cbz_fusion,1781 .arith_cbz_fusion,
1853 .ccdp,1782 .ccdp,
1854 .crypto,
1855 .disable_latency_sched_heuristic,1783 .disable_latency_sched_heuristic,
1856 .fp16fml,1784 .fp16fml,
1857 .fptoint,1785 .fptoint,
1858 .fuse_address,1786 .fuse_address,
1859 .fuse_adrp_add,
1860 .fuse_aes,1787 .fuse_aes,
1861 .fuse_arith_logic,1788 .fuse_arith_logic,
1862 .fuse_crypto_eor,1789 .fuse_crypto_eor,
...@@ -1878,10 +1805,10 @@ pub const cpu = struct {...@@ -1878,10 +1805,10 @@ pub const cpu = struct {
1878 .name = "apple_a15",1805 .name = "apple_a15",
1879 .llvm_name = "apple-a15",1806 .llvm_name = "apple-a15",
1880 .features = featureSet(&[_]Feature{1807 .features = featureSet(&[_]Feature{
1808 .aes,
1881 .alternate_sextload_cvt_f32_pattern,1809 .alternate_sextload_cvt_f32_pattern,
1882 .arith_bcc_fusion,1810 .arith_bcc_fusion,
1883 .arith_cbz_fusion,1811 .arith_cbz_fusion,
1884 .crypto,
1885 .disable_latency_sched_heuristic,1812 .disable_latency_sched_heuristic,
1886 .fp16fml,1813 .fp16fml,
1887 .fuse_address,1814 .fuse_address,
...@@ -1892,6 +1819,7 @@ pub const cpu = struct {...@@ -1892,6 +1819,7 @@ pub const cpu = struct {
1892 .fuse_literals,1819 .fuse_literals,
1893 .perfmon,1820 .perfmon,
1894 .sha3,1821 .sha3,
1822 .ssbs,
1895 .store_pair_suppress,1823 .store_pair_suppress,
1896 .v8_6a,1824 .v8_6a,
1897 .zcm,1825 .zcm,
...@@ -1902,13 +1830,14 @@ pub const cpu = struct {...@@ -1902,13 +1830,14 @@ pub const cpu = struct {
1902 .name = "apple_a16",1830 .name = "apple_a16",
1903 .llvm_name = "apple-a16",1831 .llvm_name = "apple-a16",
1904 .features = featureSet(&[_]Feature{1832 .features = featureSet(&[_]Feature{
1833 .aes,
1905 .alternate_sextload_cvt_f32_pattern,1834 .alternate_sextload_cvt_f32_pattern,
1906 .arith_bcc_fusion,1835 .arith_bcc_fusion,
1907 .arith_cbz_fusion,1836 .arith_cbz_fusion,
1908 .crypto,
1909 .disable_latency_sched_heuristic,1837 .disable_latency_sched_heuristic,
1910 .fp16fml,1838 .fp16fml,
1911 .fuse_address,1839 .fuse_address,
1840 .fuse_adrp_add,
1912 .fuse_aes,1841 .fuse_aes,
1913 .fuse_arith_logic,1842 .fuse_arith_logic,
1914 .fuse_crypto_eor,1843 .fuse_crypto_eor,
...@@ -1917,6 +1846,7 @@ pub const cpu = struct {...@@ -1917,6 +1846,7 @@ pub const cpu = struct {
1917 .hcx,1846 .hcx,
1918 .perfmon,1847 .perfmon,
1919 .sha3,1848 .sha3,
1849 .ssbs,
1920 .store_pair_suppress,1850 .store_pair_suppress,
1921 .v8_6a,1851 .v8_6a,
1922 .zcm,1852 .zcm,
...@@ -1927,13 +1857,14 @@ pub const cpu = struct {...@@ -1927,13 +1857,14 @@ pub const cpu = struct {
1927 .name = "apple_a17",1857 .name = "apple_a17",
1928 .llvm_name = "apple-a17",1858 .llvm_name = "apple-a17",
1929 .features = featureSet(&[_]Feature{1859 .features = featureSet(&[_]Feature{
1860 .aes,
1930 .alternate_sextload_cvt_f32_pattern,1861 .alternate_sextload_cvt_f32_pattern,
1931 .arith_bcc_fusion,1862 .arith_bcc_fusion,
1932 .arith_cbz_fusion,1863 .arith_cbz_fusion,
1933 .crypto,
1934 .disable_latency_sched_heuristic,1864 .disable_latency_sched_heuristic,
1935 .fp16fml,1865 .fp16fml,
1936 .fuse_address,1866 .fuse_address,
1867 .fuse_adrp_add,
1937 .fuse_aes,1868 .fuse_aes,
1938 .fuse_arith_logic,1869 .fuse_arith_logic,
1939 .fuse_crypto_eor,1870 .fuse_crypto_eor,
...@@ -1942,6 +1873,7 @@ pub const cpu = struct {...@@ -1942,6 +1873,7 @@ pub const cpu = struct {
1942 .hcx,1873 .hcx,
1943 .perfmon,1874 .perfmon,
1944 .sha3,1875 .sha3,
1876 .ssbs,
1945 .store_pair_suppress,1877 .store_pair_suppress,
1946 .v8_6a,1878 .v8_6a,
1947 .zcm,1879 .zcm,
...@@ -1952,14 +1884,15 @@ pub const cpu = struct {...@@ -1952,14 +1884,15 @@ pub const cpu = struct {
1952 .name = "apple_a7",1884 .name = "apple_a7",
1953 .llvm_name = "apple-a7",1885 .llvm_name = "apple-a7",
1954 .features = featureSet(&[_]Feature{1886 .features = featureSet(&[_]Feature{
1887 .aes,
1955 .alternate_sextload_cvt_f32_pattern,1888 .alternate_sextload_cvt_f32_pattern,
1956 .arith_bcc_fusion,1889 .arith_bcc_fusion,
1957 .arith_cbz_fusion,1890 .arith_cbz_fusion,
1958 .crypto,
1959 .disable_latency_sched_heuristic,1891 .disable_latency_sched_heuristic,
1960 .fuse_aes,1892 .fuse_aes,
1961 .fuse_crypto_eor,1893 .fuse_crypto_eor,
1962 .perfmon,1894 .perfmon,
1895 .sha2,
1963 .store_pair_suppress,1896 .store_pair_suppress,
1964 .v8a,1897 .v8a,
1965 .zcm,1898 .zcm,
...@@ -1971,14 +1904,15 @@ pub const cpu = struct {...@@ -1971,14 +1904,15 @@ pub const cpu = struct {
1971 .name = "apple_a8",1904 .name = "apple_a8",
1972 .llvm_name = "apple-a8",1905 .llvm_name = "apple-a8",
1973 .features = featureSet(&[_]Feature{1906 .features = featureSet(&[_]Feature{
1907 .aes,
1974 .alternate_sextload_cvt_f32_pattern,1908 .alternate_sextload_cvt_f32_pattern,
1975 .arith_bcc_fusion,1909 .arith_bcc_fusion,
1976 .arith_cbz_fusion,1910 .arith_cbz_fusion,
1977 .crypto,
1978 .disable_latency_sched_heuristic,1911 .disable_latency_sched_heuristic,
1979 .fuse_aes,1912 .fuse_aes,
1980 .fuse_crypto_eor,1913 .fuse_crypto_eor,
1981 .perfmon,1914 .perfmon,
1915 .sha2,
1982 .store_pair_suppress,1916 .store_pair_suppress,
1983 .v8a,1917 .v8a,
1984 .zcm,1918 .zcm,
...@@ -1990,14 +1924,15 @@ pub const cpu = struct {...@@ -1990,14 +1924,15 @@ pub const cpu = struct {
1990 .name = "apple_a9",1924 .name = "apple_a9",
1991 .llvm_name = "apple-a9",1925 .llvm_name = "apple-a9",
1992 .features = featureSet(&[_]Feature{1926 .features = featureSet(&[_]Feature{
1927 .aes,
1993 .alternate_sextload_cvt_f32_pattern,1928 .alternate_sextload_cvt_f32_pattern,
1994 .arith_bcc_fusion,1929 .arith_bcc_fusion,
1995 .arith_cbz_fusion,1930 .arith_cbz_fusion,
1996 .crypto,
1997 .disable_latency_sched_heuristic,1931 .disable_latency_sched_heuristic,
1998 .fuse_aes,1932 .fuse_aes,
1999 .fuse_crypto_eor,1933 .fuse_crypto_eor,
2000 .perfmon,1934 .perfmon,
1935 .sha2,
2001 .store_pair_suppress,1936 .store_pair_suppress,
2002 .v8a,1937 .v8a,
2003 .zcm,1938 .zcm,
...@@ -2005,47 +1940,21 @@ pub const cpu = struct {...@@ -2005,47 +1940,21 @@ pub const cpu = struct {
2005 .zcz_fp_workaround,1940 .zcz_fp_workaround,
2006 }),1941 }),
2007 };1942 };
2008 pub const apple_latest = CpuModel{
2009 .name = "apple_latest",
2010 .llvm_name = "apple-latest",
2011 .features = featureSet(&[_]Feature{
2012 .alternate_sextload_cvt_f32_pattern,
2013 .arith_bcc_fusion,
2014 .arith_cbz_fusion,
2015 .crypto,
2016 .disable_latency_sched_heuristic,
2017 .fp16fml,
2018 .fuse_address,
2019 .fuse_aes,
2020 .fuse_arith_logic,
2021 .fuse_crypto_eor,
2022 .fuse_csel,
2023 .fuse_literals,
2024 .hcx,
2025 .perfmon,
2026 .sha3,
2027 .store_pair_suppress,
2028 .v8_6a,
2029 .zcm,
2030 .zcz,
2031 }),
2032 };
2033 pub const apple_m1 = CpuModel{1943 pub const apple_m1 = CpuModel{
2034 .name = "apple_m1",1944 .name = "apple_m1",
2035 .llvm_name = "apple-m1",1945 .llvm_name = "apple-m1",
2036 .features = featureSet(&[_]Feature{1946 .features = featureSet(&[_]Feature{
1947 .aes,
2037 .aggressive_fma,1948 .aggressive_fma,
2038 .alternate_sextload_cvt_f32_pattern,1949 .alternate_sextload_cvt_f32_pattern,
2039 .altnzcv,1950 .altnzcv,
2040 .arith_bcc_fusion,1951 .arith_bcc_fusion,
2041 .arith_cbz_fusion,1952 .arith_cbz_fusion,
2042 .ccdp,1953 .ccdp,
2043 .crypto,
2044 .disable_latency_sched_heuristic,1954 .disable_latency_sched_heuristic,
2045 .fp16fml,1955 .fp16fml,
2046 .fptoint,1956 .fptoint,
2047 .fuse_address,1957 .fuse_address,
2048 .fuse_adrp_add,
2049 .fuse_aes,1958 .fuse_aes,
2050 .fuse_arith_logic,1959 .fuse_arith_logic,
2051 .fuse_crypto_eor,1960 .fuse_crypto_eor,
...@@ -2067,10 +1976,10 @@ pub const cpu = struct {...@@ -2067,10 +1976,10 @@ pub const cpu = struct {
2067 .name = "apple_m2",1976 .name = "apple_m2",
2068 .llvm_name = "apple-m2",1977 .llvm_name = "apple-m2",
2069 .features = featureSet(&[_]Feature{1978 .features = featureSet(&[_]Feature{
1979 .aes,
2070 .alternate_sextload_cvt_f32_pattern,1980 .alternate_sextload_cvt_f32_pattern,
2071 .arith_bcc_fusion,1981 .arith_bcc_fusion,
2072 .arith_cbz_fusion,1982 .arith_cbz_fusion,
2073 .crypto,
2074 .disable_latency_sched_heuristic,1983 .disable_latency_sched_heuristic,
2075 .fp16fml,1984 .fp16fml,
2076 .fuse_address,1985 .fuse_address,
...@@ -2081,6 +1990,7 @@ pub const cpu = struct {...@@ -2081,6 +1990,7 @@ pub const cpu = struct {
2081 .fuse_literals,1990 .fuse_literals,
2082 .perfmon,1991 .perfmon,
2083 .sha3,1992 .sha3,
1993 .ssbs,
2084 .store_pair_suppress,1994 .store_pair_suppress,
2085 .v8_6a,1995 .v8_6a,
2086 .zcm,1996 .zcm,
...@@ -2091,13 +2001,14 @@ pub const cpu = struct {...@@ -2091,13 +2001,14 @@ pub const cpu = struct {
2091 .name = "apple_m3",2001 .name = "apple_m3",
2092 .llvm_name = "apple-m3",2002 .llvm_name = "apple-m3",
2093 .features = featureSet(&[_]Feature{2003 .features = featureSet(&[_]Feature{
2004 .aes,
2094 .alternate_sextload_cvt_f32_pattern,2005 .alternate_sextload_cvt_f32_pattern,
2095 .arith_bcc_fusion,2006 .arith_bcc_fusion,
2096 .arith_cbz_fusion,2007 .arith_cbz_fusion,
2097 .crypto,
2098 .disable_latency_sched_heuristic,2008 .disable_latency_sched_heuristic,
2099 .fp16fml,2009 .fp16fml,
2100 .fuse_address,2010 .fuse_address,
2011 .fuse_adrp_add,
2101 .fuse_aes,2012 .fuse_aes,
2102 .fuse_arith_logic,2013 .fuse_arith_logic,
2103 .fuse_crypto_eor,2014 .fuse_crypto_eor,
...@@ -2106,25 +2017,53 @@ pub const cpu = struct {...@@ -2106,25 +2017,53 @@ pub const cpu = struct {
2106 .hcx,2017 .hcx,
2107 .perfmon,2018 .perfmon,
2108 .sha3,2019 .sha3,
2020 .ssbs,
2109 .store_pair_suppress,2021 .store_pair_suppress,
2110 .v8_6a,2022 .v8_6a,
2111 .zcm,2023 .zcm,
2112 .zcz,2024 .zcz,
2113 }),2025 }),
2114 };2026 };
2027 pub const apple_m4 = CpuModel{
2028 .name = "apple_m4",
2029 .llvm_name = "apple-m4",
2030 .features = featureSet(&[_]Feature{
2031 .aes,
2032 .alternate_sextload_cvt_f32_pattern,
2033 .arith_bcc_fusion,
2034 .arith_cbz_fusion,
2035 .disable_latency_sched_heuristic,
2036 .fp16fml,
2037 .fuse_address,
2038 .fuse_aes,
2039 .fuse_arith_logic,
2040 .fuse_crypto_eor,
2041 .fuse_csel,
2042 .fuse_literals,
2043 .perfmon,
2044 .sha3,
2045 .sme2,
2046 .sme_f64f64,
2047 .sme_i16i64,
2048 .v9_2a,
2049 .zcm,
2050 .zcz,
2051 }),
2052 };
2115 pub const apple_s4 = CpuModel{2053 pub const apple_s4 = CpuModel{
2116 .name = "apple_s4",2054 .name = "apple_s4",
2117 .llvm_name = "apple-s4",2055 .llvm_name = "apple-s4",
2118 .features = featureSet(&[_]Feature{2056 .features = featureSet(&[_]Feature{
2057 .aes,
2119 .alternate_sextload_cvt_f32_pattern,2058 .alternate_sextload_cvt_f32_pattern,
2120 .arith_bcc_fusion,2059 .arith_bcc_fusion,
2121 .arith_cbz_fusion,2060 .arith_cbz_fusion,
2122 .crypto,
2123 .disable_latency_sched_heuristic,2061 .disable_latency_sched_heuristic,
2124 .fullfp16,2062 .fullfp16,
2125 .fuse_aes,2063 .fuse_aes,
2126 .fuse_crypto_eor,2064 .fuse_crypto_eor,
2127 .perfmon,2065 .perfmon,
2066 .sha2,
2128 .store_pair_suppress,2067 .store_pair_suppress,
2129 .v8_3a,2068 .v8_3a,
2130 .zcm,2069 .zcm,
...@@ -2135,15 +2074,16 @@ pub const cpu = struct {...@@ -2135,15 +2074,16 @@ pub const cpu = struct {
2135 .name = "apple_s5",2074 .name = "apple_s5",
2136 .llvm_name = "apple-s5",2075 .llvm_name = "apple-s5",
2137 .features = featureSet(&[_]Feature{2076 .features = featureSet(&[_]Feature{
2077 .aes,
2138 .alternate_sextload_cvt_f32_pattern,2078 .alternate_sextload_cvt_f32_pattern,
2139 .arith_bcc_fusion,2079 .arith_bcc_fusion,
2140 .arith_cbz_fusion,2080 .arith_cbz_fusion,
2141 .crypto,
2142 .disable_latency_sched_heuristic,2081 .disable_latency_sched_heuristic,
2143 .fullfp16,2082 .fullfp16,
2144 .fuse_aes,2083 .fuse_aes,
2145 .fuse_crypto_eor,2084 .fuse_crypto_eor,
2146 .perfmon,2085 .perfmon,
2086 .sha2,
2147 .store_pair_suppress,2087 .store_pair_suppress,
2148 .v8_3a,2088 .v8_3a,
2149 .zcm,2089 .zcm,
...@@ -2154,18 +2094,42 @@ pub const cpu = struct {...@@ -2154,18 +2094,42 @@ pub const cpu = struct {
2154 .name = "carmel",2094 .name = "carmel",
2155 .llvm_name = "carmel",2095 .llvm_name = "carmel",
2156 .features = featureSet(&[_]Feature{2096 .features = featureSet(&[_]Feature{
2157 .crypto,2097 .aes,
2158 .fullfp16,2098 .fullfp16,
2099 .sha2,
2159 .v8_2a,2100 .v8_2a,
2160 }),2101 }),
2161 };2102 };
2103 pub const cobalt_100 = CpuModel{
2104 .name = "cobalt_100",
2105 .llvm_name = "cobalt-100",
2106 .features = featureSet(&[_]Feature{
2107 .alu_lsl_fast,
2108 .bf16,
2109 .ccidx,
2110 .enable_select_opt,
2111 .ete,
2112 .fp16fml,
2113 .fuse_adrp_add,
2114 .fuse_aes,
2115 .i8mm,
2116 .mte,
2117 .perfmon,
2118 .predictable_select_expensive,
2119 .ssbs,
2120 .sve2_bitperm,
2121 .use_postra_scheduler,
2122 .v9a,
2123 }),
2124 };
2162 pub const cortex_a34 = CpuModel{2125 pub const cortex_a34 = CpuModel{
2163 .name = "cortex_a34",2126 .name = "cortex_a34",
2164 .llvm_name = "cortex-a34",2127 .llvm_name = "cortex-a34",
2165 .features = featureSet(&[_]Feature{2128 .features = featureSet(&[_]Feature{
2129 .aes,
2166 .crc,2130 .crc,
2167 .crypto,
2168 .perfmon,2131 .perfmon,
2132 .sha2,
2169 .v8a,2133 .v8a,
2170 }),2134 }),
2171 };2135 };
...@@ -2173,9 +2137,10 @@ pub const cpu = struct {...@@ -2173,9 +2137,10 @@ pub const cpu = struct {
2173 .name = "cortex_a35",2137 .name = "cortex_a35",
2174 .llvm_name = "cortex-a35",2138 .llvm_name = "cortex-a35",
2175 .features = featureSet(&[_]Feature{2139 .features = featureSet(&[_]Feature{
2140 .aes,
2176 .crc,2141 .crc,
2177 .crypto,
2178 .perfmon,2142 .perfmon,
2143 .sha2,
2179 .v8a,2144 .v8a,
2180 }),2145 }),
2181 };2146 };
...@@ -2183,14 +2148,18 @@ pub const cpu = struct {...@@ -2183,14 +2148,18 @@ pub const cpu = struct {
2183 .name = "cortex_a510",2148 .name = "cortex_a510",
2184 .llvm_name = "cortex-a510",2149 .llvm_name = "cortex-a510",
2185 .features = featureSet(&[_]Feature{2150 .features = featureSet(&[_]Feature{
2186 .a510,
2187 .bf16,2151 .bf16,
2152 .ccidx,
2188 .ete,2153 .ete,
2189 .fp16fml,2154 .fp16fml,
2155 .fuse_adrp_add,
2156 .fuse_aes,
2190 .i8mm,2157 .i8mm,
2191 .mte,2158 .mte,
2192 .perfmon,2159 .perfmon,
2160 .ssbs,
2193 .sve2_bitperm,2161 .sve2_bitperm,
2162 .use_postra_scheduler,
2194 .v9a,2163 .v9a,
2195 }),2164 }),
2196 };2165 };
...@@ -2198,12 +2167,33 @@ pub const cpu = struct {...@@ -2198,12 +2167,33 @@ pub const cpu = struct {
2198 .name = "cortex_a520",2167 .name = "cortex_a520",
2199 .llvm_name = "cortex-a520",2168 .llvm_name = "cortex-a520",
2200 .features = featureSet(&[_]Feature{2169 .features = featureSet(&[_]Feature{
2201 .a520,2170 .ccidx,
2202 .ete,2171 .ete,
2203 .fp16fml,2172 .fp16fml,
2173 .fuse_adrp_add,
2174 .fuse_aes,
2204 .mte,2175 .mte,
2205 .perfmon,2176 .perfmon,
2177 .ssbs,
2206 .sve2_bitperm,2178 .sve2_bitperm,
2179 .use_postra_scheduler,
2180 .v9_2a,
2181 }),
2182 };
2183 pub const cortex_a520ae = CpuModel{
2184 .name = "cortex_a520ae",
2185 .llvm_name = "cortex-a520ae",
2186 .features = featureSet(&[_]Feature{
2187 .ccidx,
2188 .ete,
2189 .fp16fml,
2190 .fuse_adrp_add,
2191 .fuse_aes,
2192 .mte,
2193 .perfmon,
2194 .ssbs,
2195 .sve2_bitperm,
2196 .use_postra_scheduler,
2207 .v9_2a,2197 .v9_2a,
2208 }),2198 }),
2209 };2199 };
...@@ -2211,12 +2201,13 @@ pub const cpu = struct {...@@ -2211,12 +2201,13 @@ pub const cpu = struct {
2211 .name = "cortex_a53",2201 .name = "cortex_a53",
2212 .llvm_name = "cortex-a53",2202 .llvm_name = "cortex-a53",
2213 .features = featureSet(&[_]Feature{2203 .features = featureSet(&[_]Feature{
2204 .aes,
2214 .balance_fp_ops,2205 .balance_fp_ops,
2215 .crc,2206 .crc,
2216 .crypto,
2217 .fuse_adrp_add,2207 .fuse_adrp_add,
2218 .fuse_aes,2208 .fuse_aes,
2219 .perfmon,2209 .perfmon,
2210 .sha2,
2220 .use_postra_scheduler,2211 .use_postra_scheduler,
2221 .v8a,2212 .v8a,
2222 }),2213 }),
...@@ -2225,7 +2216,7 @@ pub const cpu = struct {...@@ -2225,7 +2216,7 @@ pub const cpu = struct {
2225 .name = "cortex_a55",2216 .name = "cortex_a55",
2226 .llvm_name = "cortex-a55",2217 .llvm_name = "cortex-a55",
2227 .features = featureSet(&[_]Feature{2218 .features = featureSet(&[_]Feature{
2228 .crypto,2219 .aes,
2229 .dotprod,2220 .dotprod,
2230 .fullfp16,2221 .fullfp16,
2231 .fuse_address,2222 .fuse_address,
...@@ -2233,6 +2224,7 @@ pub const cpu = struct {...@@ -2233,6 +2224,7 @@ pub const cpu = struct {
2233 .fuse_aes,2224 .fuse_aes,
2234 .perfmon,2225 .perfmon,
2235 .rcpc,2226 .rcpc,
2227 .sha2,
2236 .use_postra_scheduler,2228 .use_postra_scheduler,
2237 .v8_2a,2229 .v8_2a,
2238 }),2230 }),
...@@ -2241,15 +2233,17 @@ pub const cpu = struct {...@@ -2241,15 +2233,17 @@ pub const cpu = struct {
2241 .name = "cortex_a57",2233 .name = "cortex_a57",
2242 .llvm_name = "cortex-a57",2234 .llvm_name = "cortex-a57",
2243 .features = featureSet(&[_]Feature{2235 .features = featureSet(&[_]Feature{
2236 .addr_lsl_slow_14,
2237 .aes,
2244 .balance_fp_ops,2238 .balance_fp_ops,
2245 .crc,2239 .crc,
2246 .crypto,
2247 .enable_select_opt,2240 .enable_select_opt,
2248 .fuse_adrp_add,2241 .fuse_adrp_add,
2249 .fuse_aes,2242 .fuse_aes,
2250 .fuse_literals,2243 .fuse_literals,
2251 .perfmon,2244 .perfmon,
2252 .predictable_select_expensive,2245 .predictable_select_expensive,
2246 .sha2,
2253 .use_postra_scheduler,2247 .use_postra_scheduler,
2254 .v8a,2248 .v8a,
2255 }),2249 }),
...@@ -2258,12 +2252,18 @@ pub const cpu = struct {...@@ -2258,12 +2252,18 @@ pub const cpu = struct {
2258 .name = "cortex_a65",2252 .name = "cortex_a65",
2259 .llvm_name = "cortex-a65",2253 .llvm_name = "cortex-a65",
2260 .features = featureSet(&[_]Feature{2254 .features = featureSet(&[_]Feature{
2261 .a65,2255 .aes,
2262 .crypto,
2263 .dotprod,2256 .dotprod,
2257 .enable_select_opt,
2264 .fullfp16,2258 .fullfp16,
2259 .fuse_address,
2260 .fuse_adrp_add,
2261 .fuse_aes,
2262 .fuse_literals,
2265 .perfmon,2263 .perfmon,
2264 .predictable_select_expensive,
2266 .rcpc,2265 .rcpc,
2266 .sha2,
2267 .ssbs,2267 .ssbs,
2268 .v8_2a,2268 .v8_2a,
2269 }),2269 }),
...@@ -2272,12 +2272,18 @@ pub const cpu = struct {...@@ -2272,12 +2272,18 @@ pub const cpu = struct {
2272 .name = "cortex_a65ae",2272 .name = "cortex_a65ae",
2273 .llvm_name = "cortex-a65ae",2273 .llvm_name = "cortex-a65ae",
2274 .features = featureSet(&[_]Feature{2274 .features = featureSet(&[_]Feature{
2275 .a65,2275 .aes,
2276 .crypto,
2277 .dotprod,2276 .dotprod,
2277 .enable_select_opt,
2278 .fullfp16,2278 .fullfp16,
2279 .fuse_address,
2280 .fuse_adrp_add,
2281 .fuse_aes,
2282 .fuse_literals,
2279 .perfmon,2283 .perfmon,
2284 .predictable_select_expensive,
2280 .rcpc,2285 .rcpc,
2286 .sha2,
2281 .ssbs,2287 .ssbs,
2282 .v8_2a,2288 .v8_2a,
2283 }),2289 }),
...@@ -2286,14 +2292,22 @@ pub const cpu = struct {...@@ -2286,14 +2292,22 @@ pub const cpu = struct {
2286 .name = "cortex_a710",2292 .name = "cortex_a710",
2287 .llvm_name = "cortex-a710",2293 .llvm_name = "cortex-a710",
2288 .features = featureSet(&[_]Feature{2294 .features = featureSet(&[_]Feature{
2289 .a710,2295 .alu_lsl_fast,
2290 .bf16,2296 .bf16,
2297 .ccidx,
2298 .cmp_bcc_fusion,
2299 .enable_select_opt,
2291 .ete,2300 .ete,
2292 .fp16fml,2301 .fp16fml,
2302 .fuse_adrp_add,
2303 .fuse_aes,
2293 .i8mm,2304 .i8mm,
2294 .mte,2305 .mte,
2295 .perfmon,2306 .perfmon,
2307 .predictable_select_expensive,
2308 .ssbs,
2296 .sve2_bitperm,2309 .sve2_bitperm,
2310 .use_postra_scheduler,
2297 .v9a,2311 .v9a,
2298 }),2312 }),
2299 };2313 };
...@@ -2301,9 +2315,9 @@ pub const cpu = struct {...@@ -2301,9 +2315,9 @@ pub const cpu = struct {
2301 .name = "cortex_a715",2315 .name = "cortex_a715",
2302 .llvm_name = "cortex-a715",2316 .llvm_name = "cortex-a715",
2303 .features = featureSet(&[_]Feature{2317 .features = featureSet(&[_]Feature{
2304 .addr_lsl_fast,
2305 .alu_lsl_fast,2318 .alu_lsl_fast,
2306 .bf16,2319 .bf16,
2320 .ccidx,
2307 .cmp_bcc_fusion,2321 .cmp_bcc_fusion,
2308 .enable_select_opt,2322 .enable_select_opt,
2309 .ete,2323 .ete,
...@@ -2315,6 +2329,7 @@ pub const cpu = struct {...@@ -2315,6 +2329,7 @@ pub const cpu = struct {
2315 .perfmon,2329 .perfmon,
2316 .predictable_select_expensive,2330 .predictable_select_expensive,
2317 .spe,2331 .spe,
2332 .ssbs,
2318 .sve2_bitperm,2333 .sve2_bitperm,
2319 .use_postra_scheduler,2334 .use_postra_scheduler,
2320 .v9a,2335 .v9a,
...@@ -2324,14 +2339,16 @@ pub const cpu = struct {...@@ -2324,14 +2339,16 @@ pub const cpu = struct {
2324 .name = "cortex_a72",2339 .name = "cortex_a72",
2325 .llvm_name = "cortex-a72",2340 .llvm_name = "cortex-a72",
2326 .features = featureSet(&[_]Feature{2341 .features = featureSet(&[_]Feature{
2342 .addr_lsl_slow_14,
2343 .aes,
2327 .crc,2344 .crc,
2328 .crypto,
2329 .enable_select_opt,2345 .enable_select_opt,
2330 .fuse_adrp_add,2346 .fuse_adrp_add,
2331 .fuse_aes,2347 .fuse_aes,
2332 .fuse_literals,2348 .fuse_literals,
2333 .perfmon,2349 .perfmon,
2334 .predictable_select_expensive,2350 .predictable_select_expensive,
2351 .sha2,
2335 .v8a,2352 .v8a,
2336 }),2353 }),
2337 };2354 };
...@@ -2339,14 +2356,68 @@ pub const cpu = struct {...@@ -2339,14 +2356,68 @@ pub const cpu = struct {
2339 .name = "cortex_a720",2356 .name = "cortex_a720",
2340 .llvm_name = "cortex-a720",2357 .llvm_name = "cortex-a720",
2341 .features = featureSet(&[_]Feature{2358 .features = featureSet(&[_]Feature{
2342 .a720,2359 .alu_lsl_fast,
2360 .ccidx,
2361 .cmp_bcc_fusion,
2362 .enable_select_opt,
2363 .ete,
2364 .fp16fml,
2365 .fuse_adrp_add,
2366 .fuse_aes,
2367 .mte,
2368 .perfmon,
2369 .predictable_select_expensive,
2370 .spe,
2371 .spe_eef,
2372 .ssbs,
2373 .sve2_bitperm,
2374 .use_postra_scheduler,
2375 .v9_2a,
2376 }),
2377 };
2378 pub const cortex_a720ae = CpuModel{
2379 .name = "cortex_a720ae",
2380 .llvm_name = "cortex-a720ae",
2381 .features = featureSet(&[_]Feature{
2382 .alu_lsl_fast,
2383 .ccidx,
2384 .cmp_bcc_fusion,
2385 .enable_select_opt,
2386 .ete,
2387 .fp16fml,
2388 .fuse_adrp_add,
2389 .fuse_aes,
2390 .mte,
2391 .perfmon,
2392 .predictable_select_expensive,
2393 .spe,
2394 .spe_eef,
2395 .ssbs,
2396 .sve2_bitperm,
2397 .use_postra_scheduler,
2398 .v9_2a,
2399 }),
2400 };
2401 pub const cortex_a725 = CpuModel{
2402 .name = "cortex_a725",
2403 .llvm_name = "cortex-a725",
2404 .features = featureSet(&[_]Feature{
2405 .alu_lsl_fast,
2406 .ccidx,
2407 .cmp_bcc_fusion,
2408 .enable_select_opt,
2343 .ete,2409 .ete,
2344 .fp16fml,2410 .fp16fml,
2411 .fuse_adrp_add,
2412 .fuse_aes,
2345 .mte,2413 .mte,
2346 .perfmon,2414 .perfmon,
2415 .predictable_select_expensive,
2347 .spe,2416 .spe,
2348 .spe_eef,2417 .spe_eef,
2418 .ssbs,
2349 .sve2_bitperm,2419 .sve2_bitperm,
2420 .use_postra_scheduler,
2350 .v9_2a,2421 .v9_2a,
2351 }),2422 }),
2352 };2423 };
...@@ -2354,13 +2425,15 @@ pub const cpu = struct {...@@ -2354,13 +2425,15 @@ pub const cpu = struct {
2354 .name = "cortex_a73",2425 .name = "cortex_a73",
2355 .llvm_name = "cortex-a73",2426 .llvm_name = "cortex-a73",
2356 .features = featureSet(&[_]Feature{2427 .features = featureSet(&[_]Feature{
2428 .addr_lsl_slow_14,
2429 .aes,
2357 .crc,2430 .crc,
2358 .crypto,
2359 .enable_select_opt,2431 .enable_select_opt,
2360 .fuse_adrp_add,2432 .fuse_adrp_add,
2361 .fuse_aes,2433 .fuse_aes,
2362 .perfmon,2434 .perfmon,
2363 .predictable_select_expensive,2435 .predictable_select_expensive,
2436 .sha2,
2364 .v8a,2437 .v8a,
2365 }),2438 }),
2366 };2439 };
...@@ -2368,7 +2441,8 @@ pub const cpu = struct {...@@ -2368,7 +2441,8 @@ pub const cpu = struct {
2368 .name = "cortex_a75",2441 .name = "cortex_a75",
2369 .llvm_name = "cortex-a75",2442 .llvm_name = "cortex-a75",
2370 .features = featureSet(&[_]Feature{2443 .features = featureSet(&[_]Feature{
2371 .crypto,2444 .addr_lsl_slow_14,
2445 .aes,
2372 .dotprod,2446 .dotprod,
2373 .enable_select_opt,2447 .enable_select_opt,
2374 .fullfp16,2448 .fullfp16,
...@@ -2377,6 +2451,7 @@ pub const cpu = struct {...@@ -2377,6 +2451,7 @@ pub const cpu = struct {
2377 .perfmon,2451 .perfmon,
2378 .predictable_select_expensive,2452 .predictable_select_expensive,
2379 .rcpc,2453 .rcpc,
2454 .sha2,
2380 .v8_2a,2455 .v8_2a,
2381 }),2456 }),
2382 };2457 };
...@@ -2384,12 +2459,18 @@ pub const cpu = struct {...@@ -2384,12 +2459,18 @@ pub const cpu = struct {
2384 .name = "cortex_a76",2459 .name = "cortex_a76",
2385 .llvm_name = "cortex-a76",2460 .llvm_name = "cortex-a76",
2386 .features = featureSet(&[_]Feature{2461 .features = featureSet(&[_]Feature{
2387 .a76,2462 .addr_lsl_slow_14,
2388 .crypto,2463 .aes,
2464 .alu_lsl_fast,
2389 .dotprod,2465 .dotprod,
2466 .enable_select_opt,
2390 .fullfp16,2467 .fullfp16,
2468 .fuse_adrp_add,
2469 .fuse_aes,
2391 .perfmon,2470 .perfmon,
2471 .predictable_select_expensive,
2392 .rcpc,2472 .rcpc,
2473 .sha2,
2393 .ssbs,2474 .ssbs,
2394 .v8_2a,2475 .v8_2a,
2395 }),2476 }),
...@@ -2398,12 +2479,18 @@ pub const cpu = struct {...@@ -2398,12 +2479,18 @@ pub const cpu = struct {
2398 .name = "cortex_a76ae",2479 .name = "cortex_a76ae",
2399 .llvm_name = "cortex-a76ae",2480 .llvm_name = "cortex-a76ae",
2400 .features = featureSet(&[_]Feature{2481 .features = featureSet(&[_]Feature{
2401 .a76,2482 .addr_lsl_slow_14,
2402 .crypto,2483 .aes,
2484 .alu_lsl_fast,
2403 .dotprod,2485 .dotprod,
2486 .enable_select_opt,
2404 .fullfp16,2487 .fullfp16,
2488 .fuse_adrp_add,
2489 .fuse_aes,
2405 .perfmon,2490 .perfmon,
2491 .predictable_select_expensive,
2406 .rcpc,2492 .rcpc,
2493 .sha2,
2407 .ssbs,2494 .ssbs,
2408 .v8_2a,2495 .v8_2a,
2409 }),2496 }),
...@@ -2412,10 +2499,10 @@ pub const cpu = struct {...@@ -2412,10 +2499,10 @@ pub const cpu = struct {
2412 .name = "cortex_a77",2499 .name = "cortex_a77",
2413 .llvm_name = "cortex-a77",2500 .llvm_name = "cortex-a77",
2414 .features = featureSet(&[_]Feature{2501 .features = featureSet(&[_]Feature{
2415 .addr_lsl_fast,2502 .addr_lsl_slow_14,
2503 .aes,
2416 .alu_lsl_fast,2504 .alu_lsl_fast,
2417 .cmp_bcc_fusion,2505 .cmp_bcc_fusion,
2418 .crypto,
2419 .dotprod,2506 .dotprod,
2420 .enable_select_opt,2507 .enable_select_opt,
2421 .fullfp16,2508 .fullfp16,
...@@ -2424,6 +2511,7 @@ pub const cpu = struct {...@@ -2424,6 +2511,7 @@ pub const cpu = struct {
2424 .perfmon,2511 .perfmon,
2425 .predictable_select_expensive,2512 .predictable_select_expensive,
2426 .rcpc,2513 .rcpc,
2514 .sha2,
2427 .ssbs,2515 .ssbs,
2428 .v8_2a,2516 .v8_2a,
2429 }),2517 }),
...@@ -2432,14 +2520,45 @@ pub const cpu = struct {...@@ -2432,14 +2520,45 @@ pub const cpu = struct {
2432 .name = "cortex_a78",2520 .name = "cortex_a78",
2433 .llvm_name = "cortex-a78",2521 .llvm_name = "cortex-a78",
2434 .features = featureSet(&[_]Feature{2522 .features = featureSet(&[_]Feature{
2435 .a78,2523 .addr_lsl_slow_14,
2436 .crypto,2524 .aes,
2525 .alu_lsl_fast,
2526 .cmp_bcc_fusion,
2527 .dotprod,
2528 .enable_select_opt,
2529 .fullfp16,
2530 .fuse_adrp_add,
2531 .fuse_aes,
2532 .perfmon,
2533 .predictable_select_expensive,
2534 .rcpc,
2535 .sha2,
2536 .spe,
2537 .ssbs,
2538 .use_postra_scheduler,
2539 .v8_2a,
2540 }),
2541 };
2542 pub const cortex_a78ae = CpuModel{
2543 .name = "cortex_a78ae",
2544 .llvm_name = "cortex-a78ae",
2545 .features = featureSet(&[_]Feature{
2546 .addr_lsl_slow_14,
2547 .aes,
2548 .alu_lsl_fast,
2549 .cmp_bcc_fusion,
2437 .dotprod,2550 .dotprod,
2551 .enable_select_opt,
2438 .fullfp16,2552 .fullfp16,
2553 .fuse_adrp_add,
2554 .fuse_aes,
2439 .perfmon,2555 .perfmon,
2556 .predictable_select_expensive,
2440 .rcpc,2557 .rcpc,
2558 .sha2,
2441 .spe,2559 .spe,
2442 .ssbs,2560 .ssbs,
2561 .use_postra_scheduler,
2443 .v8_2a,2562 .v8_2a,
2444 }),2563 }),
2445 };2564 };
...@@ -2447,16 +2566,24 @@ pub const cpu = struct {...@@ -2447,16 +2566,24 @@ pub const cpu = struct {
2447 .name = "cortex_a78c",2566 .name = "cortex_a78c",
2448 .llvm_name = "cortex-a78c",2567 .llvm_name = "cortex-a78c",
2449 .features = featureSet(&[_]Feature{2568 .features = featureSet(&[_]Feature{
2450 .a78c,2569 .addr_lsl_slow_14,
2451 .crypto,2570 .aes,
2571 .alu_lsl_fast,
2572 .cmp_bcc_fusion,
2452 .dotprod,2573 .dotprod,
2574 .enable_select_opt,
2453 .flagm,2575 .flagm,
2454 .fullfp16,2576 .fullfp16,
2577 .fuse_adrp_add,
2578 .fuse_aes,
2455 .pauth,2579 .pauth,
2456 .perfmon,2580 .perfmon,
2581 .predictable_select_expensive,
2457 .rcpc,2582 .rcpc,
2583 .sha2,
2458 .spe,2584 .spe,
2459 .ssbs,2585 .ssbs,
2586 .use_postra_scheduler,
2460 .v8_2a,2587 .v8_2a,
2461 }),2588 }),
2462 };2589 };
...@@ -2464,12 +2591,35 @@ pub const cpu = struct {...@@ -2464,12 +2591,35 @@ pub const cpu = struct {
2464 .name = "cortex_r82",2591 .name = "cortex_r82",
2465 .llvm_name = "cortex-r82",2592 .llvm_name = "cortex-r82",
2466 .features = featureSet(&[_]Feature{2593 .features = featureSet(&[_]Feature{
2467 .cortex_r82,2594 .ccdp,
2595 .complxnum,
2596 .dotprod,
2468 .fp16fml,2597 .fp16fml,
2598 .jsconv,
2469 .perfmon,2599 .perfmon,
2470 .predres,2600 .predres,
2601 .rdm,
2471 .sb,2602 .sb,
2472 .ssbs,2603 .ssbs,
2604 .use_postra_scheduler,
2605 .v8r,
2606 }),
2607 };
2608 pub const cortex_r82ae = CpuModel{
2609 .name = "cortex_r82ae",
2610 .llvm_name = "cortex-r82ae",
2611 .features = featureSet(&[_]Feature{
2612 .ccdp,
2613 .complxnum,
2614 .dotprod,
2615 .fp16fml,
2616 .jsconv,
2617 .perfmon,
2618 .predres,
2619 .rdm,
2620 .sb,
2621 .ssbs,
2622 .use_postra_scheduler,
2473 .v8r,2623 .v8r,
2474 }),2624 }),
2475 };2625 };
...@@ -2477,10 +2627,10 @@ pub const cpu = struct {...@@ -2477,10 +2627,10 @@ pub const cpu = struct {
2477 .name = "cortex_x1",2627 .name = "cortex_x1",
2478 .llvm_name = "cortex-x1",2628 .llvm_name = "cortex-x1",
2479 .features = featureSet(&[_]Feature{2629 .features = featureSet(&[_]Feature{
2480 .addr_lsl_fast,2630 .addr_lsl_slow_14,
2631 .aes,
2481 .alu_lsl_fast,2632 .alu_lsl_fast,
2482 .cmp_bcc_fusion,2633 .cmp_bcc_fusion,
2483 .crypto,
2484 .dotprod,2634 .dotprod,
2485 .enable_select_opt,2635 .enable_select_opt,
2486 .fullfp16,2636 .fullfp16,
...@@ -2489,6 +2639,7 @@ pub const cpu = struct {...@@ -2489,6 +2639,7 @@ pub const cpu = struct {
2489 .perfmon,2639 .perfmon,
2490 .predictable_select_expensive,2640 .predictable_select_expensive,
2491 .rcpc,2641 .rcpc,
2642 .sha2,
2492 .spe,2643 .spe,
2493 .ssbs,2644 .ssbs,
2494 .use_postra_scheduler,2645 .use_postra_scheduler,
...@@ -2499,10 +2650,10 @@ pub const cpu = struct {...@@ -2499,10 +2650,10 @@ pub const cpu = struct {
2499 .name = "cortex_x1c",2650 .name = "cortex_x1c",
2500 .llvm_name = "cortex-x1c",2651 .llvm_name = "cortex-x1c",
2501 .features = featureSet(&[_]Feature{2652 .features = featureSet(&[_]Feature{
2502 .addr_lsl_fast,2653 .addr_lsl_slow_14,
2654 .aes,
2503 .alu_lsl_fast,2655 .alu_lsl_fast,
2504 .cmp_bcc_fusion,2656 .cmp_bcc_fusion,
2505 .crypto,
2506 .dotprod,2657 .dotprod,
2507 .enable_select_opt,2658 .enable_select_opt,
2508 .flagm,2659 .flagm,
...@@ -2514,6 +2665,7 @@ pub const cpu = struct {...@@ -2514,6 +2665,7 @@ pub const cpu = struct {
2514 .perfmon,2665 .perfmon,
2515 .predictable_select_expensive,2666 .predictable_select_expensive,
2516 .rcpc_immo,2667 .rcpc_immo,
2668 .sha2,
2517 .spe,2669 .spe,
2518 .ssbs,2670 .ssbs,
2519 .use_postra_scheduler,2671 .use_postra_scheduler,
...@@ -2524,9 +2676,9 @@ pub const cpu = struct {...@@ -2524,9 +2676,9 @@ pub const cpu = struct {
2524 .name = "cortex_x2",2676 .name = "cortex_x2",
2525 .llvm_name = "cortex-x2",2677 .llvm_name = "cortex-x2",
2526 .features = featureSet(&[_]Feature{2678 .features = featureSet(&[_]Feature{
2527 .addr_lsl_fast,
2528 .alu_lsl_fast,2679 .alu_lsl_fast,
2529 .bf16,2680 .bf16,
2681 .ccidx,
2530 .cmp_bcc_fusion,2682 .cmp_bcc_fusion,
2531 .enable_select_opt,2683 .enable_select_opt,
2532 .ete,2684 .ete,
...@@ -2537,6 +2689,7 @@ pub const cpu = struct {...@@ -2537,6 +2689,7 @@ pub const cpu = struct {
2537 .mte,2689 .mte,
2538 .perfmon,2690 .perfmon,
2539 .predictable_select_expensive,2691 .predictable_select_expensive,
2692 .ssbs,
2540 .sve2_bitperm,2693 .sve2_bitperm,
2541 .use_postra_scheduler,2694 .use_postra_scheduler,
2542 .v9a,2695 .v9a,
...@@ -2546,9 +2699,9 @@ pub const cpu = struct {...@@ -2546,9 +2699,9 @@ pub const cpu = struct {
2546 .name = "cortex_x3",2699 .name = "cortex_x3",
2547 .llvm_name = "cortex-x3",2700 .llvm_name = "cortex-x3",
2548 .features = featureSet(&[_]Feature{2701 .features = featureSet(&[_]Feature{
2549 .addr_lsl_fast,
2550 .alu_lsl_fast,2702 .alu_lsl_fast,
2551 .bf16,2703 .bf16,
2704 .ccidx,
2552 .enable_select_opt,2705 .enable_select_opt,
2553 .ete,2706 .ete,
2554 .fp16fml,2707 .fp16fml,
...@@ -2559,6 +2712,7 @@ pub const cpu = struct {...@@ -2559,6 +2712,7 @@ pub const cpu = struct {
2559 .perfmon,2712 .perfmon,
2560 .predictable_select_expensive,2713 .predictable_select_expensive,
2561 .spe,2714 .spe,
2715 .ssbs,
2562 .sve2_bitperm,2716 .sve2_bitperm,
2563 .use_postra_scheduler,2717 .use_postra_scheduler,
2564 .v9a,2718 .v9a,
...@@ -2568,8 +2722,30 @@ pub const cpu = struct {...@@ -2568,8 +2722,30 @@ pub const cpu = struct {
2568 .name = "cortex_x4",2722 .name = "cortex_x4",
2569 .llvm_name = "cortex-x4",2723 .llvm_name = "cortex-x4",
2570 .features = featureSet(&[_]Feature{2724 .features = featureSet(&[_]Feature{
2571 .addr_lsl_fast,
2572 .alu_lsl_fast,2725 .alu_lsl_fast,
2726 .ccidx,
2727 .enable_select_opt,
2728 .ete,
2729 .fp16fml,
2730 .fuse_adrp_add,
2731 .fuse_aes,
2732 .mte,
2733 .perfmon,
2734 .predictable_select_expensive,
2735 .spe,
2736 .spe_eef,
2737 .ssbs,
2738 .sve2_bitperm,
2739 .use_postra_scheduler,
2740 .v9_2a,
2741 }),
2742 };
2743 pub const cortex_x925 = CpuModel{
2744 .name = "cortex_x925",
2745 .llvm_name = "cortex-x925",
2746 .features = featureSet(&[_]Feature{
2747 .alu_lsl_fast,
2748 .ccidx,
2573 .enable_select_opt,2749 .enable_select_opt,
2574 .ete,2750 .ete,
2575 .fp16fml,2751 .fp16fml,
...@@ -2580,6 +2756,7 @@ pub const cpu = struct {...@@ -2580,6 +2756,7 @@ pub const cpu = struct {
2580 .predictable_select_expensive,2756 .predictable_select_expensive,
2581 .spe,2757 .spe,
2582 .spe_eef,2758 .spe_eef,
2759 .ssbs,
2583 .sve2_bitperm,2760 .sve2_bitperm,
2584 .use_postra_scheduler,2761 .use_postra_scheduler,
2585 .v9_2a,2762 .v9_2a,
...@@ -2589,14 +2766,15 @@ pub const cpu = struct {...@@ -2589,14 +2766,15 @@ pub const cpu = struct {
2589 .name = "cyclone",2766 .name = "cyclone",
2590 .llvm_name = "cyclone",2767 .llvm_name = "cyclone",
2591 .features = featureSet(&[_]Feature{2768 .features = featureSet(&[_]Feature{
2769 .aes,
2592 .alternate_sextload_cvt_f32_pattern,2770 .alternate_sextload_cvt_f32_pattern,
2593 .arith_bcc_fusion,2771 .arith_bcc_fusion,
2594 .arith_cbz_fusion,2772 .arith_cbz_fusion,
2595 .crypto,
2596 .disable_latency_sched_heuristic,2773 .disable_latency_sched_heuristic,
2597 .fuse_aes,2774 .fuse_aes,
2598 .fuse_crypto_eor,2775 .fuse_crypto_eor,
2599 .perfmon,2776 .perfmon,
2777 .sha2,
2600 .store_pair_suppress,2778 .store_pair_suppress,
2601 .v8a,2779 .v8a,
2602 .zcm,2780 .zcm,
...@@ -2651,10 +2829,9 @@ pub const cpu = struct {...@@ -2651,10 +2829,9 @@ pub const cpu = struct {
2651 .name = "exynos_m3",2829 .name = "exynos_m3",
2652 .llvm_name = "exynos-m3",2830 .llvm_name = "exynos-m3",
2653 .features = featureSet(&[_]Feature{2831 .features = featureSet(&[_]Feature{
2654 .addr_lsl_fast,2832 .aes,
2655 .alu_lsl_fast,2833 .alu_lsl_fast,
2656 .crc,2834 .crc,
2657 .crypto,
2658 .exynos_cheap_as_move,2835 .exynos_cheap_as_move,
2659 .force_32bit_jump_tables,2836 .force_32bit_jump_tables,
2660 .fuse_address,2837 .fuse_address,
...@@ -2664,6 +2841,7 @@ pub const cpu = struct {...@@ -2664,6 +2841,7 @@ pub const cpu = struct {
2664 .fuse_literals,2841 .fuse_literals,
2665 .perfmon,2842 .perfmon,
2666 .predictable_select_expensive,2843 .predictable_select_expensive,
2844 .sha2,
2667 .store_pair_suppress,2845 .store_pair_suppress,
2668 .use_postra_scheduler,2846 .use_postra_scheduler,
2669 .v8a,2847 .v8a,
...@@ -2673,11 +2851,10 @@ pub const cpu = struct {...@@ -2673,11 +2851,10 @@ pub const cpu = struct {
2673 .name = "exynos_m4",2851 .name = "exynos_m4",
2674 .llvm_name = "exynos-m4",2852 .llvm_name = "exynos-m4",
2675 .features = featureSet(&[_]Feature{2853 .features = featureSet(&[_]Feature{
2676 .addr_lsl_fast,2854 .aes,
2677 .alu_lsl_fast,2855 .alu_lsl_fast,
2678 .arith_bcc_fusion,2856 .arith_bcc_fusion,
2679 .arith_cbz_fusion,2857 .arith_cbz_fusion,
2680 .crypto,
2681 .dotprod,2858 .dotprod,
2682 .exynos_cheap_as_move,2859 .exynos_cheap_as_move,
2683 .force_32bit_jump_tables,2860 .force_32bit_jump_tables,
...@@ -2689,6 +2866,7 @@ pub const cpu = struct {...@@ -2689,6 +2866,7 @@ pub const cpu = struct {
2689 .fuse_csel,2866 .fuse_csel,
2690 .fuse_literals,2867 .fuse_literals,
2691 .perfmon,2868 .perfmon,
2869 .sha2,
2692 .store_pair_suppress,2870 .store_pair_suppress,
2693 .use_postra_scheduler,2871 .use_postra_scheduler,
2694 .v8_2a,2872 .v8_2a,
...@@ -2699,11 +2877,10 @@ pub const cpu = struct {...@@ -2699,11 +2877,10 @@ pub const cpu = struct {
2699 .name = "exynos_m5",2877 .name = "exynos_m5",
2700 .llvm_name = "exynos-m5",2878 .llvm_name = "exynos-m5",
2701 .features = featureSet(&[_]Feature{2879 .features = featureSet(&[_]Feature{
2702 .addr_lsl_fast,2880 .aes,
2703 .alu_lsl_fast,2881 .alu_lsl_fast,
2704 .arith_bcc_fusion,2882 .arith_bcc_fusion,
2705 .arith_cbz_fusion,2883 .arith_cbz_fusion,
2706 .crypto,
2707 .dotprod,2884 .dotprod,
2708 .exynos_cheap_as_move,2885 .exynos_cheap_as_move,
2709 .force_32bit_jump_tables,2886 .force_32bit_jump_tables,
...@@ -2715,6 +2892,7 @@ pub const cpu = struct {...@@ -2715,6 +2892,7 @@ pub const cpu = struct {
2715 .fuse_csel,2892 .fuse_csel,
2716 .fuse_literals,2893 .fuse_literals,
2717 .perfmon,2894 .perfmon,
2895 .sha2,
2718 .store_pair_suppress,2896 .store_pair_suppress,
2719 .use_postra_scheduler,2897 .use_postra_scheduler,
2720 .v8_2a,2898 .v8_2a,
...@@ -2725,13 +2903,13 @@ pub const cpu = struct {...@@ -2725,13 +2903,13 @@ pub const cpu = struct {
2725 .name = "falkor",2903 .name = "falkor",
2726 .llvm_name = "falkor",2904 .llvm_name = "falkor",
2727 .features = featureSet(&[_]Feature{2905 .features = featureSet(&[_]Feature{
2728 .addr_lsl_fast,2906 .aes,
2729 .alu_lsl_fast,2907 .alu_lsl_fast,
2730 .crc,2908 .crc,
2731 .crypto,
2732 .perfmon,2909 .perfmon,
2733 .predictable_select_expensive,2910 .predictable_select_expensive,
2734 .rdm,2911 .rdm,
2912 .sha2,
2735 .slow_strqro_store,2913 .slow_strqro_store,
2736 .store_pair_suppress,2914 .store_pair_suppress,
2737 .use_postra_scheduler,2915 .use_postra_scheduler,
...@@ -2751,16 +2929,42 @@ pub const cpu = struct {...@@ -2751,16 +2929,42 @@ pub const cpu = struct {
2751 .use_postra_scheduler,2929 .use_postra_scheduler,
2752 }),2930 }),
2753 };2931 };
2932 pub const grace = CpuModel{
2933 .name = "grace",
2934 .llvm_name = "grace",
2935 .features = featureSet(&[_]Feature{
2936 .alu_lsl_fast,
2937 .bf16,
2938 .ccidx,
2939 .cmp_bcc_fusion,
2940 .enable_select_opt,
2941 .ete,
2942 .fp16fml,
2943 .fuse_adrp_add,
2944 .fuse_aes,
2945 .i8mm,
2946 .mte,
2947 .perfmon,
2948 .predictable_select_expensive,
2949 .rand,
2950 .spe,
2951 .ssbs,
2952 .sve2_bitperm,
2953 .use_fixed_over_scalable_if_equal_cost,
2954 .use_postra_scheduler,
2955 .v9a,
2956 }),
2957 };
2754 pub const kryo = CpuModel{2958 pub const kryo = CpuModel{
2755 .name = "kryo",2959 .name = "kryo",
2756 .llvm_name = "kryo",2960 .llvm_name = "kryo",
2757 .features = featureSet(&[_]Feature{2961 .features = featureSet(&[_]Feature{
2758 .addr_lsl_fast,2962 .aes,
2759 .alu_lsl_fast,2963 .alu_lsl_fast,
2760 .crc,2964 .crc,
2761 .crypto,
2762 .perfmon,2965 .perfmon,
2763 .predictable_select_expensive,2966 .predictable_select_expensive,
2967 .sha2,
2764 .store_pair_suppress,2968 .store_pair_suppress,
2765 .use_postra_scheduler,2969 .use_postra_scheduler,
2766 .v8a,2970 .v8a,
...@@ -2771,11 +2975,11 @@ pub const cpu = struct {...@@ -2771,11 +2975,11 @@ pub const cpu = struct {
2771 .name = "neoverse_512tvb",2975 .name = "neoverse_512tvb",
2772 .llvm_name = "neoverse-512tvb",2976 .llvm_name = "neoverse-512tvb",
2773 .features = featureSet(&[_]Feature{2977 .features = featureSet(&[_]Feature{
2774 .addr_lsl_fast,2978 .aes,
2775 .alu_lsl_fast,2979 .alu_lsl_fast,
2776 .bf16,2980 .bf16,
2777 .ccdp,2981 .ccdp,
2778 .crypto,2982 .ccidx,
2779 .enable_select_opt,2983 .enable_select_opt,
2780 .fp16fml,2984 .fp16fml,
2781 .fuse_adrp_add,2985 .fuse_adrp_add,
...@@ -2784,6 +2988,8 @@ pub const cpu = struct {...@@ -2784,6 +2988,8 @@ pub const cpu = struct {
2784 .perfmon,2988 .perfmon,
2785 .predictable_select_expensive,2989 .predictable_select_expensive,
2786 .rand,2990 .rand,
2991 .sha3,
2992 .sm4,
2787 .spe,2993 .spe,
2788 .ssbs,2994 .ssbs,
2789 .sve,2995 .sve,
...@@ -2795,13 +3001,14 @@ pub const cpu = struct {...@@ -2795,13 +3001,14 @@ pub const cpu = struct {
2795 .name = "neoverse_e1",3001 .name = "neoverse_e1",
2796 .llvm_name = "neoverse-e1",3002 .llvm_name = "neoverse-e1",
2797 .features = featureSet(&[_]Feature{3003 .features = featureSet(&[_]Feature{
2798 .crypto,3004 .aes,
2799 .dotprod,3005 .dotprod,
2800 .fullfp16,3006 .fullfp16,
2801 .fuse_adrp_add,3007 .fuse_adrp_add,
2802 .fuse_aes,3008 .fuse_aes,
2803 .perfmon,3009 .perfmon,
2804 .rcpc,3010 .rcpc,
3011 .sha2,
2805 .ssbs,3012 .ssbs,
2806 .use_postra_scheduler,3013 .use_postra_scheduler,
2807 .v8_2a,3014 .v8_2a,
...@@ -2811,9 +3018,9 @@ pub const cpu = struct {...@@ -2811,9 +3018,9 @@ pub const cpu = struct {
2811 .name = "neoverse_n1",3018 .name = "neoverse_n1",
2812 .llvm_name = "neoverse-n1",3019 .llvm_name = "neoverse-n1",
2813 .features = featureSet(&[_]Feature{3020 .features = featureSet(&[_]Feature{
2814 .addr_lsl_fast,3021 .addr_lsl_slow_14,
3022 .aes,
2815 .alu_lsl_fast,3023 .alu_lsl_fast,
2816 .crypto,
2817 .dotprod,3024 .dotprod,
2818 .enable_select_opt,3025 .enable_select_opt,
2819 .fullfp16,3026 .fullfp16,
...@@ -2822,6 +3029,7 @@ pub const cpu = struct {...@@ -2822,6 +3029,7 @@ pub const cpu = struct {
2822 .perfmon,3029 .perfmon,
2823 .predictable_select_expensive,3030 .predictable_select_expensive,
2824 .rcpc,3031 .rcpc,
3032 .sha2,
2825 .spe,3033 .spe,
2826 .ssbs,3034 .ssbs,
2827 .use_postra_scheduler,3035 .use_postra_scheduler,
...@@ -2832,31 +3040,57 @@ pub const cpu = struct {...@@ -2832,31 +3040,57 @@ pub const cpu = struct {
2832 .name = "neoverse_n2",3040 .name = "neoverse_n2",
2833 .llvm_name = "neoverse-n2",3041 .llvm_name = "neoverse-n2",
2834 .features = featureSet(&[_]Feature{3042 .features = featureSet(&[_]Feature{
2835 .addr_lsl_fast,
2836 .alu_lsl_fast,3043 .alu_lsl_fast,
2837 .bf16,3044 .bf16,
3045 .ccidx,
2838 .enable_select_opt,3046 .enable_select_opt,
2839 .ete,3047 .ete,
3048 .fp16fml,
2840 .fuse_adrp_add,3049 .fuse_adrp_add,
2841 .fuse_aes,3050 .fuse_aes,
2842 .i8mm,3051 .i8mm,
2843 .mte,3052 .mte,
2844 .perfmon,3053 .perfmon,
2845 .predictable_select_expensive,3054 .predictable_select_expensive,
3055 .ssbs,
2846 .sve2_bitperm,3056 .sve2_bitperm,
2847 .use_postra_scheduler,3057 .use_postra_scheduler,
2848 .v9a,3058 .v9a,
2849 }),3059 }),
2850 };3060 };
3061 pub const neoverse_n3 = CpuModel{
3062 .name = "neoverse_n3",
3063 .llvm_name = "neoverse-n3",
3064 .features = featureSet(&[_]Feature{
3065 .alu_lsl_fast,
3066 .ccidx,
3067 .enable_select_opt,
3068 .ete,
3069 .fp16fml,
3070 .fuse_adrp_add,
3071 .fuse_aes,
3072 .mte,
3073 .perfmon,
3074 .predictable_select_expensive,
3075 .rand,
3076 .spe,
3077 .spe_eef,
3078 .ssbs,
3079 .sve2_bitperm,
3080 .use_postra_scheduler,
3081 .v9_2a,
3082 }),
3083 };
2851 pub const neoverse_v1 = CpuModel{3084 pub const neoverse_v1 = CpuModel{
2852 .name = "neoverse_v1",3085 .name = "neoverse_v1",
2853 .llvm_name = "neoverse-v1",3086 .llvm_name = "neoverse-v1",
2854 .features = featureSet(&[_]Feature{3087 .features = featureSet(&[_]Feature{
2855 .addr_lsl_fast,3088 .addr_lsl_slow_14,
3089 .aes,
2856 .alu_lsl_fast,3090 .alu_lsl_fast,
2857 .bf16,3091 .bf16,
2858 .ccdp,3092 .ccdp,
2859 .crypto,3093 .ccidx,
2860 .enable_select_opt,3094 .enable_select_opt,
2861 .fp16fml,3095 .fp16fml,
2862 .fuse_adrp_add,3096 .fuse_adrp_add,
...@@ -2866,6 +3100,8 @@ pub const cpu = struct {...@@ -2866,6 +3100,8 @@ pub const cpu = struct {
2866 .perfmon,3100 .perfmon,
2867 .predictable_select_expensive,3101 .predictable_select_expensive,
2868 .rand,3102 .rand,
3103 .sha3,
3104 .sm4,
2869 .spe,3105 .spe,
2870 .ssbs,3106 .ssbs,
2871 .sve,3107 .sve,
...@@ -2877,9 +3113,10 @@ pub const cpu = struct {...@@ -2877,9 +3113,10 @@ pub const cpu = struct {
2877 .name = "neoverse_v2",3113 .name = "neoverse_v2",
2878 .llvm_name = "neoverse-v2",3114 .llvm_name = "neoverse-v2",
2879 .features = featureSet(&[_]Feature{3115 .features = featureSet(&[_]Feature{
2880 .addr_lsl_fast,
2881 .alu_lsl_fast,3116 .alu_lsl_fast,
2882 .bf16,3117 .bf16,
3118 .ccidx,
3119 .cmp_bcc_fusion,
2883 .enable_select_opt,3120 .enable_select_opt,
2884 .ete,3121 .ete,
2885 .fp16fml,3122 .fp16fml,
...@@ -2891,20 +3128,97 @@ pub const cpu = struct {...@@ -2891,20 +3128,97 @@ pub const cpu = struct {
2891 .predictable_select_expensive,3128 .predictable_select_expensive,
2892 .rand,3129 .rand,
2893 .spe,3130 .spe,
3131 .ssbs,
2894 .sve2_bitperm,3132 .sve2_bitperm,
3133 .use_fixed_over_scalable_if_equal_cost,
2895 .use_postra_scheduler,3134 .use_postra_scheduler,
2896 .v9a,3135 .v9a,
2897 }),3136 }),
2898 };3137 };
3138 pub const neoverse_v3 = CpuModel{
3139 .name = "neoverse_v3",
3140 .llvm_name = "neoverse-v3",
3141 .features = featureSet(&[_]Feature{
3142 .alu_lsl_fast,
3143 .brbe,
3144 .ccidx,
3145 .enable_select_opt,
3146 .ete,
3147 .fp16fml,
3148 .fuse_adrp_add,
3149 .fuse_aes,
3150 .ls64,
3151 .mte,
3152 .perfmon,
3153 .predictable_select_expensive,
3154 .rand,
3155 .rme,
3156 .spe,
3157 .spe_eef,
3158 .ssbs,
3159 .sve2_bitperm,
3160 .use_postra_scheduler,
3161 .v9_2a,
3162 }),
3163 };
3164 pub const neoverse_v3ae = CpuModel{
3165 .name = "neoverse_v3ae",
3166 .llvm_name = "neoverse-v3ae",
3167 .features = featureSet(&[_]Feature{
3168 .alu_lsl_fast,
3169 .brbe,
3170 .ccidx,
3171 .enable_select_opt,
3172 .ete,
3173 .fp16fml,
3174 .fuse_adrp_add,
3175 .fuse_aes,
3176 .ls64,
3177 .mte,
3178 .perfmon,
3179 .predictable_select_expensive,
3180 .rand,
3181 .rme,
3182 .spe,
3183 .spe_eef,
3184 .ssbs,
3185 .sve2_bitperm,
3186 .use_postra_scheduler,
3187 .v9_2a,
3188 }),
3189 };
3190 pub const oryon_1 = CpuModel{
3191 .name = "oryon_1",
3192 .llvm_name = "oryon-1",
3193 .features = featureSet(&[_]Feature{
3194 .aes,
3195 .ccidx,
3196 .enable_select_opt,
3197 .fp16fml,
3198 .fuse_address,
3199 .fuse_adrp_add,
3200 .fuse_aes,
3201 .fuse_crypto_eor,
3202 .perfmon,
3203 .rand,
3204 .sha3,
3205 .sm4,
3206 .spe,
3207 .ssbs,
3208 .use_postra_scheduler,
3209 .v8_6a,
3210 }),
3211 };
2899 pub const saphira = CpuModel{3212 pub const saphira = CpuModel{
2900 .name = "saphira",3213 .name = "saphira",
2901 .llvm_name = "saphira",3214 .llvm_name = "saphira",
2902 .features = featureSet(&[_]Feature{3215 .features = featureSet(&[_]Feature{
2903 .addr_lsl_fast,3216 .aes,
2904 .alu_lsl_fast,3217 .alu_lsl_fast,
2905 .crypto,3218 .ccidx,
2906 .perfmon,3219 .perfmon,
2907 .predictable_select_expensive,3220 .predictable_select_expensive,
3221 .sha2,
2908 .spe,3222 .spe,
2909 .store_pair_suppress,3223 .store_pair_suppress,
2910 .use_postra_scheduler,3224 .use_postra_scheduler,
...@@ -2916,10 +3230,11 @@ pub const cpu = struct {...@@ -2916,10 +3230,11 @@ pub const cpu = struct {
2916 .name = "thunderx",3230 .name = "thunderx",
2917 .llvm_name = "thunderx",3231 .llvm_name = "thunderx",
2918 .features = featureSet(&[_]Feature{3232 .features = featureSet(&[_]Feature{
3233 .aes,
2919 .crc,3234 .crc,
2920 .crypto,
2921 .perfmon,3235 .perfmon,
2922 .predictable_select_expensive,3236 .predictable_select_expensive,
3237 .sha2,
2923 .store_pair_suppress,3238 .store_pair_suppress,
2924 .use_postra_scheduler,3239 .use_postra_scheduler,
2925 .v8a,3240 .v8a,
...@@ -2929,10 +3244,11 @@ pub const cpu = struct {...@@ -2929,10 +3244,11 @@ pub const cpu = struct {
2929 .name = "thunderx2t99",3244 .name = "thunderx2t99",
2930 .llvm_name = "thunderx2t99",3245 .llvm_name = "thunderx2t99",
2931 .features = featureSet(&[_]Feature{3246 .features = featureSet(&[_]Feature{
3247 .aes,
2932 .aggressive_fma,3248 .aggressive_fma,
2933 .arith_bcc_fusion,3249 .arith_bcc_fusion,
2934 .crypto,
2935 .predictable_select_expensive,3250 .predictable_select_expensive,
3251 .sha2,
2936 .store_pair_suppress,3252 .store_pair_suppress,
2937 .use_postra_scheduler,3253 .use_postra_scheduler,
2938 .v8_1a,3254 .v8_1a,
...@@ -2942,12 +3258,14 @@ pub const cpu = struct {...@@ -2942,12 +3258,14 @@ pub const cpu = struct {
2942 .name = "thunderx3t110",3258 .name = "thunderx3t110",
2943 .llvm_name = "thunderx3t110",3259 .llvm_name = "thunderx3t110",
2944 .features = featureSet(&[_]Feature{3260 .features = featureSet(&[_]Feature{
3261 .aes,
2945 .aggressive_fma,3262 .aggressive_fma,
2946 .arith_bcc_fusion,3263 .arith_bcc_fusion,
2947 .balance_fp_ops,3264 .balance_fp_ops,
2948 .crypto,3265 .ccidx,
2949 .perfmon,3266 .perfmon,
2950 .predictable_select_expensive,3267 .predictable_select_expensive,
3268 .sha2,
2951 .store_pair_suppress,3269 .store_pair_suppress,
2952 .strict_align,3270 .strict_align,
2953 .use_postra_scheduler,3271 .use_postra_scheduler,
...@@ -2958,10 +3276,11 @@ pub const cpu = struct {...@@ -2958,10 +3276,11 @@ pub const cpu = struct {
2958 .name = "thunderxt81",3276 .name = "thunderxt81",
2959 .llvm_name = "thunderxt81",3277 .llvm_name = "thunderxt81",
2960 .features = featureSet(&[_]Feature{3278 .features = featureSet(&[_]Feature{
3279 .aes,
2961 .crc,3280 .crc,
2962 .crypto,
2963 .perfmon,3281 .perfmon,
2964 .predictable_select_expensive,3282 .predictable_select_expensive,
3283 .sha2,
2965 .store_pair_suppress,3284 .store_pair_suppress,
2966 .use_postra_scheduler,3285 .use_postra_scheduler,
2967 .v8a,3286 .v8a,
...@@ -2971,10 +3290,11 @@ pub const cpu = struct {...@@ -2971,10 +3290,11 @@ pub const cpu = struct {
2971 .name = "thunderxt83",3290 .name = "thunderxt83",
2972 .llvm_name = "thunderxt83",3291 .llvm_name = "thunderxt83",
2973 .features = featureSet(&[_]Feature{3292 .features = featureSet(&[_]Feature{
3293 .aes,
2974 .crc,3294 .crc,
2975 .crypto,
2976 .perfmon,3295 .perfmon,
2977 .predictable_select_expensive,3296 .predictable_select_expensive,
3297 .sha2,
2978 .store_pair_suppress,3298 .store_pair_suppress,
2979 .use_postra_scheduler,3299 .use_postra_scheduler,
2980 .v8a,3300 .v8a,
...@@ -2984,10 +3304,11 @@ pub const cpu = struct {...@@ -2984,10 +3304,11 @@ pub const cpu = struct {
2984 .name = "thunderxt88",3304 .name = "thunderxt88",
2985 .llvm_name = "thunderxt88",3305 .llvm_name = "thunderxt88",
2986 .features = featureSet(&[_]Feature{3306 .features = featureSet(&[_]Feature{
3307 .aes,
2987 .crc,3308 .crc,
2988 .crypto,
2989 .perfmon,3309 .perfmon,
2990 .predictable_select_expensive,3310 .predictable_select_expensive,
3311 .sha2,
2991 .store_pair_suppress,3312 .store_pair_suppress,
2992 .use_postra_scheduler,3313 .use_postra_scheduler,
2993 .v8a,3314 .v8a,
...@@ -2997,13 +3318,14 @@ pub const cpu = struct {...@@ -2997,13 +3318,14 @@ pub const cpu = struct {
2997 .name = "tsv110",3318 .name = "tsv110",
2998 .llvm_name = "tsv110",3319 .llvm_name = "tsv110",
2999 .features = featureSet(&[_]Feature{3320 .features = featureSet(&[_]Feature{
3321 .aes,
3000 .complxnum,3322 .complxnum,
3001 .crypto,
3002 .dotprod,3323 .dotprod,
3003 .fp16fml,3324 .fp16fml,
3004 .fuse_aes,3325 .fuse_aes,
3005 .jsconv,3326 .jsconv,
3006 .perfmon,3327 .perfmon,
3328 .sha2,
3007 .spe,3329 .spe,
3008 .store_pair_suppress,3330 .store_pair_suppress,
3009 .use_postra_scheduler,3331 .use_postra_scheduler,
lib/std/Target/amdgpu.zig+325-30
...@@ -8,16 +8,23 @@ pub const Feature = enum {...@@ -8,16 +8,23 @@ pub const Feature = enum {
8 @"16_bit_insts",8 @"16_bit_insts",
9 a16,9 a16,
10 add_no_carry_insts,10 add_no_carry_insts,
11 agent_scope_fine_grained_remote_memory_atomics,
12 allocate1_5xvgprs,
11 aperture_regs,13 aperture_regs,
12 architected_flat_scratch,14 architected_flat_scratch,
13 architected_sgprs,15 architected_sgprs,
14 atomic_buffer_global_pk_add_f16_insts,16 atomic_buffer_global_pk_add_f16_insts,
15 atomic_buffer_global_pk_add_f16_no_rtn_insts,17 atomic_buffer_global_pk_add_f16_no_rtn_insts,
18 atomic_buffer_pk_add_bf16_inst,
16 atomic_csub_no_rtn_insts,19 atomic_csub_no_rtn_insts,
17 atomic_ds_pk_add_16_insts,20 atomic_ds_pk_add_16_insts,
18 atomic_fadd_no_rtn_insts,21 atomic_fadd_no_rtn_insts,
19 atomic_fadd_rtn_insts,22 atomic_fadd_rtn_insts,
20 atomic_flat_pk_add_16_insts,23 atomic_flat_pk_add_16_insts,
24 atomic_fmin_fmax_flat_f32,
25 atomic_fmin_fmax_flat_f64,
26 atomic_fmin_fmax_global_f32,
27 atomic_fmin_fmax_global_f64,
21 atomic_global_pk_add_bf16_inst,28 atomic_global_pk_add_bf16_inst,
22 auto_waitcnt_before_barrier,29 auto_waitcnt_before_barrier,
23 back_off_barrier,30 back_off_barrier,
...@@ -27,6 +34,7 @@ pub const Feature = enum {...@@ -27,6 +34,7 @@ pub const Feature = enum {
27 default_component_zero,34 default_component_zero,
28 dl_insts,35 dl_insts,
29 dot10_insts,36 dot10_insts,
37 dot11_insts,
30 dot1_insts,38 dot1_insts,
31 dot2_insts,39 dot2_insts,
32 dot3_insts,40 dot3_insts,
...@@ -47,6 +55,7 @@ pub const Feature = enum {...@@ -47,6 +55,7 @@ pub const Feature = enum {
47 fast_fmaf,55 fast_fmaf,
48 flat_address_space,56 flat_address_space,
49 flat_atomic_fadd_f32_inst,57 flat_atomic_fadd_f32_inst,
58 flat_buffer_global_fadd_f64_inst,
50 flat_for_global,59 flat_for_global,
51 flat_global_insts,60 flat_global_insts,
52 flat_inst_offsets,61 flat_inst_offsets,
...@@ -71,7 +80,6 @@ pub const Feature = enum {...@@ -71,7 +80,6 @@ pub const Feature = enum {
71 gfx10_b_encoding,80 gfx10_b_encoding,
72 gfx10_insts,81 gfx10_insts,
73 gfx11,82 gfx11,
74 gfx11_full_vgprs,
75 gfx11_insts,83 gfx11_insts,
76 gfx12,84 gfx12,
77 gfx12_insts,85 gfx12_insts,
...@@ -101,9 +109,12 @@ pub const Feature = enum {...@@ -101,9 +109,12 @@ pub const Feature = enum {
101 mad_mac_f32_insts,109 mad_mac_f32_insts,
102 mad_mix_insts,110 mad_mix_insts,
103 mai_insts,111 mai_insts,
112 max_hard_clause_length_32,
113 max_hard_clause_length_63,
104 max_private_element_size_16,114 max_private_element_size_16,
105 max_private_element_size_4,115 max_private_element_size_4,
106 max_private_element_size_8,116 max_private_element_size_8,
117 memory_atomic_fadd_f32_denormal_support,
107 mfma_inline_literal_bug,118 mfma_inline_literal_bug,
108 mimg_r128,119 mimg_r128,
109 movrel,120 movrel,
...@@ -120,11 +131,15 @@ pub const Feature = enum {...@@ -120,11 +131,15 @@ pub const Feature = enum {
120 packed_tid,131 packed_tid,
121 partial_nsa_encoding,132 partial_nsa_encoding,
122 pk_fmac_f16_inst,133 pk_fmac_f16_inst,
134 precise_memory,
135 priv_enabled_trap2_nop_bug,
123 promote_alloca,136 promote_alloca,
124 prt_strict_null,137 prt_strict_null,
125 pseudo_scalar_trans,138 pseudo_scalar_trans,
126 r128_a16,139 r128_a16,
127 real_true16,140 real_true16,
141 required_export_priority,
142 requires_cov6,
128 restricted_soffset,143 restricted_soffset,
129 s_memrealtime,144 s_memrealtime,
130 s_memtime_inst,145 s_memtime_inst,
...@@ -201,6 +216,16 @@ pub const all_features = blk: {...@@ -201,6 +216,16 @@ pub const all_features = blk: {
201 .description = "Have VALU add/sub instructions without carry out",216 .description = "Have VALU add/sub instructions without carry out",
202 .dependencies = featureSet(&[_]Feature{}),217 .dependencies = featureSet(&[_]Feature{}),
203 };218 };
219 result[@intFromEnum(Feature.agent_scope_fine_grained_remote_memory_atomics)] = .{
220 .llvm_name = "agent-scope-fine-grained-remote-memory-atomics",
221 .description = "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.",
222 .dependencies = featureSet(&[_]Feature{}),
223 };
224 result[@intFromEnum(Feature.allocate1_5xvgprs)] = .{
225 .llvm_name = "allocate1_5xvgprs",
226 .description = "Has 50% more physical VGPRs and 50% larger allocation granule",
227 .dependencies = featureSet(&[_]Feature{}),
228 };
204 result[@intFromEnum(Feature.aperture_regs)] = .{229 result[@intFromEnum(Feature.aperture_regs)] = .{
205 .llvm_name = "aperture-regs",230 .llvm_name = "aperture-regs",
206 .description = "Has Memory Aperture Base and Size Registers",231 .description = "Has Memory Aperture Base and Size Registers",
...@@ -230,6 +255,11 @@ pub const all_features = blk: {...@@ -230,6 +255,11 @@ pub const all_features = blk: {
230 .flat_global_insts,255 .flat_global_insts,
231 }),256 }),
232 };257 };
258 result[@intFromEnum(Feature.atomic_buffer_pk_add_bf16_inst)] = .{
259 .llvm_name = "atomic-buffer-pk-add-bf16-inst",
260 .description = "Has buffer_atomic_pk_add_bf16 instruction",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
233 result[@intFromEnum(Feature.atomic_csub_no_rtn_insts)] = .{263 result[@intFromEnum(Feature.atomic_csub_no_rtn_insts)] = .{
234 .llvm_name = "atomic-csub-no-rtn-insts",264 .llvm_name = "atomic-csub-no-rtn-insts",
235 .description = "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value",265 .description = "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value",
...@@ -259,6 +289,26 @@ pub const all_features = blk: {...@@ -259,6 +289,26 @@ pub const all_features = blk: {
259 .description = "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions",289 .description = "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions",
260 .dependencies = featureSet(&[_]Feature{}),290 .dependencies = featureSet(&[_]Feature{}),
261 };291 };
292 result[@intFromEnum(Feature.atomic_fmin_fmax_flat_f32)] = .{
293 .llvm_name = "atomic-fmin-fmax-flat-f32",
294 .description = "Has flat memory instructions for atomicrmw fmin/fmax for float",
295 .dependencies = featureSet(&[_]Feature{}),
296 };
297 result[@intFromEnum(Feature.atomic_fmin_fmax_flat_f64)] = .{
298 .llvm_name = "atomic-fmin-fmax-flat-f64",
299 .description = "Has flat memory instructions for atomicrmw fmin/fmax for double",
300 .dependencies = featureSet(&[_]Feature{}),
301 };
302 result[@intFromEnum(Feature.atomic_fmin_fmax_global_f32)] = .{
303 .llvm_name = "atomic-fmin-fmax-global-f32",
304 .description = "Has global/buffer instructions for atomicrmw fmin/fmax for float",
305 .dependencies = featureSet(&[_]Feature{}),
306 };
307 result[@intFromEnum(Feature.atomic_fmin_fmax_global_f64)] = .{
308 .llvm_name = "atomic-fmin-fmax-global-f64",
309 .description = "Has global/buffer instructions for atomicrmw fmin/fmax for float",
310 .dependencies = featureSet(&[_]Feature{}),
311 };
262 result[@intFromEnum(Feature.atomic_global_pk_add_bf16_inst)] = .{312 result[@intFromEnum(Feature.atomic_global_pk_add_bf16_inst)] = .{
263 .llvm_name = "atomic-global-pk-add-bf16-inst",313 .llvm_name = "atomic-global-pk-add-bf16-inst",
264 .description = "Has global_atomic_pk_add_bf16 instruction",314 .description = "Has global_atomic_pk_add_bf16 instruction",
...@@ -306,6 +356,11 @@ pub const all_features = blk: {...@@ -306,6 +356,11 @@ pub const all_features = blk: {
306 .description = "Has v_dot2_f32_f16 instruction",356 .description = "Has v_dot2_f32_f16 instruction",
307 .dependencies = featureSet(&[_]Feature{}),357 .dependencies = featureSet(&[_]Feature{}),
308 };358 };
359 result[@intFromEnum(Feature.dot11_insts)] = .{
360 .llvm_name = "dot11-insts",
361 .description = "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions",
362 .dependencies = featureSet(&[_]Feature{}),
363 };
309 result[@intFromEnum(Feature.dot1_insts)] = .{364 result[@intFromEnum(Feature.dot1_insts)] = .{
310 .llvm_name = "dot1-insts",365 .llvm_name = "dot1-insts",
311 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",366 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
...@@ -406,6 +461,11 @@ pub const all_features = blk: {...@@ -406,6 +461,11 @@ pub const all_features = blk: {
406 .description = "Has flat_atomic_add_f32 instruction",461 .description = "Has flat_atomic_add_f32 instruction",
407 .dependencies = featureSet(&[_]Feature{}),462 .dependencies = featureSet(&[_]Feature{}),
408 };463 };
464 result[@intFromEnum(Feature.flat_buffer_global_fadd_f64_inst)] = .{
465 .llvm_name = "flat-buffer-global-fadd-f64-inst",
466 .description = "Has flat, buffer, and global instructions for f64 atomic fadd",
467 .dependencies = featureSet(&[_]Feature{}),
468 };
409 result[@intFromEnum(Feature.flat_for_global)] = .{469 result[@intFromEnum(Feature.flat_for_global)] = .{
410 .llvm_name = "flat-for-global",470 .llvm_name = "flat-for-global",
411 .description = "Force to generate flat instruction for global",471 .description = "Force to generate flat instruction for global",
...@@ -504,6 +564,10 @@ pub const all_features = blk: {...@@ -504,6 +564,10 @@ pub const all_features = blk: {
504 .a16,564 .a16,
505 .add_no_carry_insts,565 .add_no_carry_insts,
506 .aperture_regs,566 .aperture_regs,
567 .atomic_fmin_fmax_flat_f32,
568 .atomic_fmin_fmax_flat_f64,
569 .atomic_fmin_fmax_global_f32,
570 .atomic_fmin_fmax_global_f64,
507 .ci_insts,571 .ci_insts,
508 .default_component_zero,572 .default_component_zero,
509 .dpp,573 .dpp,
...@@ -527,6 +591,7 @@ pub const all_features = blk: {...@@ -527,6 +591,7 @@ pub const all_features = blk: {
527 .int_clamp_insts,591 .int_clamp_insts,
528 .inv_2pi_inline_imm,592 .inv_2pi_inline_imm,
529 .localmemorysize65536,593 .localmemorysize65536,
594 .max_hard_clause_length_63,
530 .mimg_r128,595 .mimg_r128,
531 .movrel,596 .movrel,
532 .no_data_dep_hazard,597 .no_data_dep_hazard,
...@@ -573,6 +638,8 @@ pub const all_features = blk: {...@@ -573,6 +638,8 @@ pub const all_features = blk: {
573 .a16,638 .a16,
574 .add_no_carry_insts,639 .add_no_carry_insts,
575 .aperture_regs,640 .aperture_regs,
641 .atomic_fmin_fmax_flat_f32,
642 .atomic_fmin_fmax_global_f32,
576 .ci_insts,643 .ci_insts,
577 .default_component_zero,644 .default_component_zero,
578 .dpp,645 .dpp,
...@@ -599,6 +666,7 @@ pub const all_features = blk: {...@@ -599,6 +666,7 @@ pub const all_features = blk: {
599 .int_clamp_insts,666 .int_clamp_insts,
600 .inv_2pi_inline_imm,667 .inv_2pi_inline_imm,
601 .localmemorysize65536,668 .localmemorysize65536,
669 .max_hard_clause_length_32,
602 .mimg_r128,670 .mimg_r128,
603 .movrel,671 .movrel,
604 .no_data_dep_hazard,672 .no_data_dep_hazard,
...@@ -613,11 +681,6 @@ pub const all_features = blk: {...@@ -613,11 +681,6 @@ pub const all_features = blk: {
613 .vscnt,681 .vscnt,
614 }),682 }),
615 };683 };
616 result[@intFromEnum(Feature.gfx11_full_vgprs)] = .{
617 .llvm_name = "gfx11-full-vgprs",
618 .description = "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10",
619 .dependencies = featureSet(&[_]Feature{}),
620 };
621 result[@intFromEnum(Feature.gfx11_insts)] = .{684 result[@intFromEnum(Feature.gfx11_insts)] = .{
622 .llvm_name = "gfx11-insts",685 .llvm_name = "gfx11-insts",
623 .description = "Additional instructions for GFX11+",686 .description = "Additional instructions for GFX11+",
...@@ -630,7 +693,10 @@ pub const all_features = blk: {...@@ -630,7 +693,10 @@ pub const all_features = blk: {
630 .@"16_bit_insts",693 .@"16_bit_insts",
631 .a16,694 .a16,
632 .add_no_carry_insts,695 .add_no_carry_insts,
696 .agent_scope_fine_grained_remote_memory_atomics,
633 .aperture_regs,697 .aperture_regs,
698 .atomic_fmin_fmax_flat_f32,
699 .atomic_fmin_fmax_global_f32,
634 .ci_insts,700 .ci_insts,
635 .default_component_broadcast,701 .default_component_broadcast,
636 .dpp,702 .dpp,
...@@ -655,6 +721,7 @@ pub const all_features = blk: {...@@ -655,6 +721,7 @@ pub const all_features = blk: {
655 .int_clamp_insts,721 .int_clamp_insts,
656 .inv_2pi_inline_imm,722 .inv_2pi_inline_imm,
657 .localmemorysize65536,723 .localmemorysize65536,
724 .max_hard_clause_length_32,
658 .mimg_r128,725 .mimg_r128,
659 .movrel,726 .movrel,
660 .no_data_dep_hazard,727 .no_data_dep_hazard,
...@@ -844,6 +911,16 @@ pub const all_features = blk: {...@@ -844,6 +911,16 @@ pub const all_features = blk: {
844 .description = "Has mAI instructions",911 .description = "Has mAI instructions",
845 .dependencies = featureSet(&[_]Feature{}),912 .dependencies = featureSet(&[_]Feature{}),
846 };913 };
914 result[@intFromEnum(Feature.max_hard_clause_length_32)] = .{
915 .llvm_name = "max-hard-clause-length-32",
916 .description = "Maximum number of instructions in an explicit S_CLAUSE is 32",
917 .dependencies = featureSet(&[_]Feature{}),
918 };
919 result[@intFromEnum(Feature.max_hard_clause_length_63)] = .{
920 .llvm_name = "max-hard-clause-length-63",
921 .description = "Maximum number of instructions in an explicit S_CLAUSE is 63",
922 .dependencies = featureSet(&[_]Feature{}),
923 };
847 result[@intFromEnum(Feature.max_private_element_size_16)] = .{924 result[@intFromEnum(Feature.max_private_element_size_16)] = .{
848 .llvm_name = "max-private-element-size-16",925 .llvm_name = "max-private-element-size-16",
849 .description = "Maximum private access size may be 16",926 .description = "Maximum private access size may be 16",
...@@ -859,6 +936,11 @@ pub const all_features = blk: {...@@ -859,6 +936,11 @@ pub const all_features = blk: {
859 .description = "Maximum private access size may be 8",936 .description = "Maximum private access size may be 8",
860 .dependencies = featureSet(&[_]Feature{}),937 .dependencies = featureSet(&[_]Feature{}),
861 };938 };
939 result[@intFromEnum(Feature.memory_atomic_fadd_f32_denormal_support)] = .{
940 .llvm_name = "memory-atomic-fadd-f32-denormal-support",
941 .description = "global/flat/buffer atomic fadd for float supports denormal handling",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
862 result[@intFromEnum(Feature.mfma_inline_literal_bug)] = .{944 result[@intFromEnum(Feature.mfma_inline_literal_bug)] = .{
863 .llvm_name = "mfma-inline-literal-bug",945 .llvm_name = "mfma-inline-literal-bug",
864 .description = "MFMA cannot use inline literal as SrcC",946 .description = "MFMA cannot use inline literal as SrcC",
...@@ -939,6 +1021,16 @@ pub const all_features = blk: {...@@ -939,6 +1021,16 @@ pub const all_features = blk: {
939 .description = "Has v_pk_fmac_f16 instruction",1021 .description = "Has v_pk_fmac_f16 instruction",
940 .dependencies = featureSet(&[_]Feature{}),1022 .dependencies = featureSet(&[_]Feature{}),
941 };1023 };
1024 result[@intFromEnum(Feature.precise_memory)] = .{
1025 .llvm_name = "precise-memory",
1026 .description = "Enable precise memory mode",
1027 .dependencies = featureSet(&[_]Feature{}),
1028 };
1029 result[@intFromEnum(Feature.priv_enabled_trap2_nop_bug)] = .{
1030 .llvm_name = "priv-enabled-trap2-nop-bug",
1031 .description = "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug",
1032 .dependencies = featureSet(&[_]Feature{}),
1033 };
942 result[@intFromEnum(Feature.promote_alloca)] = .{1034 result[@intFromEnum(Feature.promote_alloca)] = .{
943 .llvm_name = "promote-alloca",1035 .llvm_name = "promote-alloca",
944 .description = "Enable promote alloca pass",1036 .description = "Enable promote alloca pass",
...@@ -964,6 +1056,16 @@ pub const all_features = blk: {...@@ -964,6 +1056,16 @@ pub const all_features = blk: {
964 .description = "Use true 16-bit registers",1056 .description = "Use true 16-bit registers",
965 .dependencies = featureSet(&[_]Feature{}),1057 .dependencies = featureSet(&[_]Feature{}),
966 };1058 };
1059 result[@intFromEnum(Feature.required_export_priority)] = .{
1060 .llvm_name = "required-export-priority",
1061 .description = "Export priority must be explicitly manipulated on GFX11.5",
1062 .dependencies = featureSet(&[_]Feature{}),
1063 };
1064 result[@intFromEnum(Feature.requires_cov6)] = .{
1065 .llvm_name = "requires-cov6",
1066 .description = "Target Requires Code Object V6",
1067 .dependencies = featureSet(&[_]Feature{}),
1068 };
967 result[@intFromEnum(Feature.restricted_soffset)] = .{1069 result[@intFromEnum(Feature.restricted_soffset)] = .{
968 .llvm_name = "restricted-soffset",1070 .llvm_name = "restricted-soffset",
969 .description = "Has restricted SOffset (immediate not supported).",1071 .description = "Has restricted SOffset (immediate not supported).",
...@@ -1038,6 +1140,10 @@ pub const all_features = blk: {...@@ -1038,6 +1140,10 @@ pub const all_features = blk: {
1038 .llvm_name = "sea-islands",1140 .llvm_name = "sea-islands",
1039 .description = "SEA_ISLANDS GPU generation",1141 .description = "SEA_ISLANDS GPU generation",
1040 .dependencies = featureSet(&[_]Feature{1142 .dependencies = featureSet(&[_]Feature{
1143 .atomic_fmin_fmax_flat_f32,
1144 .atomic_fmin_fmax_flat_f64,
1145 .atomic_fmin_fmax_global_f32,
1146 .atomic_fmin_fmax_global_f64,
1041 .ci_insts,1147 .ci_insts,
1042 .default_component_zero,1148 .default_component_zero,
1043 .ds_src2_insts,1149 .ds_src2_insts,
...@@ -1087,6 +1193,8 @@ pub const all_features = blk: {...@@ -1087,6 +1193,8 @@ pub const all_features = blk: {
1087 .llvm_name = "southern-islands",1193 .llvm_name = "southern-islands",
1088 .description = "SOUTHERN_ISLANDS GPU generation",1194 .description = "SOUTHERN_ISLANDS GPU generation",
1089 .dependencies = featureSet(&[_]Feature{1195 .dependencies = featureSet(&[_]Feature{
1196 .atomic_fmin_fmax_global_f32,
1197 .atomic_fmin_fmax_global_f64,
1090 .default_component_zero,1198 .default_component_zero,
1091 .ds_src2_insts,1199 .ds_src2_insts,
1092 .extended_image_insts,1200 .extended_image_insts,
...@@ -1365,7 +1473,6 @@ pub const cpu = struct {...@@ -1365,7 +1473,6 @@ pub const cpu = struct {
1365 .vcmpx_exec_war_hazard,1473 .vcmpx_exec_war_hazard,
1366 .vcmpx_permlane_hazard,1474 .vcmpx_permlane_hazard,
1367 .vmem_to_scalar_write_hazard,1475 .vmem_to_scalar_write_hazard,
1368 .wavefrontsize32,
1369 .xnack_support,1476 .xnack_support,
1370 }),1477 }),
1371 };1478 };
...@@ -1402,7 +1509,6 @@ pub const cpu = struct {...@@ -1402,7 +1509,6 @@ pub const cpu = struct {
1402 .vcmpx_exec_war_hazard,1509 .vcmpx_exec_war_hazard,
1403 .vcmpx_permlane_hazard,1510 .vcmpx_permlane_hazard,
1404 .vmem_to_scalar_write_hazard,1511 .vmem_to_scalar_write_hazard,
1405 .wavefrontsize32,
1406 .xnack_support,1512 .xnack_support,
1407 }),1513 }),
1408 };1514 };
...@@ -1439,7 +1545,6 @@ pub const cpu = struct {...@@ -1439,7 +1545,6 @@ pub const cpu = struct {
1439 .vcmpx_exec_war_hazard,1545 .vcmpx_exec_war_hazard,
1440 .vcmpx_permlane_hazard,1546 .vcmpx_permlane_hazard,
1441 .vmem_to_scalar_write_hazard,1547 .vmem_to_scalar_write_hazard,
1442 .wavefrontsize32,
1443 .xnack_support,1548 .xnack_support,
1444 }),1549 }),
1445 };1550 };
...@@ -1471,7 +1576,6 @@ pub const cpu = struct {...@@ -1471,7 +1576,6 @@ pub const cpu = struct {
1471 .vcmpx_exec_war_hazard,1576 .vcmpx_exec_war_hazard,
1472 .vcmpx_permlane_hazard,1577 .vcmpx_permlane_hazard,
1473 .vmem_to_scalar_write_hazard,1578 .vmem_to_scalar_write_hazard,
1474 .wavefrontsize32,
1475 .xnack_support,1579 .xnack_support,
1476 }),1580 }),
1477 };1581 };
...@@ -1494,7 +1598,6 @@ pub const cpu = struct {...@@ -1494,7 +1598,6 @@ pub const cpu = struct {
1494 .ldsbankcount32,1598 .ldsbankcount32,
1495 .nsa_encoding,1599 .nsa_encoding,
1496 .shader_cycles_register,1600 .shader_cycles_register,
1497 .wavefrontsize32,
1498 }),1601 }),
1499 };1602 };
1500 pub const gfx1031 = CpuModel{1603 pub const gfx1031 = CpuModel{
...@@ -1516,7 +1619,6 @@ pub const cpu = struct {...@@ -1516,7 +1619,6 @@ pub const cpu = struct {
1516 .ldsbankcount32,1619 .ldsbankcount32,
1517 .nsa_encoding,1620 .nsa_encoding,
1518 .shader_cycles_register,1621 .shader_cycles_register,
1519 .wavefrontsize32,
1520 }),1622 }),
1521 };1623 };
1522 pub const gfx1032 = CpuModel{1624 pub const gfx1032 = CpuModel{
...@@ -1538,7 +1640,6 @@ pub const cpu = struct {...@@ -1538,7 +1640,6 @@ pub const cpu = struct {
1538 .ldsbankcount32,1640 .ldsbankcount32,
1539 .nsa_encoding,1641 .nsa_encoding,
1540 .shader_cycles_register,1642 .shader_cycles_register,
1541 .wavefrontsize32,
1542 }),1643 }),
1543 };1644 };
1544 pub const gfx1033 = CpuModel{1645 pub const gfx1033 = CpuModel{
...@@ -1560,7 +1661,6 @@ pub const cpu = struct {...@@ -1560,7 +1661,6 @@ pub const cpu = struct {
1560 .ldsbankcount32,1661 .ldsbankcount32,
1561 .nsa_encoding,1662 .nsa_encoding,
1562 .shader_cycles_register,1663 .shader_cycles_register,
1563 .wavefrontsize32,
1564 }),1664 }),
1565 };1665 };
1566 pub const gfx1034 = CpuModel{1666 pub const gfx1034 = CpuModel{
...@@ -1582,7 +1682,6 @@ pub const cpu = struct {...@@ -1582,7 +1682,6 @@ pub const cpu = struct {
1582 .ldsbankcount32,1682 .ldsbankcount32,
1583 .nsa_encoding,1683 .nsa_encoding,
1584 .shader_cycles_register,1684 .shader_cycles_register,
1585 .wavefrontsize32,
1586 }),1685 }),
1587 };1686 };
1588 pub const gfx1035 = CpuModel{1687 pub const gfx1035 = CpuModel{
...@@ -1604,7 +1703,6 @@ pub const cpu = struct {...@@ -1604,7 +1703,6 @@ pub const cpu = struct {
1604 .ldsbankcount32,1703 .ldsbankcount32,
1605 .nsa_encoding,1704 .nsa_encoding,
1606 .shader_cycles_register,1705 .shader_cycles_register,
1607 .wavefrontsize32,
1608 }),1706 }),
1609 };1707 };
1610 pub const gfx1036 = CpuModel{1708 pub const gfx1036 = CpuModel{
...@@ -1626,13 +1724,66 @@ pub const cpu = struct {...@@ -1626,13 +1724,66 @@ pub const cpu = struct {
1626 .ldsbankcount32,1724 .ldsbankcount32,
1627 .nsa_encoding,1725 .nsa_encoding,
1628 .shader_cycles_register,1726 .shader_cycles_register,
1629 .wavefrontsize32,1727 }),
1728 };
1729 pub const gfx10_1_generic = CpuModel{
1730 .name = "gfx10_1_generic",
1731 .llvm_name = "gfx10-1-generic",
1732 .features = featureSet(&[_]Feature{
1733 .back_off_barrier,
1734 .dl_insts,
1735 .ds_src2_insts,
1736 .flat_segment_offset_bug,
1737 .get_wave_id_inst,
1738 .gfx10,
1739 .inst_fwd_prefetch_bug,
1740 .lds_branch_vmem_war_hazard,
1741 .lds_misaligned_bug,
1742 .ldsbankcount32,
1743 .mad_mac_f32_insts,
1744 .negative_unaligned_scratch_offset_bug,
1745 .nsa_clause_bug,
1746 .nsa_encoding,
1747 .nsa_to_vmem_bug,
1748 .offset_3f_bug,
1749 .requires_cov6,
1750 .scalar_atomics,
1751 .scalar_flat_scratch_insts,
1752 .scalar_stores,
1753 .smem_to_vector_write_hazard,
1754 .vcmpx_exec_war_hazard,
1755 .vcmpx_permlane_hazard,
1756 .vmem_to_scalar_write_hazard,
1757 .xnack_support,
1758 }),
1759 };
1760 pub const gfx10_3_generic = CpuModel{
1761 .name = "gfx10_3_generic",
1762 .llvm_name = "gfx10-3-generic",
1763 .features = featureSet(&[_]Feature{
1764 .back_off_barrier,
1765 .dl_insts,
1766 .dot10_insts,
1767 .dot1_insts,
1768 .dot2_insts,
1769 .dot5_insts,
1770 .dot6_insts,
1771 .dot7_insts,
1772 .gfx10,
1773 .gfx10_3_insts,
1774 .gfx10_a_encoding,
1775 .gfx10_b_encoding,
1776 .ldsbankcount32,
1777 .nsa_encoding,
1778 .requires_cov6,
1779 .shader_cycles_register,
1630 }),1780 }),
1631 };1781 };
1632 pub const gfx1100 = CpuModel{1782 pub const gfx1100 = CpuModel{
1633 .name = "gfx1100",1783 .name = "gfx1100",
1634 .llvm_name = "gfx1100",1784 .llvm_name = "gfx1100",
1635 .features = featureSet(&[_]Feature{1785 .features = featureSet(&[_]Feature{
1786 .allocate1_5xvgprs,
1636 .architected_flat_scratch,1787 .architected_flat_scratch,
1637 .atomic_fadd_no_rtn_insts,1788 .atomic_fadd_no_rtn_insts,
1638 .atomic_fadd_rtn_insts,1789 .atomic_fadd_rtn_insts,
...@@ -1644,25 +1795,26 @@ pub const cpu = struct {...@@ -1644,25 +1795,26 @@ pub const cpu = struct {
1644 .dot9_insts,1795 .dot9_insts,
1645 .flat_atomic_fadd_f32_inst,1796 .flat_atomic_fadd_f32_inst,
1646 .gfx11,1797 .gfx11,
1647 .gfx11_full_vgprs,
1648 .image_insts,1798 .image_insts,
1649 .ldsbankcount32,1799 .ldsbankcount32,
1650 .mad_intra_fwd_bug,1800 .mad_intra_fwd_bug,
1801 .memory_atomic_fadd_f32_denormal_support,
1651 .msaa_load_dst_sel_bug,1802 .msaa_load_dst_sel_bug,
1652 .nsa_encoding,1803 .nsa_encoding,
1653 .packed_tid,1804 .packed_tid,
1654 .partial_nsa_encoding,1805 .partial_nsa_encoding,
1806 .priv_enabled_trap2_nop_bug,
1655 .shader_cycles_register,1807 .shader_cycles_register,
1656 .user_sgpr_init16_bug,1808 .user_sgpr_init16_bug,
1657 .valu_trans_use_hazard,1809 .valu_trans_use_hazard,
1658 .vcmpx_permlane_hazard,1810 .vcmpx_permlane_hazard,
1659 .wavefrontsize32,
1660 }),1811 }),
1661 };1812 };
1662 pub const gfx1101 = CpuModel{1813 pub const gfx1101 = CpuModel{
1663 .name = "gfx1101",1814 .name = "gfx1101",
1664 .llvm_name = "gfx1101",1815 .llvm_name = "gfx1101",
1665 .features = featureSet(&[_]Feature{1816 .features = featureSet(&[_]Feature{
1817 .allocate1_5xvgprs,
1666 .architected_flat_scratch,1818 .architected_flat_scratch,
1667 .atomic_fadd_no_rtn_insts,1819 .atomic_fadd_no_rtn_insts,
1668 .atomic_fadd_rtn_insts,1820 .atomic_fadd_rtn_insts,
...@@ -1674,18 +1826,18 @@ pub const cpu = struct {...@@ -1674,18 +1826,18 @@ pub const cpu = struct {
1674 .dot9_insts,1826 .dot9_insts,
1675 .flat_atomic_fadd_f32_inst,1827 .flat_atomic_fadd_f32_inst,
1676 .gfx11,1828 .gfx11,
1677 .gfx11_full_vgprs,
1678 .image_insts,1829 .image_insts,
1679 .ldsbankcount32,1830 .ldsbankcount32,
1680 .mad_intra_fwd_bug,1831 .mad_intra_fwd_bug,
1832 .memory_atomic_fadd_f32_denormal_support,
1681 .msaa_load_dst_sel_bug,1833 .msaa_load_dst_sel_bug,
1682 .nsa_encoding,1834 .nsa_encoding,
1683 .packed_tid,1835 .packed_tid,
1684 .partial_nsa_encoding,1836 .partial_nsa_encoding,
1837 .priv_enabled_trap2_nop_bug,
1685 .shader_cycles_register,1838 .shader_cycles_register,
1686 .valu_trans_use_hazard,1839 .valu_trans_use_hazard,
1687 .vcmpx_permlane_hazard,1840 .vcmpx_permlane_hazard,
1688 .wavefrontsize32,
1689 }),1841 }),
1690 };1842 };
1691 pub const gfx1102 = CpuModel{1843 pub const gfx1102 = CpuModel{
...@@ -1706,15 +1858,16 @@ pub const cpu = struct {...@@ -1706,15 +1858,16 @@ pub const cpu = struct {
1706 .image_insts,1858 .image_insts,
1707 .ldsbankcount32,1859 .ldsbankcount32,
1708 .mad_intra_fwd_bug,1860 .mad_intra_fwd_bug,
1861 .memory_atomic_fadd_f32_denormal_support,
1709 .msaa_load_dst_sel_bug,1862 .msaa_load_dst_sel_bug,
1710 .nsa_encoding,1863 .nsa_encoding,
1711 .packed_tid,1864 .packed_tid,
1712 .partial_nsa_encoding,1865 .partial_nsa_encoding,
1866 .priv_enabled_trap2_nop_bug,
1713 .shader_cycles_register,1867 .shader_cycles_register,
1714 .user_sgpr_init16_bug,1868 .user_sgpr_init16_bug,
1715 .valu_trans_use_hazard,1869 .valu_trans_use_hazard,
1716 .vcmpx_permlane_hazard,1870 .vcmpx_permlane_hazard,
1717 .wavefrontsize32,
1718 }),1871 }),
1719 };1872 };
1720 pub const gfx1103 = CpuModel{1873 pub const gfx1103 = CpuModel{
...@@ -1735,14 +1888,15 @@ pub const cpu = struct {...@@ -1735,14 +1888,15 @@ pub const cpu = struct {
1735 .image_insts,1888 .image_insts,
1736 .ldsbankcount32,1889 .ldsbankcount32,
1737 .mad_intra_fwd_bug,1890 .mad_intra_fwd_bug,
1891 .memory_atomic_fadd_f32_denormal_support,
1738 .msaa_load_dst_sel_bug,1892 .msaa_load_dst_sel_bug,
1739 .nsa_encoding,1893 .nsa_encoding,
1740 .packed_tid,1894 .packed_tid,
1741 .partial_nsa_encoding,1895 .partial_nsa_encoding,
1896 .priv_enabled_trap2_nop_bug,
1742 .shader_cycles_register,1897 .shader_cycles_register,
1743 .valu_trans_use_hazard,1898 .valu_trans_use_hazard,
1744 .vcmpx_permlane_hazard,1899 .vcmpx_permlane_hazard,
1745 .wavefrontsize32,
1746 }),1900 }),
1747 };1901 };
1748 pub const gfx1150 = CpuModel{1902 pub const gfx1150 = CpuModel{
...@@ -1763,21 +1917,22 @@ pub const cpu = struct {...@@ -1763,21 +1917,22 @@ pub const cpu = struct {
1763 .gfx11,1917 .gfx11,
1764 .image_insts,1918 .image_insts,
1765 .ldsbankcount32,1919 .ldsbankcount32,
1766 .mad_intra_fwd_bug,1920 .memory_atomic_fadd_f32_denormal_support,
1767 .nsa_encoding,1921 .nsa_encoding,
1768 .packed_tid,1922 .packed_tid,
1769 .partial_nsa_encoding,1923 .partial_nsa_encoding,
1924 .required_export_priority,
1770 .salu_float,1925 .salu_float,
1771 .shader_cycles_register,1926 .shader_cycles_register,
1772 .vcmpx_permlane_hazard,1927 .vcmpx_permlane_hazard,
1773 .vgpr_singleuse_hint,1928 .vgpr_singleuse_hint,
1774 .wavefrontsize32,
1775 }),1929 }),
1776 };1930 };
1777 pub const gfx1151 = CpuModel{1931 pub const gfx1151 = CpuModel{
1778 .name = "gfx1151",1932 .name = "gfx1151",
1779 .llvm_name = "gfx1151",1933 .llvm_name = "gfx1151",
1780 .features = featureSet(&[_]Feature{1934 .features = featureSet(&[_]Feature{
1935 .allocate1_5xvgprs,
1781 .architected_flat_scratch,1936 .architected_flat_scratch,
1782 .atomic_fadd_no_rtn_insts,1937 .atomic_fadd_no_rtn_insts,
1783 .atomic_fadd_rtn_insts,1938 .atomic_fadd_rtn_insts,
...@@ -1790,27 +1945,89 @@ pub const cpu = struct {...@@ -1790,27 +1945,89 @@ pub const cpu = struct {
1790 .dpp_src1_sgpr,1945 .dpp_src1_sgpr,
1791 .flat_atomic_fadd_f32_inst,1946 .flat_atomic_fadd_f32_inst,
1792 .gfx11,1947 .gfx11,
1793 .gfx11_full_vgprs,
1794 .image_insts,1948 .image_insts,
1795 .ldsbankcount32,1949 .ldsbankcount32,
1796 .mad_intra_fwd_bug,1950 .memory_atomic_fadd_f32_denormal_support,
1951 .nsa_encoding,
1952 .packed_tid,
1953 .partial_nsa_encoding,
1954 .required_export_priority,
1955 .salu_float,
1956 .shader_cycles_register,
1957 .vcmpx_permlane_hazard,
1958 .vgpr_singleuse_hint,
1959 }),
1960 };
1961 pub const gfx1152 = CpuModel{
1962 .name = "gfx1152",
1963 .llvm_name = "gfx1152",
1964 .features = featureSet(&[_]Feature{
1965 .architected_flat_scratch,
1966 .atomic_fadd_no_rtn_insts,
1967 .atomic_fadd_rtn_insts,
1968 .dl_insts,
1969 .dot10_insts,
1970 .dot5_insts,
1971 .dot7_insts,
1972 .dot8_insts,
1973 .dot9_insts,
1974 .dpp_src1_sgpr,
1975 .flat_atomic_fadd_f32_inst,
1976 .gfx11,
1977 .image_insts,
1978 .ldsbankcount32,
1979 .memory_atomic_fadd_f32_denormal_support,
1797 .nsa_encoding,1980 .nsa_encoding,
1798 .packed_tid,1981 .packed_tid,
1799 .partial_nsa_encoding,1982 .partial_nsa_encoding,
1983 .required_export_priority,
1800 .salu_float,1984 .salu_float,
1801 .shader_cycles_register,1985 .shader_cycles_register,
1802 .vcmpx_permlane_hazard,1986 .vcmpx_permlane_hazard,
1803 .vgpr_singleuse_hint,1987 .vgpr_singleuse_hint,
1804 .wavefrontsize32,1988 }),
1989 };
1990 pub const gfx11_generic = CpuModel{
1991 .name = "gfx11_generic",
1992 .llvm_name = "gfx11-generic",
1993 .features = featureSet(&[_]Feature{
1994 .architected_flat_scratch,
1995 .atomic_fadd_no_rtn_insts,
1996 .atomic_fadd_rtn_insts,
1997 .dl_insts,
1998 .dot10_insts,
1999 .dot5_insts,
2000 .dot7_insts,
2001 .dot8_insts,
2002 .dot9_insts,
2003 .flat_atomic_fadd_f32_inst,
2004 .gfx11,
2005 .image_insts,
2006 .ldsbankcount32,
2007 .mad_intra_fwd_bug,
2008 .memory_atomic_fadd_f32_denormal_support,
2009 .msaa_load_dst_sel_bug,
2010 .nsa_encoding,
2011 .packed_tid,
2012 .partial_nsa_encoding,
2013 .priv_enabled_trap2_nop_bug,
2014 .required_export_priority,
2015 .requires_cov6,
2016 .shader_cycles_register,
2017 .user_sgpr_init16_bug,
2018 .valu_trans_use_hazard,
2019 .vcmpx_permlane_hazard,
1805 }),2020 }),
1806 };2021 };
1807 pub const gfx1200 = CpuModel{2022 pub const gfx1200 = CpuModel{
1808 .name = "gfx1200",2023 .name = "gfx1200",
1809 .llvm_name = "gfx1200",2024 .llvm_name = "gfx1200",
1810 .features = featureSet(&[_]Feature{2025 .features = featureSet(&[_]Feature{
2026 .allocate1_5xvgprs,
1811 .architected_flat_scratch,2027 .architected_flat_scratch,
1812 .architected_sgprs,2028 .architected_sgprs,
1813 .atomic_buffer_global_pk_add_f16_insts,2029 .atomic_buffer_global_pk_add_f16_insts,
2030 .atomic_buffer_pk_add_bf16_inst,
1814 .atomic_ds_pk_add_16_insts,2031 .atomic_ds_pk_add_16_insts,
1815 .atomic_fadd_no_rtn_insts,2032 .atomic_fadd_no_rtn_insts,
1816 .atomic_fadd_rtn_insts,2033 .atomic_fadd_rtn_insts,
...@@ -1818,6 +2035,7 @@ pub const cpu = struct {...@@ -1818,6 +2035,7 @@ pub const cpu = struct {
1818 .atomic_global_pk_add_bf16_inst,2035 .atomic_global_pk_add_bf16_inst,
1819 .dl_insts,2036 .dl_insts,
1820 .dot10_insts,2037 .dot10_insts,
2038 .dot11_insts,
1821 .dot7_insts,2039 .dot7_insts,
1822 .dot8_insts,2040 .dot8_insts,
1823 .dot9_insts,2041 .dot9_insts,
...@@ -1828,6 +2046,7 @@ pub const cpu = struct {...@@ -1828,6 +2046,7 @@ pub const cpu = struct {
1828 .gfx12,2046 .gfx12,
1829 .image_insts,2047 .image_insts,
1830 .ldsbankcount32,2048 .ldsbankcount32,
2049 .memory_atomic_fadd_f32_denormal_support,
1831 .nsa_encoding,2050 .nsa_encoding,
1832 .packed_tid,2051 .packed_tid,
1833 .partial_nsa_encoding,2052 .partial_nsa_encoding,
...@@ -1838,16 +2057,17 @@ pub const cpu = struct {...@@ -1838,16 +2057,17 @@ pub const cpu = struct {
1838 .shader_cycles_hi_lo_registers,2057 .shader_cycles_hi_lo_registers,
1839 .vcmpx_permlane_hazard,2058 .vcmpx_permlane_hazard,
1840 .vgpr_singleuse_hint,2059 .vgpr_singleuse_hint,
1841 .wavefrontsize32,
1842 }),2060 }),
1843 };2061 };
1844 pub const gfx1201 = CpuModel{2062 pub const gfx1201 = CpuModel{
1845 .name = "gfx1201",2063 .name = "gfx1201",
1846 .llvm_name = "gfx1201",2064 .llvm_name = "gfx1201",
1847 .features = featureSet(&[_]Feature{2065 .features = featureSet(&[_]Feature{
2066 .allocate1_5xvgprs,
1848 .architected_flat_scratch,2067 .architected_flat_scratch,
1849 .architected_sgprs,2068 .architected_sgprs,
1850 .atomic_buffer_global_pk_add_f16_insts,2069 .atomic_buffer_global_pk_add_f16_insts,
2070 .atomic_buffer_pk_add_bf16_inst,
1851 .atomic_ds_pk_add_16_insts,2071 .atomic_ds_pk_add_16_insts,
1852 .atomic_fadd_no_rtn_insts,2072 .atomic_fadd_no_rtn_insts,
1853 .atomic_fadd_rtn_insts,2073 .atomic_fadd_rtn_insts,
...@@ -1855,6 +2075,7 @@ pub const cpu = struct {...@@ -1855,6 +2075,7 @@ pub const cpu = struct {
1855 .atomic_global_pk_add_bf16_inst,2075 .atomic_global_pk_add_bf16_inst,
1856 .dl_insts,2076 .dl_insts,
1857 .dot10_insts,2077 .dot10_insts,
2078 .dot11_insts,
1858 .dot7_insts,2079 .dot7_insts,
1859 .dot8_insts,2080 .dot8_insts,
1860 .dot9_insts,2081 .dot9_insts,
...@@ -1865,6 +2086,7 @@ pub const cpu = struct {...@@ -1865,6 +2086,7 @@ pub const cpu = struct {
1865 .gfx12,2086 .gfx12,
1866 .image_insts,2087 .image_insts,
1867 .ldsbankcount32,2088 .ldsbankcount32,
2089 .memory_atomic_fadd_f32_denormal_support,
1868 .nsa_encoding,2090 .nsa_encoding,
1869 .packed_tid,2091 .packed_tid,
1870 .partial_nsa_encoding,2092 .partial_nsa_encoding,
...@@ -1875,7 +2097,47 @@ pub const cpu = struct {...@@ -1875,7 +2097,47 @@ pub const cpu = struct {
1875 .shader_cycles_hi_lo_registers,2097 .shader_cycles_hi_lo_registers,
1876 .vcmpx_permlane_hazard,2098 .vcmpx_permlane_hazard,
1877 .vgpr_singleuse_hint,2099 .vgpr_singleuse_hint,
1878 .wavefrontsize32,2100 }),
2101 };
2102 pub const gfx12_generic = CpuModel{
2103 .name = "gfx12_generic",
2104 .llvm_name = "gfx12-generic",
2105 .features = featureSet(&[_]Feature{
2106 .allocate1_5xvgprs,
2107 .architected_flat_scratch,
2108 .architected_sgprs,
2109 .atomic_buffer_global_pk_add_f16_insts,
2110 .atomic_buffer_pk_add_bf16_inst,
2111 .atomic_ds_pk_add_16_insts,
2112 .atomic_fadd_no_rtn_insts,
2113 .atomic_fadd_rtn_insts,
2114 .atomic_flat_pk_add_16_insts,
2115 .atomic_global_pk_add_bf16_inst,
2116 .dl_insts,
2117 .dot10_insts,
2118 .dot11_insts,
2119 .dot7_insts,
2120 .dot8_insts,
2121 .dot9_insts,
2122 .dpp_src1_sgpr,
2123 .extended_image_insts,
2124 .flat_atomic_fadd_f32_inst,
2125 .fp8_conversion_insts,
2126 .gfx12,
2127 .image_insts,
2128 .ldsbankcount32,
2129 .memory_atomic_fadd_f32_denormal_support,
2130 .nsa_encoding,
2131 .packed_tid,
2132 .partial_nsa_encoding,
2133 .pseudo_scalar_trans,
2134 .requires_cov6,
2135 .restricted_soffset,
2136 .salu_float,
2137 .scalar_dwordx3_loads,
2138 .shader_cycles_hi_lo_registers,
2139 .vcmpx_permlane_hazard,
2140 .vgpr_singleuse_hint,
1879 }),2141 }),
1880 };2142 };
1881 pub const gfx600 = CpuModel{2143 pub const gfx600 = CpuModel{
...@@ -2124,6 +2386,8 @@ pub const cpu = struct {...@@ -2124,6 +2386,8 @@ pub const cpu = struct {
2124 .atomic_buffer_global_pk_add_f16_insts,2386 .atomic_buffer_global_pk_add_f16_insts,
2125 .atomic_fadd_no_rtn_insts,2387 .atomic_fadd_no_rtn_insts,
2126 .atomic_fadd_rtn_insts,2388 .atomic_fadd_rtn_insts,
2389 .atomic_fmin_fmax_flat_f64,
2390 .atomic_fmin_fmax_global_f64,
2127 .back_off_barrier,2391 .back_off_barrier,
2128 .dl_insts,2392 .dl_insts,
2129 .dot10_insts,2393 .dot10_insts,
...@@ -2135,6 +2399,7 @@ pub const cpu = struct {...@@ -2135,6 +2399,7 @@ pub const cpu = struct {
2135 .dot6_insts,2399 .dot6_insts,
2136 .dot7_insts,2400 .dot7_insts,
2137 .dpp_64bit,2401 .dpp_64bit,
2402 .flat_buffer_global_fadd_f64_inst,
2138 .fma_mix_insts,2403 .fma_mix_insts,
2139 .fmacf64_inst,2404 .fmacf64_inst,
2140 .full_rate_64_ops,2405 .full_rate_64_ops,
...@@ -2170,12 +2435,15 @@ pub const cpu = struct {...@@ -2170,12 +2435,15 @@ pub const cpu = struct {
2170 .name = "gfx940",2435 .name = "gfx940",
2171 .llvm_name = "gfx940",2436 .llvm_name = "gfx940",
2172 .features = featureSet(&[_]Feature{2437 .features = featureSet(&[_]Feature{
2438 .agent_scope_fine_grained_remote_memory_atomics,
2173 .architected_flat_scratch,2439 .architected_flat_scratch,
2174 .atomic_buffer_global_pk_add_f16_insts,2440 .atomic_buffer_global_pk_add_f16_insts,
2175 .atomic_ds_pk_add_16_insts,2441 .atomic_ds_pk_add_16_insts,
2176 .atomic_fadd_no_rtn_insts,2442 .atomic_fadd_no_rtn_insts,
2177 .atomic_fadd_rtn_insts,2443 .atomic_fadd_rtn_insts,
2178 .atomic_flat_pk_add_16_insts,2444 .atomic_flat_pk_add_16_insts,
2445 .atomic_fmin_fmax_flat_f64,
2446 .atomic_fmin_fmax_global_f64,
2179 .atomic_global_pk_add_bf16_inst,2447 .atomic_global_pk_add_bf16_inst,
2180 .back_off_barrier,2448 .back_off_barrier,
2181 .dl_insts,2449 .dl_insts,
...@@ -2189,6 +2457,7 @@ pub const cpu = struct {...@@ -2189,6 +2457,7 @@ pub const cpu = struct {
2189 .dot7_insts,2457 .dot7_insts,
2190 .dpp_64bit,2458 .dpp_64bit,
2191 .flat_atomic_fadd_f32_inst,2459 .flat_atomic_fadd_f32_inst,
2460 .flat_buffer_global_fadd_f64_inst,
2192 .fma_mix_insts,2461 .fma_mix_insts,
2193 .fmacf64_inst,2462 .fmacf64_inst,
2194 .force_store_sc0_sc1,2463 .force_store_sc0_sc1,
...@@ -2201,6 +2470,7 @@ pub const cpu = struct {...@@ -2201,6 +2470,7 @@ pub const cpu = struct {
2201 .kernarg_preload,2470 .kernarg_preload,
2202 .ldsbankcount32,2471 .ldsbankcount32,
2203 .mai_insts,2472 .mai_insts,
2473 .memory_atomic_fadd_f32_denormal_support,
2204 .packed_fp32_ops,2474 .packed_fp32_ops,
2205 .packed_tid,2475 .packed_tid,
2206 .pk_fmac_f16_inst,2476 .pk_fmac_f16_inst,
...@@ -2211,12 +2481,15 @@ pub const cpu = struct {...@@ -2211,12 +2481,15 @@ pub const cpu = struct {
2211 .name = "gfx941",2481 .name = "gfx941",
2212 .llvm_name = "gfx941",2482 .llvm_name = "gfx941",
2213 .features = featureSet(&[_]Feature{2483 .features = featureSet(&[_]Feature{
2484 .agent_scope_fine_grained_remote_memory_atomics,
2214 .architected_flat_scratch,2485 .architected_flat_scratch,
2215 .atomic_buffer_global_pk_add_f16_insts,2486 .atomic_buffer_global_pk_add_f16_insts,
2216 .atomic_ds_pk_add_16_insts,2487 .atomic_ds_pk_add_16_insts,
2217 .atomic_fadd_no_rtn_insts,2488 .atomic_fadd_no_rtn_insts,
2218 .atomic_fadd_rtn_insts,2489 .atomic_fadd_rtn_insts,
2219 .atomic_flat_pk_add_16_insts,2490 .atomic_flat_pk_add_16_insts,
2491 .atomic_fmin_fmax_flat_f64,
2492 .atomic_fmin_fmax_global_f64,
2220 .atomic_global_pk_add_bf16_inst,2493 .atomic_global_pk_add_bf16_inst,
2221 .back_off_barrier,2494 .back_off_barrier,
2222 .dl_insts,2495 .dl_insts,
...@@ -2230,6 +2503,7 @@ pub const cpu = struct {...@@ -2230,6 +2503,7 @@ pub const cpu = struct {
2230 .dot7_insts,2503 .dot7_insts,
2231 .dpp_64bit,2504 .dpp_64bit,
2232 .flat_atomic_fadd_f32_inst,2505 .flat_atomic_fadd_f32_inst,
2506 .flat_buffer_global_fadd_f64_inst,
2233 .fma_mix_insts,2507 .fma_mix_insts,
2234 .fmacf64_inst,2508 .fmacf64_inst,
2235 .force_store_sc0_sc1,2509 .force_store_sc0_sc1,
...@@ -2242,6 +2516,7 @@ pub const cpu = struct {...@@ -2242,6 +2516,7 @@ pub const cpu = struct {
2242 .kernarg_preload,2516 .kernarg_preload,
2243 .ldsbankcount32,2517 .ldsbankcount32,
2244 .mai_insts,2518 .mai_insts,
2519 .memory_atomic_fadd_f32_denormal_support,
2245 .packed_fp32_ops,2520 .packed_fp32_ops,
2246 .packed_tid,2521 .packed_tid,
2247 .pk_fmac_f16_inst,2522 .pk_fmac_f16_inst,
...@@ -2252,12 +2527,15 @@ pub const cpu = struct {...@@ -2252,12 +2527,15 @@ pub const cpu = struct {
2252 .name = "gfx942",2527 .name = "gfx942",
2253 .llvm_name = "gfx942",2528 .llvm_name = "gfx942",
2254 .features = featureSet(&[_]Feature{2529 .features = featureSet(&[_]Feature{
2530 .agent_scope_fine_grained_remote_memory_atomics,
2255 .architected_flat_scratch,2531 .architected_flat_scratch,
2256 .atomic_buffer_global_pk_add_f16_insts,2532 .atomic_buffer_global_pk_add_f16_insts,
2257 .atomic_ds_pk_add_16_insts,2533 .atomic_ds_pk_add_16_insts,
2258 .atomic_fadd_no_rtn_insts,2534 .atomic_fadd_no_rtn_insts,
2259 .atomic_fadd_rtn_insts,2535 .atomic_fadd_rtn_insts,
2260 .atomic_flat_pk_add_16_insts,2536 .atomic_flat_pk_add_16_insts,
2537 .atomic_fmin_fmax_flat_f64,
2538 .atomic_fmin_fmax_global_f64,
2261 .atomic_global_pk_add_bf16_inst,2539 .atomic_global_pk_add_bf16_inst,
2262 .back_off_barrier,2540 .back_off_barrier,
2263 .dl_insts,2541 .dl_insts,
...@@ -2271,6 +2549,7 @@ pub const cpu = struct {...@@ -2271,6 +2549,7 @@ pub const cpu = struct {
2271 .dot7_insts,2549 .dot7_insts,
2272 .dpp_64bit,2550 .dpp_64bit,
2273 .flat_atomic_fadd_f32_inst,2551 .flat_atomic_fadd_f32_inst,
2552 .flat_buffer_global_fadd_f64_inst,
2274 .fma_mix_insts,2553 .fma_mix_insts,
2275 .fmacf64_inst,2554 .fmacf64_inst,
2276 .fp8_conversion_insts,2555 .fp8_conversion_insts,
...@@ -2282,12 +2561,28 @@ pub const cpu = struct {...@@ -2282,12 +2561,28 @@ pub const cpu = struct {
2282 .kernarg_preload,2561 .kernarg_preload,
2283 .ldsbankcount32,2562 .ldsbankcount32,
2284 .mai_insts,2563 .mai_insts,
2564 .memory_atomic_fadd_f32_denormal_support,
2285 .packed_fp32_ops,2565 .packed_fp32_ops,
2286 .packed_tid,2566 .packed_tid,
2287 .pk_fmac_f16_inst,2567 .pk_fmac_f16_inst,
2288 .sramecc_support,2568 .sramecc_support,
2289 }),2569 }),
2290 };2570 };
2571 pub const gfx9_generic = CpuModel{
2572 .name = "gfx9_generic",
2573 .llvm_name = "gfx9-generic",
2574 .features = featureSet(&[_]Feature{
2575 .ds_src2_insts,
2576 .extended_image_insts,
2577 .gds,
2578 .gfx9,
2579 .image_gather4_d16_bug,
2580 .image_insts,
2581 .ldsbankcount32,
2582 .mad_mac_f32_insts,
2583 .requires_cov6,
2584 }),
2585 };
2291 pub const hainan = CpuModel{2586 pub const hainan = CpuModel{
2292 .name = "hainan",2587 .name = "hainan",
2293 .llvm_name = "hainan",2588 .llvm_name = "hainan",
lib/std/Target/arm.zig+90-72
...@@ -7,9 +7,7 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,9 +7,7 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 @"32bit",8 @"32bit",
9 @"8msecext",9 @"8msecext",
10 a76,
11 aapcs_frame_chain,10 aapcs_frame_chain,
12 aapcs_frame_chain_leaf,
13 aclass,11 aclass,
14 acquire_release,12 acquire_release,
15 aes,13 aes,
...@@ -40,7 +38,6 @@ pub const Feature = enum {...@@ -40,7 +38,6 @@ pub const Feature = enum {
40 dsp,38 dsp,
41 execute_only,39 execute_only,
42 expand_fp_mlx,40 expand_fp_mlx,
43 exynos,
44 fix_cmse_cve_2021_35465,41 fix_cmse_cve_2021_35465,
45 fix_cortex_a57_aes_1742098,42 fix_cortex_a57_aes_1742098,
46 fp16,43 fp16,
...@@ -96,7 +93,6 @@ pub const Feature = enum {...@@ -96,7 +93,6 @@ pub const Feature = enum {
96 lob,93 lob,
97 long_calls,94 long_calls,
98 loop_align,95 loop_align,
99 m3,
100 mclass,96 mclass,
101 mp,97 mp,
102 muxed_units,98 muxed_units,
...@@ -120,7 +116,6 @@ pub const Feature = enum {...@@ -120,7 +116,6 @@ pub const Feature = enum {
120 prefer_ishst,116 prefer_ishst,
121 prefer_vmovsr,117 prefer_vmovsr,
122 prof_unpr,118 prof_unpr,
123 r4,
124 ras,119 ras,
125 rclass,120 rclass,
126 read_tp_tpidrprw,121 read_tp_tpidrprw,
...@@ -140,7 +135,6 @@ pub const Feature = enum {...@@ -140,7 +135,6 @@ pub const Feature = enum {
140 soft_float,135 soft_float,
141 splat_vfp_neon,136 splat_vfp_neon,
142 strict_align,137 strict_align,
143 swift,
144 thumb2,138 thumb2,
145 thumb_mode,139 thumb_mode,
146 trustzone,140 trustzone,
...@@ -228,23 +222,11 @@ pub const all_features = blk: {...@@ -228,23 +222,11 @@ pub const all_features = blk: {
228 .description = "Enable support for ARMv8-M Security Extensions",222 .description = "Enable support for ARMv8-M Security Extensions",
229 .dependencies = featureSet(&[_]Feature{}),223 .dependencies = featureSet(&[_]Feature{}),
230 };224 };
231 result[@intFromEnum(Feature.a76)] = .{
232 .llvm_name = "a76",
233 .description = "Cortex-A76 ARM processors",
234 .dependencies = featureSet(&[_]Feature{}),
235 };
236 result[@intFromEnum(Feature.aapcs_frame_chain)] = .{225 result[@intFromEnum(Feature.aapcs_frame_chain)] = .{
237 .llvm_name = "aapcs-frame-chain",226 .llvm_name = "aapcs-frame-chain",
238 .description = "Create an AAPCS compliant frame chain",227 .description = "Create an AAPCS compliant frame chain",
239 .dependencies = featureSet(&[_]Feature{}),228 .dependencies = featureSet(&[_]Feature{}),
240 };229 };
241 result[@intFromEnum(Feature.aapcs_frame_chain_leaf)] = .{
242 .llvm_name = "aapcs-frame-chain-leaf",
243 .description = "Create an AAPCS compliant frame chain for leaf functions",
244 .dependencies = featureSet(&[_]Feature{
245 .aapcs_frame_chain,
246 }),
247 };
248 result[@intFromEnum(Feature.aclass)] = .{230 result[@intFromEnum(Feature.aclass)] = .{
249 .llvm_name = "aclass",231 .llvm_name = "aclass",
250 .description = "Is application profile ('A' series)",232 .description = "Is application profile ('A' series)",
...@@ -422,32 +404,9 @@ pub const all_features = blk: {...@@ -422,32 +404,9 @@ pub const all_features = blk: {
422 .description = "Expand VFP/NEON MLA/MLS instructions",404 .description = "Expand VFP/NEON MLA/MLS instructions",
423 .dependencies = featureSet(&[_]Feature{}),405 .dependencies = featureSet(&[_]Feature{}),
424 };406 };
425 result[@intFromEnum(Feature.exynos)] = .{
426 .llvm_name = "exynos",
427 .description = "Samsung Exynos processors",
428 .dependencies = featureSet(&[_]Feature{
429 .crc,
430 .crypto,
431 .expand_fp_mlx,
432 .fuse_aes,
433 .fuse_literals,
434 .hwdiv,
435 .hwdiv_arm,
436 .prof_unpr,
437 .ret_addr_stack,
438 .slow_fp_brcc,
439 .slow_vdup32,
440 .slow_vgetlni32,
441 .slowfpvfmx,
442 .slowfpvmlx,
443 .splat_vfp_neon,
444 .wide_stride_vfp,
445 .zcz,
446 }),
447 };
448 result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{407 result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{
449 .llvm_name = "fix-cmse-cve-2021-35465",408 .llvm_name = "fix-cmse-cve-2021-35465",
450 .description = "Mitigate against the cve-2021-35465 security vulnerability",409 .description = "Mitigate against the cve-2021-35465 security vulnurability",
451 .dependencies = featureSet(&[_]Feature{}),410 .dependencies = featureSet(&[_]Feature{}),
452 };411 };
453 result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{412 result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{
...@@ -815,11 +774,6 @@ pub const all_features = blk: {...@@ -815,11 +774,6 @@ pub const all_features = blk: {
815 .description = "Prefer 32-bit alignment for loops",774 .description = "Prefer 32-bit alignment for loops",
816 .dependencies = featureSet(&[_]Feature{}),775 .dependencies = featureSet(&[_]Feature{}),
817 };776 };
818 result[@intFromEnum(Feature.m3)] = .{
819 .llvm_name = "m3",
820 .description = "Cortex-M3 ARM processors",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823 result[@intFromEnum(Feature.mclass)] = .{777 result[@intFromEnum(Feature.mclass)] = .{
824 .llvm_name = "mclass",778 .llvm_name = "mclass",
825 .description = "Is microcontroller profile ('M' series)",779 .description = "Is microcontroller profile ('M' series)",
...@@ -945,11 +899,6 @@ pub const all_features = blk: {...@@ -945,11 +899,6 @@ pub const all_features = blk: {
945 .description = "Is profitable to unpredicate",899 .description = "Is profitable to unpredicate",
946 .dependencies = featureSet(&[_]Feature{}),900 .dependencies = featureSet(&[_]Feature{}),
947 };901 };
948 result[@intFromEnum(Feature.r4)] = .{
949 .llvm_name = "r4",
950 .description = "Cortex-R4 ARM processors",
951 .dependencies = featureSet(&[_]Feature{}),
952 };
953 result[@intFromEnum(Feature.ras)] = .{902 result[@intFromEnum(Feature.ras)] = .{
954 .llvm_name = "ras",903 .llvm_name = "ras",
955 .description = "Enable Reliability, Availability and Serviceability extensions",904 .description = "Enable Reliability, Availability and Serviceability extensions",
...@@ -1049,11 +998,6 @@ pub const all_features = blk: {...@@ -1049,11 +998,6 @@ pub const all_features = blk: {
1049 .description = "Disallow all unaligned memory access",998 .description = "Disallow all unaligned memory access",
1050 .dependencies = featureSet(&[_]Feature{}),999 .dependencies = featureSet(&[_]Feature{}),
1051 };1000 };
1052 result[@intFromEnum(Feature.swift)] = .{
1053 .llvm_name = "swift",
1054 .description = "Swift ARM processors",
1055 .dependencies = featureSet(&[_]Feature{}),
1056 };
1057 result[@intFromEnum(Feature.thumb2)] = .{1001 result[@intFromEnum(Feature.thumb2)] = .{
1058 .llvm_name = "thumb2",1002 .llvm_name = "thumb2",
1059 .description = "Enable Thumb2 instructions",1003 .description = "Enable Thumb2 instructions",
...@@ -1508,10 +1452,9 @@ pub const all_features = blk: {...@@ -1508,10 +1452,9 @@ pub const all_features = blk: {
1508 .db,1452 .db,
1509 .dfb,1453 .dfb,
1510 .dsp,1454 .dsp,
1511 .fp_armv8,1455 .fp_armv8d16sp,
1512 .has_v8,1456 .has_v8,
1513 .mp,1457 .mp,
1514 .neon,
1515 .rclass,1458 .rclass,
1516 .virtualization,1459 .virtualization,
1517 }),1460 }),
...@@ -2104,7 +2047,6 @@ pub const cpu = struct {...@@ -2104,7 +2047,6 @@ pub const cpu = struct {
2104 .name = "cortex_a76",2047 .name = "cortex_a76",
2105 .llvm_name = "cortex-a76",2048 .llvm_name = "cortex-a76",
2106 .features = featureSet(&[_]Feature{2049 .features = featureSet(&[_]Feature{
2107 .a76,
2108 .dotprod,2050 .dotprod,
2109 .fullfp16,2051 .fullfp16,
2110 .v8_2a,2052 .v8_2a,
...@@ -2114,7 +2056,6 @@ pub const cpu = struct {...@@ -2114,7 +2056,6 @@ pub const cpu = struct {
2114 .name = "cortex_a76ae",2056 .name = "cortex_a76ae",
2115 .llvm_name = "cortex-a76ae",2057 .llvm_name = "cortex-a76ae",
2116 .features = featureSet(&[_]Feature{2058 .features = featureSet(&[_]Feature{
2117 .a76,
2118 .dotprod,2059 .dotprod,
2119 .fullfp16,2060 .fullfp16,
2120 .v8_2a,2061 .v8_2a,
...@@ -2138,6 +2079,15 @@ pub const cpu = struct {...@@ -2138,6 +2079,15 @@ pub const cpu = struct {
2138 .v8_2a,2079 .v8_2a,
2139 }),2080 }),
2140 };2081 };
2082 pub const cortex_a78ae = CpuModel{
2083 .name = "cortex_a78ae",
2084 .llvm_name = "cortex-a78ae",
2085 .features = featureSet(&[_]Feature{
2086 .dotprod,
2087 .fullfp16,
2088 .v8_2a,
2089 }),
2090 };
2141 pub const cortex_a78c = CpuModel{2091 pub const cortex_a78c = CpuModel{
2142 .name = "cortex_a78c",2092 .name = "cortex_a78c",
2143 .llvm_name = "cortex-a78c",2093 .llvm_name = "cortex-a78c",
...@@ -2219,7 +2169,6 @@ pub const cpu = struct {...@@ -2219,7 +2169,6 @@ pub const cpu = struct {
2219 .llvm_name = "cortex-m3",2169 .llvm_name = "cortex-m3",
2220 .features = featureSet(&[_]Feature{2170 .features = featureSet(&[_]Feature{
2221 .loop_align,2171 .loop_align,
2222 .m3,
2223 .no_branch_predictor,2172 .no_branch_predictor,
2224 .use_misched,2173 .use_misched,
2225 .v7m,2174 .v7m,
...@@ -2315,7 +2264,6 @@ pub const cpu = struct {...@@ -2315,7 +2264,6 @@ pub const cpu = struct {
2315 .llvm_name = "cortex-r4",2264 .llvm_name = "cortex-r4",
2316 .features = featureSet(&[_]Feature{2265 .features = featureSet(&[_]Feature{
2317 .avoid_partial_cpsr,2266 .avoid_partial_cpsr,
2318 .r4,
2319 .ret_addr_stack,2267 .ret_addr_stack,
2320 .v7r,2268 .v7r,
2321 }),2269 }),
...@@ -2325,7 +2273,6 @@ pub const cpu = struct {...@@ -2325,7 +2273,6 @@ pub const cpu = struct {
2325 .llvm_name = "cortex-r4f",2273 .llvm_name = "cortex-r4f",
2326 .features = featureSet(&[_]Feature{2274 .features = featureSet(&[_]Feature{
2327 .avoid_partial_cpsr,2275 .avoid_partial_cpsr,
2328 .r4,
2329 .ret_addr_stack,2276 .ret_addr_stack,
2330 .slow_fp_brcc,2277 .slow_fp_brcc,
2331 .slowfpvfmx,2278 .slowfpvfmx,
...@@ -2352,7 +2299,20 @@ pub const cpu = struct {...@@ -2352,7 +2299,20 @@ pub const cpu = struct {
2352 .name = "cortex_r52",2299 .name = "cortex_r52",
2353 .llvm_name = "cortex-r52",2300 .llvm_name = "cortex-r52",
2354 .features = featureSet(&[_]Feature{2301 .features = featureSet(&[_]Feature{
2302 .fp_armv8,
2355 .fpao,2303 .fpao,
2304 .neon,
2305 .use_misched,
2306 .v8r,
2307 }),
2308 };
2309 pub const cortex_r52plus = CpuModel{
2310 .name = "cortex_r52plus",
2311 .llvm_name = "cortex-r52plus",
2312 .features = featureSet(&[_]Feature{
2313 .fp_armv8,
2314 .fpao,
2315 .neon,
2356 .use_misched,2316 .use_misched,
2357 .v8r,2317 .v8r,
2358 }),2318 }),
...@@ -2418,7 +2378,6 @@ pub const cpu = struct {...@@ -2418,7 +2378,6 @@ pub const cpu = struct {
2418 .ret_addr_stack,2378 .ret_addr_stack,
2419 .slowfpvfmx,2379 .slowfpvfmx,
2420 .slowfpvmlx,2380 .slowfpvmlx,
2421 .swift,
2422 .use_misched,2381 .use_misched,
2423 .v8a,2382 .v8a,
2424 .zcz,2383 .zcz,
...@@ -2435,24 +2394,60 @@ pub const cpu = struct {...@@ -2435,24 +2394,60 @@ pub const cpu = struct {
2435 .name = "exynos_m1",2394 .name = "exynos_m1",
2436 .llvm_name = null,2395 .llvm_name = null,
2437 .features = featureSet(&[_]Feature{2396 .features = featureSet(&[_]Feature{
2438 .exynos,2397 .expand_fp_mlx,
2398 .fuse_aes,
2399 .fuse_literals,
2400 .prof_unpr,
2401 .ret_addr_stack,
2402 .slow_fp_brcc,
2403 .slow_vdup32,
2404 .slow_vgetlni32,
2405 .slowfpvfmx,
2406 .slowfpvmlx,
2407 .splat_vfp_neon,
2439 .v8a,2408 .v8a,
2409 .wide_stride_vfp,
2410 .zcz,
2440 }),2411 }),
2441 };2412 };
2442 pub const exynos_m2 = CpuModel{2413 pub const exynos_m2 = CpuModel{
2443 .name = "exynos_m2",2414 .name = "exynos_m2",
2444 .llvm_name = null,2415 .llvm_name = null,
2445 .features = featureSet(&[_]Feature{2416 .features = featureSet(&[_]Feature{
2446 .exynos,2417 .expand_fp_mlx,
2418 .fuse_aes,
2419 .fuse_literals,
2420 .prof_unpr,
2421 .ret_addr_stack,
2422 .slow_fp_brcc,
2423 .slow_vdup32,
2424 .slow_vgetlni32,
2425 .slowfpvfmx,
2426 .slowfpvmlx,
2427 .splat_vfp_neon,
2447 .v8a,2428 .v8a,
2429 .wide_stride_vfp,
2430 .zcz,
2448 }),2431 }),
2449 };2432 };
2450 pub const exynos_m3 = CpuModel{2433 pub const exynos_m3 = CpuModel{
2451 .name = "exynos_m3",2434 .name = "exynos_m3",
2452 .llvm_name = "exynos-m3",2435 .llvm_name = "exynos-m3",
2453 .features = featureSet(&[_]Feature{2436 .features = featureSet(&[_]Feature{
2454 .exynos,2437 .expand_fp_mlx,
2438 .fuse_aes,
2439 .fuse_literals,
2440 .prof_unpr,
2441 .ret_addr_stack,
2442 .slow_fp_brcc,
2443 .slow_vdup32,
2444 .slow_vgetlni32,
2445 .slowfpvfmx,
2446 .slowfpvmlx,
2447 .splat_vfp_neon,
2455 .v8a,2448 .v8a,
2449 .wide_stride_vfp,
2450 .zcz,
2456 }),2451 }),
2457 };2452 };
2458 pub const exynos_m4 = CpuModel{2453 pub const exynos_m4 = CpuModel{
...@@ -2460,9 +2455,21 @@ pub const cpu = struct {...@@ -2460,9 +2455,21 @@ pub const cpu = struct {
2460 .llvm_name = "exynos-m4",2455 .llvm_name = "exynos-m4",
2461 .features = featureSet(&[_]Feature{2456 .features = featureSet(&[_]Feature{
2462 .dotprod,2457 .dotprod,
2463 .exynos,2458 .expand_fp_mlx,
2464 .fullfp16,2459 .fullfp16,
2460 .fuse_aes,
2461 .fuse_literals,
2462 .prof_unpr,
2463 .ret_addr_stack,
2464 .slow_fp_brcc,
2465 .slow_vdup32,
2466 .slow_vgetlni32,
2467 .slowfpvfmx,
2468 .slowfpvmlx,
2469 .splat_vfp_neon,
2465 .v8_2a,2470 .v8_2a,
2471 .wide_stride_vfp,
2472 .zcz,
2466 }),2473 }),
2467 };2474 };
2468 pub const exynos_m5 = CpuModel{2475 pub const exynos_m5 = CpuModel{
...@@ -2470,9 +2477,21 @@ pub const cpu = struct {...@@ -2470,9 +2477,21 @@ pub const cpu = struct {
2470 .llvm_name = "exynos-m5",2477 .llvm_name = "exynos-m5",
2471 .features = featureSet(&[_]Feature{2478 .features = featureSet(&[_]Feature{
2472 .dotprod,2479 .dotprod,
2473 .exynos,2480 .expand_fp_mlx,
2474 .fullfp16,2481 .fullfp16,
2482 .fuse_aes,
2483 .fuse_literals,
2484 .prof_unpr,
2485 .ret_addr_stack,
2486 .slow_fp_brcc,
2487 .slow_vdup32,
2488 .slow_vgetlni32,
2489 .slowfpvfmx,
2490 .slowfpvmlx,
2491 .splat_vfp_neon,
2475 .v8_2a,2492 .v8_2a,
2493 .wide_stride_vfp,
2494 .zcz,
2476 }),2495 }),
2477 };2496 };
2478 pub const generic = CpuModel{2497 pub const generic = CpuModel{
...@@ -2538,6 +2557,7 @@ pub const cpu = struct {...@@ -2538,6 +2557,7 @@ pub const cpu = struct {
2538 .llvm_name = "neoverse-n2",2557 .llvm_name = "neoverse-n2",
2539 .features = featureSet(&[_]Feature{2558 .features = featureSet(&[_]Feature{
2540 .bf16,2559 .bf16,
2560 .fp16fml,
2541 .i8mm,2561 .i8mm,
2542 .v9a,2562 .v9a,
2543 }),2563 }),
...@@ -2564,7 +2584,6 @@ pub const cpu = struct {...@@ -2564,7 +2584,6 @@ pub const cpu = struct {
2564 .name = "sc300",2584 .name = "sc300",
2565 .llvm_name = "sc300",2585 .llvm_name = "sc300",
2566 .features = featureSet(&[_]Feature{2586 .features = featureSet(&[_]Feature{
2567 .m3,
2568 .no_branch_predictor,2587 .no_branch_predictor,
2569 .use_misched,2588 .use_misched,
2570 .v7m,2589 .v7m,
...@@ -2618,7 +2637,6 @@ pub const cpu = struct {...@@ -2618,7 +2637,6 @@ pub const cpu = struct {
2618 .slow_vgetlni32,2637 .slow_vgetlni32,
2619 .slowfpvfmx,2638 .slowfpvfmx,
2620 .slowfpvmlx,2639 .slowfpvmlx,
2621 .swift,
2622 .use_misched,2640 .use_misched,
2623 .v7a,2641 .v7a,
2624 .vfp4,2642 .vfp4,
lib/std/Target/loongarch.zig+18-6
...@@ -7,7 +7,6 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,7 +7,6 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 @"32bit",8 @"32bit",
9 @"64bit",9 @"64bit",
10 auto_vec,
11 d,10 d,
12 f,11 f,
13 frecipe,12 frecipe,
...@@ -18,6 +17,7 @@ pub const Feature = enum {...@@ -18,6 +17,7 @@ pub const Feature = enum {
18 lbt,17 lbt,
19 lsx,18 lsx,
20 lvz,19 lvz,
20 prefer_w_inst,
21 relax,21 relax,
22 ual,22 ual,
23};23};
...@@ -41,11 +41,6 @@ pub const all_features = blk: {...@@ -41,11 +41,6 @@ pub const all_features = blk: {
41 .description = "LA64 Basic Integer and Privilege Instruction Set",41 .description = "LA64 Basic Integer and Privilege Instruction Set",
42 .dependencies = featureSet(&[_]Feature{}),42 .dependencies = featureSet(&[_]Feature{}),
43 };43 };
44 result[@intFromEnum(Feature.auto_vec)] = .{
45 .llvm_name = "auto-vec",
46 .description = "Experimental auto vectorization",
47 .dependencies = featureSet(&[_]Feature{}),
48 };
49 result[@intFromEnum(Feature.d)] = .{44 result[@intFromEnum(Feature.d)] = .{
50 .llvm_name = "d",45 .llvm_name = "d",
51 .description = "'D' (Double-Precision Floating-Point)",46 .description = "'D' (Double-Precision Floating-Point)",
...@@ -102,6 +97,11 @@ pub const all_features = blk: {...@@ -102,6 +97,11 @@ pub const all_features = blk: {
102 .description = "'LVZ' (Loongson Virtualization Extension)",97 .description = "'LVZ' (Loongson Virtualization Extension)",
103 .dependencies = featureSet(&[_]Feature{}),98 .dependencies = featureSet(&[_]Feature{}),
104 };99 };
100 result[@intFromEnum(Feature.prefer_w_inst)] = .{
101 .llvm_name = "prefer-w-inst",
102 .description = "Prefer instructions with W suffix",
103 .dependencies = featureSet(&[_]Feature{}),
104 };
105 result[@intFromEnum(Feature.relax)] = .{105 result[@intFromEnum(Feature.relax)] = .{
106 .llvm_name = "relax",106 .llvm_name = "relax",
107 .description = "Enable Linker relaxation",107 .description = "Enable Linker relaxation",
...@@ -152,6 +152,18 @@ pub const cpu = struct {...@@ -152,6 +152,18 @@ pub const cpu = struct {
152 .ual,152 .ual,
153 }),153 }),
154 };154 };
155 pub const la664 = CpuModel{
156 .name = "la664",
157 .llvm_name = "la664",
158 .features = featureSet(&[_]Feature{
159 .@"64bit",
160 .frecipe,
161 .lasx,
162 .lbt,
163 .lvz,
164 .ual,
165 }),
166 };
155 pub const loongarch64 = CpuModel{167 pub const loongarch64 = CpuModel{
156 .name = "loongarch64",168 .name = "loongarch64",
157 .llvm_name = "loongarch64",169 .llvm_name = "loongarch64",
lib/std/Target/mips.zig+6
...@@ -51,6 +51,7 @@ pub const Feature = enum {...@@ -51,6 +51,7 @@ pub const Feature = enum {
51 ptr64,51 ptr64,
52 single_float,52 single_float,
53 soft_float,53 soft_float,
54 strict_align,
54 sym32,55 sym32,
55 use_indirect_jump_hazard,56 use_indirect_jump_hazard,
56 use_tcc_in_div,57 use_tcc_in_div,
...@@ -356,6 +357,11 @@ pub const all_features = blk: {...@@ -356,6 +357,11 @@ pub const all_features = blk: {
356 .description = "Does not support floating point instructions",357 .description = "Does not support floating point instructions",
357 .dependencies = featureSet(&[_]Feature{}),358 .dependencies = featureSet(&[_]Feature{}),
358 };359 };
360 result[@intFromEnum(Feature.strict_align)] = .{
361 .llvm_name = "strict-align",
362 .description = "Disable unaligned load store for r6",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
359 result[@intFromEnum(Feature.sym32)] = .{365 result[@intFromEnum(Feature.sym32)] = .{
360 .llvm_name = "sym32",366 .llvm_name = "sym32",
361 .description = "Symbols are 32 bit on Mips64",367 .description = "Symbols are 32 bit on Mips64",
lib/std/Target/nvptx.zig+18
...@@ -13,6 +13,7 @@ pub const Feature = enum {...@@ -13,6 +13,7 @@ pub const Feature = enum {
13 ptx50,13 ptx50,
14 ptx60,14 ptx60,
15 ptx61,15 ptx61,
16 ptx62,
16 ptx63,17 ptx63,
17 ptx64,18 ptx64,
18 ptx65,19 ptx65,
...@@ -29,6 +30,8 @@ pub const Feature = enum {...@@ -29,6 +30,8 @@ pub const Feature = enum {
29 ptx81,30 ptx81,
30 ptx82,31 ptx82,
31 ptx83,32 ptx83,
33 ptx84,
34 ptx85,
32 sm_20,35 sm_20,
33 sm_21,36 sm_21,
34 sm_30,37 sm_30,
...@@ -101,6 +104,11 @@ pub const all_features = blk: {...@@ -101,6 +104,11 @@ pub const all_features = blk: {
101 .description = "Use PTX version 61",104 .description = "Use PTX version 61",
102 .dependencies = featureSet(&[_]Feature{}),105 .dependencies = featureSet(&[_]Feature{}),
103 };106 };
107 result[@intFromEnum(Feature.ptx62)] = .{
108 .llvm_name = "ptx62",
109 .description = "Use PTX version 62",
110 .dependencies = featureSet(&[_]Feature{}),
111 };
104 result[@intFromEnum(Feature.ptx63)] = .{112 result[@intFromEnum(Feature.ptx63)] = .{
105 .llvm_name = "ptx63",113 .llvm_name = "ptx63",
106 .description = "Use PTX version 63",114 .description = "Use PTX version 63",
...@@ -181,6 +189,16 @@ pub const all_features = blk: {...@@ -181,6 +189,16 @@ pub const all_features = blk: {
181 .description = "Use PTX version 83",189 .description = "Use PTX version 83",
182 .dependencies = featureSet(&[_]Feature{}),190 .dependencies = featureSet(&[_]Feature{}),
183 };191 };
192 result[@intFromEnum(Feature.ptx84)] = .{
193 .llvm_name = "ptx84",
194 .description = "Use PTX version 84",
195 .dependencies = featureSet(&[_]Feature{}),
196 };
197 result[@intFromEnum(Feature.ptx85)] = .{
198 .llvm_name = "ptx85",
199 .description = "Use PTX version 85",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
184 result[@intFromEnum(Feature.sm_20)] = .{202 result[@intFromEnum(Feature.sm_20)] = .{
185 .llvm_name = "sm_20",203 .llvm_name = "sm_20",
186 .description = "Target SM 20",204 .description = "Target SM 20",
lib/std/Target/powerpc.zig+61-2
...@@ -8,6 +8,8 @@ pub const Feature = enum {...@@ -8,6 +8,8 @@ pub const Feature = enum {
8 @"64bit",8 @"64bit",
9 @"64bitregs",9 @"64bitregs",
10 aix,10 aix,
11 aix_shared_lib_tls_model_opt,
12 aix_small_local_dynamic_tls,
11 aix_small_local_exec_tls,13 aix_small_local_exec_tls,
12 allow_unaligned_fp_access,14 allow_unaligned_fp_access,
13 altivec,15 altivec,
...@@ -113,6 +115,16 @@ pub const all_features = blk: {...@@ -113,6 +115,16 @@ pub const all_features = blk: {
113 .description = "AIX OS",115 .description = "AIX OS",
114 .dependencies = featureSet(&[_]Feature{}),116 .dependencies = featureSet(&[_]Feature{}),
115 };117 };
118 result[@intFromEnum(Feature.aix_shared_lib_tls_model_opt)] = .{
119 .llvm_name = "aix-shared-lib-tls-model-opt",
120 .description = "Tune TLS model at function level in shared library loaded with the main program (for 64-bit AIX only)",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@intFromEnum(Feature.aix_small_local_dynamic_tls)] = .{
124 .llvm_name = "aix-small-local-dynamic-tls",
125 .description = "Produce a faster local-dynamic TLS sequence for this function for 64-bit AIX",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
116 result[@intFromEnum(Feature.aix_small_local_exec_tls)] = .{128 result[@intFromEnum(Feature.aix_small_local_exec_tls)] = .{
117 .llvm_name = "aix-small-local-exec-tls",129 .llvm_name = "aix-small-local-exec-tls",
118 .description = "Produce a TOC-free local-exec TLS sequence for this function for 64-bit AIX",130 .description = "Produce a TOC-free local-exec TLS sequence for this function for 64-bit AIX",
...@@ -538,8 +550,7 @@ pub const all_features = blk: {...@@ -538,8 +550,7 @@ pub const all_features = blk: {
538 .llvm_name = "prefix-instrs",550 .llvm_name = "prefix-instrs",
539 .description = "Enable prefixed instructions",551 .description = "Enable prefixed instructions",
540 .dependencies = featureSet(&[_]Feature{552 .dependencies = featureSet(&[_]Feature{
541 .power8_vector,553 .isa_v31_instructions,
542 .power9_altivec,
543 }),554 }),
544 };555 };
545 result[@intFromEnum(Feature.privileged)] = .{556 result[@intFromEnum(Feature.privileged)] = .{
...@@ -990,6 +1001,54 @@ pub const cpu = struct {...@@ -990,6 +1001,54 @@ pub const cpu = struct {
990 .two_const_nr,1001 .two_const_nr,
991 }),1002 }),
992 };1003 };
1004 pub const pwr11 = CpuModel{
1005 .name = "pwr11",
1006 .llvm_name = "pwr11",
1007 .features = featureSet(&[_]Feature{
1008 .@"64bit",
1009 .allow_unaligned_fp_access,
1010 .bpermd,
1011 .cmpb,
1012 .crbits,
1013 .crypto,
1014 .direct_move,
1015 .extdiv,
1016 .fast_MFLR,
1017 .fcpsgn,
1018 .fpcvt,
1019 .fprnd,
1020 .fre,
1021 .fres,
1022 .frsqrte,
1023 .frsqrtes,
1024 .fsqrt,
1025 .fuse_add_logical,
1026 .fuse_arith_add,
1027 .fuse_logical,
1028 .fuse_logical_add,
1029 .fuse_sha3,
1030 .fuse_store,
1031 .htm,
1032 .icbt,
1033 .isa_v206_instructions,
1034 .isel,
1035 .ldbrx,
1036 .lfiwax,
1037 .mfocrf,
1038 .mma,
1039 .partword_atomics,
1040 .pcrelative_memops,
1041 .popcntd,
1042 .power10_vector,
1043 .ppc_postra_sched,
1044 .ppc_prera_sched,
1045 .predictable_select_expensive,
1046 .quadword_atomics,
1047 .recipprec,
1048 .stfiwx,
1049 .two_const_nr,
1050 }),
1051 };
993 pub const pwr3 = CpuModel{1052 pub const pwr3 = CpuModel{
994 .name = "pwr3",1053 .name = "pwr3",
995 .llvm_name = "pwr3",1054 .llvm_name = "pwr3",
lib/std/Target/riscv.zig+798-76
...@@ -9,32 +9,43 @@ pub const Feature = enum {...@@ -9,32 +9,43 @@ pub const Feature = enum {
9 @"64bit",9 @"64bit",
10 a,10 a,
11 auipc_addi_fusion,11 auipc_addi_fusion,
12 b,
12 c,13 c,
13 conditional_cmv_fusion,14 conditional_cmv_fusion,
14 d,15 d,
15 dlen_factor_2,16 dlen_factor_2,
16 e,17 e,
17 experimental,18 experimental,
19 experimental_rva23s64,
20 experimental_rva23u64,
21 experimental_rvb23s64,
22 experimental_rvb23u64,
23 experimental_rvm23u32,
24 experimental_smmpm,
25 experimental_smnpm,
26 experimental_ssnpm,
27 experimental_sspm,
28 experimental_ssqosid,
29 experimental_supm,
18 experimental_zacas,30 experimental_zacas,
19 experimental_zcmop,31 experimental_zalasr,
20 experimental_zfbfmin,
21 experimental_zicfilp,32 experimental_zicfilp,
22 experimental_zicfiss,33 experimental_zicfiss,
23 experimental_zimop,
24 experimental_ztso,
25 experimental_zvfbfmin,
26 experimental_zvfbfwma,
27 f,34 f,
28 fast_unaligned_access,
29 forced_atomics,35 forced_atomics,
36 forced_sw_shadow_stack,
30 h,37 h,
31 i,38 i,
32 ld_add_fusion,39 ld_add_fusion,
33 lui_addi_fusion,40 lui_addi_fusion,
34 m,41 m,
35 no_default_unroll,42 no_default_unroll,
36 no_optimized_zero_stride_load,
37 no_rvc_hints,43 no_rvc_hints,
44 no_sink_splat_operands,
45 no_trailing_seq_cst_fence,
46 optimized_zero_stride_load,
47 predictable_select_expensive,
48 prefer_w_inst,
38 relax,49 relax,
39 reserve_x1,50 reserve_x1,
40 reserve_x10,51 reserve_x10,
...@@ -67,18 +78,47 @@ pub const Feature = enum {...@@ -67,18 +78,47 @@ pub const Feature = enum {
67 reserve_x7,78 reserve_x7,
68 reserve_x8,79 reserve_x8,
69 reserve_x9,80 reserve_x9,
81 rva20s64,
82 rva20u64,
83 rva22s64,
84 rva22u64,
85 rvi20u32,
86 rvi20u64,
70 save_restore,87 save_restore,
71 seq_cst_trailing_fence,88 shcounterenw,
89 shgatpa,
72 shifted_zextw_fusion,90 shifted_zextw_fusion,
73 short_forward_branch_opt,91 short_forward_branch_opt,
92 shtvala,
93 shvsatpa,
94 shvstvala,
95 shvstvecd,
74 smaia,96 smaia,
97 smcdeleg,
98 smcsrind,
75 smepmp,99 smepmp,
100 smstateen,
76 ssaia,101 ssaia,
102 ssccfg,
103 ssccptr,
104 sscofpmf,
105 sscounterenw,
106 sscsrind,
107 ssstateen,
108 ssstrict,
109 sstc,
110 sstvala,
111 sstvecd,
112 ssu64xl,
113 svade,
114 svadu,
115 svbare,
77 svinval,116 svinval,
78 svnapot,117 svnapot,
79 svpbmt,118 svpbmt,
80 tagged_globals,119 tagged_globals,
81 unaligned_scalar_mem,120 unaligned_scalar_mem,
121 unaligned_vector_mem,
82 use_postra_scheduler,122 use_postra_scheduler,
83 v,123 v,
84 ventana_veyron,124 ventana_veyron,
...@@ -89,11 +129,14 @@ pub const Feature = enum {...@@ -89,11 +129,14 @@ pub const Feature = enum {
89 xcvmac,129 xcvmac,
90 xcvmem,130 xcvmem,
91 xcvsimd,131 xcvsimd,
132 xsfcease,
92 xsfvcp,133 xsfvcp,
93 xsfvfnrclipxfqf,134 xsfvfnrclipxfqf,
94 xsfvfwmaccqqq,135 xsfvfwmaccqqq,
95 xsfvqmaccdod,136 xsfvqmaccdod,
96 xsfvqmaccqoq,137 xsfvqmaccqoq,
138 xsifivecdiscarddlone,
139 xsifivecflushdlone,
97 xtheadba,140 xtheadba,
98 xtheadbb,141 xtheadbb,
99 xtheadbs,142 xtheadbs,
...@@ -106,8 +149,13 @@ pub const Feature = enum {...@@ -106,8 +149,13 @@ pub const Feature = enum {
106 xtheadsync,149 xtheadsync,
107 xtheadvdot,150 xtheadvdot,
108 xventanacondops,151 xventanacondops,
152 xwchc,
109 za128rs,153 za128rs,
110 za64rs,154 za64rs,
155 zaamo,
156 zabha,
157 zalrsc,
158 zama16b,
111 zawrs,159 zawrs,
112 zba,160 zba,
113 zbb,161 zbb,
...@@ -121,12 +169,14 @@ pub const Feature = enum {...@@ -121,12 +169,14 @@ pub const Feature = enum {
121 zcd,169 zcd,
122 zce,170 zce,
123 zcf,171 zcf,
172 zcmop,
124 zcmp,173 zcmp,
125 zcmt,174 zcmt,
126 zdinx,175 zdinx,
127 zexth_fusion,176 zexth_fusion,
128 zextw_fusion,177 zextw_fusion,
129 zfa,178 zfa,
179 zfbfmin,
130 zfh,180 zfh,
131 zfhmin,181 zfhmin,
132 zfinx,182 zfinx,
...@@ -147,6 +197,7 @@ pub const Feature = enum {...@@ -147,6 +197,7 @@ pub const Feature = enum {
147 zihintntl,197 zihintntl,
148 zihintpause,198 zihintpause,
149 zihpm,199 zihpm,
200 zimop,
150 zk,201 zk,
151 zkn,202 zkn,
152 zknd,203 zknd,
...@@ -158,6 +209,7 @@ pub const Feature = enum {...@@ -158,6 +209,7 @@ pub const Feature = enum {
158 zksh,209 zksh,
159 zkt,210 zkt,
160 zmmul,211 zmmul,
212 ztso,
161 zvbb,213 zvbb,
162 zvbc,214 zvbc,
163 zve32f,215 zve32f,
...@@ -165,6 +217,8 @@ pub const Feature = enum {...@@ -165,6 +217,8 @@ pub const Feature = enum {
165 zve64d,217 zve64d,
166 zve64f,218 zve64f,
167 zve64x,219 zve64x,
220 zvfbfmin,
221 zvfbfwma,
168 zvfh,222 zvfh,
169 zvfhmin,223 zvfhmin,
170 zvkb,224 zvkb,
...@@ -201,6 +255,7 @@ pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;...@@ -201,6 +255,7 @@ pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
201pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;255pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
202256
203pub const all_features = blk: {257pub const all_features = blk: {
258 @setEvalBranchQuota(2000);
204 const len = @typeInfo(Feature).@"enum".fields.len;259 const len = @typeInfo(Feature).@"enum".fields.len;
205 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);260 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
206 var result: [len]CpuFeature = undefined;261 var result: [len]CpuFeature = undefined;
...@@ -224,6 +279,15 @@ pub const all_features = blk: {...@@ -224,6 +279,15 @@ pub const all_features = blk: {
224 .description = "Enable AUIPC+ADDI macrofusion",279 .description = "Enable AUIPC+ADDI macrofusion",
225 .dependencies = featureSet(&[_]Feature{}),280 .dependencies = featureSet(&[_]Feature{}),
226 };281 };
282 result[@intFromEnum(Feature.b)] = .{
283 .llvm_name = "b",
284 .description = "'B' (the collection of the Zba, Zbb, Zbs extensions)",
285 .dependencies = featureSet(&[_]Feature{
286 .zba,
287 .zbb,
288 .zbs,
289 }),
290 };
227 result[@intFromEnum(Feature.c)] = .{291 result[@intFromEnum(Feature.c)] = .{
228 .llvm_name = "c",292 .llvm_name = "c",
229 .description = "'C' (Compressed Instructions)",293 .description = "'C' (Compressed Instructions)",
...@@ -256,61 +320,261 @@ pub const all_features = blk: {...@@ -256,61 +320,261 @@ pub const all_features = blk: {
256 .description = "Experimental intrinsics",320 .description = "Experimental intrinsics",
257 .dependencies = featureSet(&[_]Feature{}),321 .dependencies = featureSet(&[_]Feature{}),
258 };322 };
259 result[@intFromEnum(Feature.experimental_zacas)] = .{323 result[@intFromEnum(Feature.experimental_rva23s64)] = .{
260 .llvm_name = "experimental-zacas",324 .llvm_name = "experimental-rva23s64",
261 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",325 .description = "RISC-V experimental-rva23s64 profile",
262 .dependencies = featureSet(&[_]Feature{}),326 .dependencies = featureSet(&[_]Feature{
327 .@"64bit",
328 .a,
329 .c,
330 .experimental_ssnpm,
331 .h,
332 .i,
333 .m,
334 .shcounterenw,
335 .shgatpa,
336 .shtvala,
337 .shvsatpa,
338 .shvstvala,
339 .shvstvecd,
340 .ssccptr,
341 .sscofpmf,
342 .sscounterenw,
343 .ssstateen,
344 .sstc,
345 .sstvala,
346 .sstvecd,
347 .ssu64xl,
348 .svade,
349 .svbare,
350 .svinval,
351 .svnapot,
352 .svpbmt,
353 .v,
354 .za64rs,
355 .zawrs,
356 .zba,
357 .zbb,
358 .zbs,
359 .zcb,
360 .zcmop,
361 .zfa,
362 .zfhmin,
363 .zic64b,
364 .zicbom,
365 .zicbop,
366 .zicboz,
367 .ziccamoa,
368 .ziccif,
369 .zicclsm,
370 .ziccrse,
371 .zicntr,
372 .zicond,
373 .zifencei,
374 .zihintntl,
375 .zihintpause,
376 .zihpm,
377 .zimop,
378 .zkt,
379 .zvbb,
380 .zvfhmin,
381 .zvkt,
382 }),
263 };383 };
264 result[@intFromEnum(Feature.experimental_zcmop)] = .{384 result[@intFromEnum(Feature.experimental_rva23u64)] = .{
265 .llvm_name = "experimental-zcmop",385 .llvm_name = "experimental-rva23u64",
266 .description = "'Zcmop' (Compressed May-Be-Operations)",386 .description = "RISC-V experimental-rva23u64 profile",
267 .dependencies = featureSet(&[_]Feature{387 .dependencies = featureSet(&[_]Feature{
268 .zca,388 .@"64bit",
389 .a,
390 .c,
391 .i,
392 .m,
393 .v,
394 .za64rs,
395 .zawrs,
396 .zba,
397 .zbb,
398 .zbs,
399 .zcb,
400 .zcmop,
401 .zfa,
402 .zfhmin,
403 .zic64b,
404 .zicbom,
405 .zicbop,
406 .zicboz,
407 .ziccamoa,
408 .ziccif,
409 .zicclsm,
410 .ziccrse,
411 .zicntr,
412 .zicond,
413 .zihintntl,
414 .zihintpause,
415 .zihpm,
416 .zimop,
417 .zkt,
418 .zvbb,
419 .zvfhmin,
420 .zvkt,
269 }),421 }),
270 };422 };
271 result[@intFromEnum(Feature.experimental_zfbfmin)] = .{423 result[@intFromEnum(Feature.experimental_rvb23s64)] = .{
272 .llvm_name = "experimental-zfbfmin",424 .llvm_name = "experimental-rvb23s64",
273 .description = "'Zfbfmin' (Scalar BF16 Converts)",425 .description = "RISC-V experimental-rvb23s64 profile",
274 .dependencies = featureSet(&[_]Feature{426 .dependencies = featureSet(&[_]Feature{
275 .f,427 .@"64bit",
428 .a,
429 .c,
430 .d,
431 .i,
432 .m,
433 .ssccptr,
434 .sscofpmf,
435 .sscounterenw,
436 .sstc,
437 .sstvala,
438 .sstvecd,
439 .ssu64xl,
440 .svade,
441 .svbare,
442 .svinval,
443 .svnapot,
444 .svpbmt,
445 .za64rs,
446 .zawrs,
447 .zba,
448 .zbb,
449 .zbs,
450 .zcb,
451 .zcmop,
452 .zfa,
453 .zic64b,
454 .zicbom,
455 .zicbop,
456 .zicboz,
457 .ziccamoa,
458 .ziccif,
459 .zicclsm,
460 .ziccrse,
461 .zicntr,
462 .zicond,
463 .zifencei,
464 .zihintntl,
465 .zihintpause,
466 .zihpm,
467 .zimop,
468 .zkt,
276 }),469 }),
277 };470 };
278 result[@intFromEnum(Feature.experimental_zicfilp)] = .{471 result[@intFromEnum(Feature.experimental_rvb23u64)] = .{
279 .llvm_name = "experimental-zicfilp",472 .llvm_name = "experimental-rvb23u64",
280 .description = "'Zicfilp' (Landing pad)",473 .description = "RISC-V experimental-rvb23u64 profile",
281 .dependencies = featureSet(&[_]Feature{}),474 .dependencies = featureSet(&[_]Feature{
475 .@"64bit",
476 .a,
477 .c,
478 .d,
479 .i,
480 .m,
481 .za64rs,
482 .zawrs,
483 .zba,
484 .zbb,
485 .zbs,
486 .zcb,
487 .zcmop,
488 .zfa,
489 .zic64b,
490 .zicbom,
491 .zicbop,
492 .zicboz,
493 .ziccamoa,
494 .ziccif,
495 .zicclsm,
496 .ziccrse,
497 .zicntr,
498 .zicond,
499 .zihintntl,
500 .zihintpause,
501 .zihpm,
502 .zimop,
503 .zkt,
504 }),
282 };505 };
283 result[@intFromEnum(Feature.experimental_zicfiss)] = .{506 result[@intFromEnum(Feature.experimental_rvm23u32)] = .{
284 .llvm_name = "experimental-zicfiss",507 .llvm_name = "experimental-rvm23u32",
285 .description = "'Zicfiss' (Shadow stack)",508 .description = "RISC-V experimental-rvm23u32 profile",
286 .dependencies = featureSet(&[_]Feature{509 .dependencies = featureSet(&[_]Feature{
287 .experimental_zimop,510 .@"32bit",
288 .zicsr,511 .i,
512 .m,
513 .zba,
514 .zbb,
515 .zbs,
516 .zce,
517 .zcmop,
518 .zicbop,
519 .zicond,
520 .zihintntl,
521 .zihintpause,
522 .zimop,
289 }),523 }),
290 };524 };
291 result[@intFromEnum(Feature.experimental_zimop)] = .{525 result[@intFromEnum(Feature.experimental_smmpm)] = .{
292 .llvm_name = "experimental-zimop",526 .llvm_name = "experimental-smmpm",
293 .description = "'Zimop' (May-Be-Operations)",527 .description = "'Smmpm' (Machine-level Pointer Masking for M-mode)",
294 .dependencies = featureSet(&[_]Feature{}),528 .dependencies = featureSet(&[_]Feature{}),
295 };529 };
296 result[@intFromEnum(Feature.experimental_ztso)] = .{530 result[@intFromEnum(Feature.experimental_smnpm)] = .{
297 .llvm_name = "experimental-ztso",531 .llvm_name = "experimental-smnpm",
298 .description = "'Ztso' (Memory Model - Total Store Order)",532 .description = "'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)",
299 .dependencies = featureSet(&[_]Feature{}),533 .dependencies = featureSet(&[_]Feature{}),
300 };534 };
301 result[@intFromEnum(Feature.experimental_zvfbfmin)] = .{535 result[@intFromEnum(Feature.experimental_ssnpm)] = .{
302 .llvm_name = "experimental-zvfbfmin",536 .llvm_name = "experimental-ssnpm",
303 .description = "'Zvbfmin' (Vector BF16 Converts)",537 .description = "'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)",
538 .dependencies = featureSet(&[_]Feature{}),
539 };
540 result[@intFromEnum(Feature.experimental_sspm)] = .{
541 .llvm_name = "experimental-sspm",
542 .description = "'Sspm' (Indicates Supervisor-mode Pointer Masking)",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@intFromEnum(Feature.experimental_ssqosid)] = .{
546 .llvm_name = "experimental-ssqosid",
547 .description = "'Ssqosid' (Quality-of-Service (QoS) Identifiers)",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@intFromEnum(Feature.experimental_supm)] = .{
551 .llvm_name = "experimental-supm",
552 .description = "'Supm' (Indicates User-mode Pointer Masking)",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@intFromEnum(Feature.experimental_zacas)] = .{
556 .llvm_name = "experimental-zacas",
557 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",
558 .dependencies = featureSet(&[_]Feature{}),
559 };
560 result[@intFromEnum(Feature.experimental_zalasr)] = .{
561 .llvm_name = "experimental-zalasr",
562 .description = "'Zalasr' (Load-Acquire and Store-Release Instructions)",
563 .dependencies = featureSet(&[_]Feature{}),
564 };
565 result[@intFromEnum(Feature.experimental_zicfilp)] = .{
566 .llvm_name = "experimental-zicfilp",
567 .description = "'Zicfilp' (Landing pad)",
304 .dependencies = featureSet(&[_]Feature{568 .dependencies = featureSet(&[_]Feature{
305 .zve32f,569 .zicsr,
306 }),570 }),
307 };571 };
308 result[@intFromEnum(Feature.experimental_zvfbfwma)] = .{572 result[@intFromEnum(Feature.experimental_zicfiss)] = .{
309 .llvm_name = "experimental-zvfbfwma",573 .llvm_name = "experimental-zicfiss",
310 .description = "'Zvfbfwma' (Vector BF16 widening mul-add)",574 .description = "'Zicfiss' (Shadow stack)",
311 .dependencies = featureSet(&[_]Feature{575 .dependencies = featureSet(&[_]Feature{
312 .experimental_zfbfmin,576 .zicsr,
313 .experimental_zvfbfmin,577 .zimop,
314 }),578 }),
315 };579 };
316 result[@intFromEnum(Feature.f)] = .{580 result[@intFromEnum(Feature.f)] = .{
...@@ -320,16 +584,16 @@ pub const all_features = blk: {...@@ -320,16 +584,16 @@ pub const all_features = blk: {
320 .zicsr,584 .zicsr,
321 }),585 }),
322 };586 };
323 result[@intFromEnum(Feature.fast_unaligned_access)] = .{
324 .llvm_name = "fast-unaligned-access",
325 .description = "Has reasonably performant unaligned loads and stores (both scalar and vector)",
326 .dependencies = featureSet(&[_]Feature{}),
327 };
328 result[@intFromEnum(Feature.forced_atomics)] = .{587 result[@intFromEnum(Feature.forced_atomics)] = .{
329 .llvm_name = "forced-atomics",588 .llvm_name = "forced-atomics",
330 .description = "Assume that lock-free native-width atomics are available",589 .description = "Assume that lock-free native-width atomics are available",
331 .dependencies = featureSet(&[_]Feature{}),590 .dependencies = featureSet(&[_]Feature{}),
332 };591 };
592 result[@intFromEnum(Feature.forced_sw_shadow_stack)] = .{
593 .llvm_name = "forced-sw-shadow-stack",
594 .description = "Implement shadow stack with software.",
595 .dependencies = featureSet(&[_]Feature{}),
596 };
333 result[@intFromEnum(Feature.h)] = .{597 result[@intFromEnum(Feature.h)] = .{
334 .llvm_name = "h",598 .llvm_name = "h",
335 .description = "'H' (Hypervisor)",599 .description = "'H' (Hypervisor)",
...@@ -353,23 +617,45 @@ pub const all_features = blk: {...@@ -353,23 +617,45 @@ pub const all_features = blk: {
353 result[@intFromEnum(Feature.m)] = .{617 result[@intFromEnum(Feature.m)] = .{
354 .llvm_name = "m",618 .llvm_name = "m",
355 .description = "'M' (Integer Multiplication and Division)",619 .description = "'M' (Integer Multiplication and Division)",
356 .dependencies = featureSet(&[_]Feature{}),620 .dependencies = featureSet(&[_]Feature{
621 .zmmul,
622 }),
357 };623 };
358 result[@intFromEnum(Feature.no_default_unroll)] = .{624 result[@intFromEnum(Feature.no_default_unroll)] = .{
359 .llvm_name = "no-default-unroll",625 .llvm_name = "no-default-unroll",
360 .description = "Disable default unroll preference.",626 .description = "Disable default unroll preference.",
361 .dependencies = featureSet(&[_]Feature{}),627 .dependencies = featureSet(&[_]Feature{}),
362 };628 };
363 result[@intFromEnum(Feature.no_optimized_zero_stride_load)] = .{
364 .llvm_name = "no-optimized-zero-stride-load",
365 .description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load",
366 .dependencies = featureSet(&[_]Feature{}),
367 };
368 result[@intFromEnum(Feature.no_rvc_hints)] = .{629 result[@intFromEnum(Feature.no_rvc_hints)] = .{
369 .llvm_name = "no-rvc-hints",630 .llvm_name = "no-rvc-hints",
370 .description = "Disable RVC Hint Instructions.",631 .description = "Disable RVC Hint Instructions.",
371 .dependencies = featureSet(&[_]Feature{}),632 .dependencies = featureSet(&[_]Feature{}),
372 };633 };
634 result[@intFromEnum(Feature.no_sink_splat_operands)] = .{
635 .llvm_name = "no-sink-splat-operands",
636 .description = "Disable sink splat operands to enable .vx, .vf,.wx, and .wf instructions",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@intFromEnum(Feature.no_trailing_seq_cst_fence)] = .{
640 .llvm_name = "no-trailing-seq-cst-fence",
641 .description = "Disable trailing fence for seq-cst store.",
642 .dependencies = featureSet(&[_]Feature{}),
643 };
644 result[@intFromEnum(Feature.optimized_zero_stride_load)] = .{
645 .llvm_name = "optimized-zero-stride-load",
646 .description = "Optimized (perform fewer memory operations)zero-stride vector load",
647 .dependencies = featureSet(&[_]Feature{}),
648 };
649 result[@intFromEnum(Feature.predictable_select_expensive)] = .{
650 .llvm_name = "predictable-select-expensive",
651 .description = "Prefer likely predicted branches over selects",
652 .dependencies = featureSet(&[_]Feature{}),
653 };
654 result[@intFromEnum(Feature.prefer_w_inst)] = .{
655 .llvm_name = "prefer-w-inst",
656 .description = "Prefer instructions with W suffix",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
373 result[@intFromEnum(Feature.relax)] = .{659 result[@intFromEnum(Feature.relax)] = .{
374 .llvm_name = "relax",660 .llvm_name = "relax",
375 .description = "Enable Linker relaxation.",661 .description = "Enable Linker relaxation.",
...@@ -530,14 +816,144 @@ pub const all_features = blk: {...@@ -530,14 +816,144 @@ pub const all_features = blk: {
530 .description = "Reserve X9",816 .description = "Reserve X9",
531 .dependencies = featureSet(&[_]Feature{}),817 .dependencies = featureSet(&[_]Feature{}),
532 };818 };
819 result[@intFromEnum(Feature.rva20s64)] = .{
820 .llvm_name = "rva20s64",
821 .description = "RISC-V rva20s64 profile",
822 .dependencies = featureSet(&[_]Feature{
823 .@"64bit",
824 .a,
825 .c,
826 .d,
827 .i,
828 .m,
829 .ssccptr,
830 .sstvala,
831 .sstvecd,
832 .svade,
833 .svbare,
834 .za128rs,
835 .ziccamoa,
836 .ziccif,
837 .zicclsm,
838 .ziccrse,
839 .zicntr,
840 .zifencei,
841 }),
842 };
843 result[@intFromEnum(Feature.rva20u64)] = .{
844 .llvm_name = "rva20u64",
845 .description = "RISC-V rva20u64 profile",
846 .dependencies = featureSet(&[_]Feature{
847 .@"64bit",
848 .a,
849 .c,
850 .d,
851 .i,
852 .m,
853 .za128rs,
854 .ziccamoa,
855 .ziccif,
856 .zicclsm,
857 .ziccrse,
858 .zicntr,
859 }),
860 };
861 result[@intFromEnum(Feature.rva22s64)] = .{
862 .llvm_name = "rva22s64",
863 .description = "RISC-V rva22s64 profile",
864 .dependencies = featureSet(&[_]Feature{
865 .@"64bit",
866 .a,
867 .c,
868 .d,
869 .i,
870 .m,
871 .ssccptr,
872 .sscounterenw,
873 .sstvala,
874 .sstvecd,
875 .svade,
876 .svbare,
877 .svinval,
878 .svpbmt,
879 .za64rs,
880 .zba,
881 .zbb,
882 .zbs,
883 .zfhmin,
884 .zic64b,
885 .zicbom,
886 .zicbop,
887 .zicboz,
888 .ziccamoa,
889 .ziccif,
890 .zicclsm,
891 .ziccrse,
892 .zicntr,
893 .zifencei,
894 .zihintpause,
895 .zihpm,
896 .zkt,
897 }),
898 };
899 result[@intFromEnum(Feature.rva22u64)] = .{
900 .llvm_name = "rva22u64",
901 .description = "RISC-V rva22u64 profile",
902 .dependencies = featureSet(&[_]Feature{
903 .@"64bit",
904 .a,
905 .c,
906 .d,
907 .i,
908 .m,
909 .za64rs,
910 .zba,
911 .zbb,
912 .zbs,
913 .zfhmin,
914 .zic64b,
915 .zicbom,
916 .zicbop,
917 .zicboz,
918 .ziccamoa,
919 .ziccif,
920 .zicclsm,
921 .ziccrse,
922 .zicntr,
923 .zihintpause,
924 .zihpm,
925 .zkt,
926 }),
927 };
928 result[@intFromEnum(Feature.rvi20u32)] = .{
929 .llvm_name = "rvi20u32",
930 .description = "RISC-V rvi20u32 profile",
931 .dependencies = featureSet(&[_]Feature{
932 .@"32bit",
933 .i,
934 }),
935 };
936 result[@intFromEnum(Feature.rvi20u64)] = .{
937 .llvm_name = "rvi20u64",
938 .description = "RISC-V rvi20u64 profile",
939 .dependencies = featureSet(&[_]Feature{
940 .@"64bit",
941 .i,
942 }),
943 };
533 result[@intFromEnum(Feature.save_restore)] = .{944 result[@intFromEnum(Feature.save_restore)] = .{
534 .llvm_name = "save-restore",945 .llvm_name = "save-restore",
535 .description = "Enable save/restore.",946 .description = "Enable save/restore.",
536 .dependencies = featureSet(&[_]Feature{}),947 .dependencies = featureSet(&[_]Feature{}),
537 };948 };
538 result[@intFromEnum(Feature.seq_cst_trailing_fence)] = .{949 result[@intFromEnum(Feature.shcounterenw)] = .{
539 .llvm_name = "seq-cst-trailing-fence",950 .llvm_name = "shcounterenw",
540 .description = "Enable trailing fence for seq-cst store.",951 .description = "'Shcounterenw' (Support writeable hcounteren enable bit for any hpmcounter that is not read-only zero)",
952 .dependencies = featureSet(&[_]Feature{}),
953 };
954 result[@intFromEnum(Feature.shgatpa)] = .{
955 .llvm_name = "shgatpa",
956 .description = "'Sgatpa' (SvNNx4 mode supported for all modes supported by satp, as well as Bare)",
541 .dependencies = featureSet(&[_]Feature{}),957 .dependencies = featureSet(&[_]Feature{}),
542 };958 };
543 result[@intFromEnum(Feature.shifted_zextw_fusion)] = .{959 result[@intFromEnum(Feature.shifted_zextw_fusion)] = .{
...@@ -550,21 +966,126 @@ pub const all_features = blk: {...@@ -550,21 +966,126 @@ pub const all_features = blk: {
550 .description = "Enable short forward branch optimization",966 .description = "Enable short forward branch optimization",
551 .dependencies = featureSet(&[_]Feature{}),967 .dependencies = featureSet(&[_]Feature{}),
552 };968 };
969 result[@intFromEnum(Feature.shtvala)] = .{
970 .llvm_name = "shtvala",
971 .description = "'Shtvala' (htval provides all needed values)",
972 .dependencies = featureSet(&[_]Feature{}),
973 };
974 result[@intFromEnum(Feature.shvsatpa)] = .{
975 .llvm_name = "shvsatpa",
976 .description = "'Svsatpa' (vsatp supports all modes supported by satp)",
977 .dependencies = featureSet(&[_]Feature{}),
978 };
979 result[@intFromEnum(Feature.shvstvala)] = .{
980 .llvm_name = "shvstvala",
981 .description = "'Shvstvala' (vstval provides all needed values)",
982 .dependencies = featureSet(&[_]Feature{}),
983 };
984 result[@intFromEnum(Feature.shvstvecd)] = .{
985 .llvm_name = "shvstvecd",
986 .description = "'Shvstvecd' (vstvec supports Direct mode)",
987 .dependencies = featureSet(&[_]Feature{}),
988 };
553 result[@intFromEnum(Feature.smaia)] = .{989 result[@intFromEnum(Feature.smaia)] = .{
554 .llvm_name = "smaia",990 .llvm_name = "smaia",
555 .description = "'Smaia' (Advanced Interrupt Architecture Machine Level)",991 .description = "'Smaia' (Advanced Interrupt Architecture Machine Level)",
556 .dependencies = featureSet(&[_]Feature{}),992 .dependencies = featureSet(&[_]Feature{}),
557 };993 };
994 result[@intFromEnum(Feature.smcdeleg)] = .{
995 .llvm_name = "smcdeleg",
996 .description = "'Smcdeleg' (Counter Delegation Machine Level)",
997 .dependencies = featureSet(&[_]Feature{}),
998 };
999 result[@intFromEnum(Feature.smcsrind)] = .{
1000 .llvm_name = "smcsrind",
1001 .description = "'Smcsrind' (Indirect CSR Access Machine Level)",
1002 .dependencies = featureSet(&[_]Feature{}),
1003 };
558 result[@intFromEnum(Feature.smepmp)] = .{1004 result[@intFromEnum(Feature.smepmp)] = .{
559 .llvm_name = "smepmp",1005 .llvm_name = "smepmp",
560 .description = "'Smepmp' (Enhanced Physical Memory Protection)",1006 .description = "'Smepmp' (Enhanced Physical Memory Protection)",
561 .dependencies = featureSet(&[_]Feature{}),1007 .dependencies = featureSet(&[_]Feature{}),
562 };1008 };
1009 result[@intFromEnum(Feature.smstateen)] = .{
1010 .llvm_name = "smstateen",
1011 .description = "'Smstateen' (Machine-mode view of the state-enable extension)",
1012 .dependencies = featureSet(&[_]Feature{}),
1013 };
563 result[@intFromEnum(Feature.ssaia)] = .{1014 result[@intFromEnum(Feature.ssaia)] = .{
564 .llvm_name = "ssaia",1015 .llvm_name = "ssaia",
565 .description = "'Ssaia' (Advanced Interrupt Architecture Supervisor Level)",1016 .description = "'Ssaia' (Advanced Interrupt Architecture Supervisor Level)",
566 .dependencies = featureSet(&[_]Feature{}),1017 .dependencies = featureSet(&[_]Feature{}),
567 };1018 };
1019 result[@intFromEnum(Feature.ssccfg)] = .{
1020 .llvm_name = "ssccfg",
1021 .description = "'Ssccfg' (Counter Configuration Supervisor Level)",
1022 .dependencies = featureSet(&[_]Feature{}),
1023 };
1024 result[@intFromEnum(Feature.ssccptr)] = .{
1025 .llvm_name = "ssccptr",
1026 .description = "'Ssccptr' (Main memory supports page table reads)",
1027 .dependencies = featureSet(&[_]Feature{}),
1028 };
1029 result[@intFromEnum(Feature.sscofpmf)] = .{
1030 .llvm_name = "sscofpmf",
1031 .description = "'Sscofpmf' (Count Overflow and Mode-Based Filtering)",
1032 .dependencies = featureSet(&[_]Feature{}),
1033 };
1034 result[@intFromEnum(Feature.sscounterenw)] = .{
1035 .llvm_name = "sscounterenw",
1036 .description = "'Sscounterenw' (Support writeable scounteren enable bit for any hpmcounter that is not read-only zero)",
1037 .dependencies = featureSet(&[_]Feature{}),
1038 };
1039 result[@intFromEnum(Feature.sscsrind)] = .{
1040 .llvm_name = "sscsrind",
1041 .description = "'Sscsrind' (Indirect CSR Access Supervisor Level)",
1042 .dependencies = featureSet(&[_]Feature{}),
1043 };
1044 result[@intFromEnum(Feature.ssstateen)] = .{
1045 .llvm_name = "ssstateen",
1046 .description = "'Ssstateen' (Supervisor-mode view of the state-enable extension)",
1047 .dependencies = featureSet(&[_]Feature{}),
1048 };
1049 result[@intFromEnum(Feature.ssstrict)] = .{
1050 .llvm_name = "ssstrict",
1051 .description = "'Ssstrict' (No non-conforming extensions are present)",
1052 .dependencies = featureSet(&[_]Feature{}),
1053 };
1054 result[@intFromEnum(Feature.sstc)] = .{
1055 .llvm_name = "sstc",
1056 .description = "'Sstc' (Supervisor-mode timer interrupts)",
1057 .dependencies = featureSet(&[_]Feature{}),
1058 };
1059 result[@intFromEnum(Feature.sstvala)] = .{
1060 .llvm_name = "sstvala",
1061 .description = "'Sstvala' (stval provides all needed values)",
1062 .dependencies = featureSet(&[_]Feature{}),
1063 };
1064 result[@intFromEnum(Feature.sstvecd)] = .{
1065 .llvm_name = "sstvecd",
1066 .description = "'Sstvecd' (stvec supports Direct mode)",
1067 .dependencies = featureSet(&[_]Feature{}),
1068 };
1069 result[@intFromEnum(Feature.ssu64xl)] = .{
1070 .llvm_name = "ssu64xl",
1071 .description = "'Ssu64xl' (UXLEN=64 supported)",
1072 .dependencies = featureSet(&[_]Feature{}),
1073 };
1074 result[@intFromEnum(Feature.svade)] = .{
1075 .llvm_name = "svade",
1076 .description = "'Svade' (Raise exceptions on improper A/D bits)",
1077 .dependencies = featureSet(&[_]Feature{}),
1078 };
1079 result[@intFromEnum(Feature.svadu)] = .{
1080 .llvm_name = "svadu",
1081 .description = "'Svadu' (Hardware A/D updates)",
1082 .dependencies = featureSet(&[_]Feature{}),
1083 };
1084 result[@intFromEnum(Feature.svbare)] = .{
1085 .llvm_name = "svbare",
1086 .description = "'Svbare' $(satp mode Bare supported)",
1087 .dependencies = featureSet(&[_]Feature{}),
1088 };
568 result[@intFromEnum(Feature.svinval)] = .{1089 result[@intFromEnum(Feature.svinval)] = .{
569 .llvm_name = "svinval",1090 .llvm_name = "svinval",
570 .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)",1091 .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)",
...@@ -590,6 +1111,11 @@ pub const all_features = blk: {...@@ -590,6 +1111,11 @@ pub const all_features = blk: {
590 .description = "Has reasonably performant unaligned scalar loads and stores",1111 .description = "Has reasonably performant unaligned scalar loads and stores",
591 .dependencies = featureSet(&[_]Feature{}),1112 .dependencies = featureSet(&[_]Feature{}),
592 };1113 };
1114 result[@intFromEnum(Feature.unaligned_vector_mem)] = .{
1115 .llvm_name = "unaligned-vector-mem",
1116 .description = "Has reasonably performant unaligned vector loads and stores",
1117 .dependencies = featureSet(&[_]Feature{}),
1118 };
593 result[@intFromEnum(Feature.use_postra_scheduler)] = .{1119 result[@intFromEnum(Feature.use_postra_scheduler)] = .{
594 .llvm_name = "use-postra-scheduler",1120 .llvm_name = "use-postra-scheduler",
595 .description = "Schedule again after register allocation",1121 .description = "Schedule again after register allocation",
...@@ -643,6 +1169,11 @@ pub const all_features = blk: {...@@ -643,6 +1169,11 @@ pub const all_features = blk: {
643 .description = "'XCVsimd' (CORE-V SIMD ALU)",1169 .description = "'XCVsimd' (CORE-V SIMD ALU)",
644 .dependencies = featureSet(&[_]Feature{}),1170 .dependencies = featureSet(&[_]Feature{}),
645 };1171 };
1172 result[@intFromEnum(Feature.xsfcease)] = .{
1173 .llvm_name = "xsfcease",
1174 .description = "'XSfcease' (SiFive sf.cease Instruction)",
1175 .dependencies = featureSet(&[_]Feature{}),
1176 };
646 result[@intFromEnum(Feature.xsfvcp)] = .{1177 result[@intFromEnum(Feature.xsfvcp)] = .{
647 .llvm_name = "xsfvcp",1178 .llvm_name = "xsfvcp",
648 .description = "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)",1179 .description = "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)",
...@@ -661,7 +1192,7 @@ pub const all_features = blk: {...@@ -661,7 +1192,7 @@ pub const all_features = blk: {
661 .llvm_name = "xsfvfwmaccqqq",1192 .llvm_name = "xsfvfwmaccqqq",
662 .description = "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))",1193 .description = "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))",
663 .dependencies = featureSet(&[_]Feature{1194 .dependencies = featureSet(&[_]Feature{
664 .experimental_zvfbfmin,1195 .zvfbfmin,
665 }),1196 }),
666 };1197 };
667 result[@intFromEnum(Feature.xsfvqmaccdod)] = .{1198 result[@intFromEnum(Feature.xsfvqmaccdod)] = .{
...@@ -678,61 +1209,69 @@ pub const all_features = blk: {...@@ -678,61 +1209,69 @@ pub const all_features = blk: {
678 .zve32x,1209 .zve32x,
679 }),1210 }),
680 };1211 };
1212 result[@intFromEnum(Feature.xsifivecdiscarddlone)] = .{
1213 .llvm_name = "xsifivecdiscarddlone",
1214 .description = "'XSiFivecdiscarddlone' (SiFive sf.cdiscard.d.l1 Instruction)",
1215 .dependencies = featureSet(&[_]Feature{}),
1216 };
1217 result[@intFromEnum(Feature.xsifivecflushdlone)] = .{
1218 .llvm_name = "xsifivecflushdlone",
1219 .description = "'XSiFivecflushdlone' (SiFive sf.cflush.d.l1 Instruction)",
1220 .dependencies = featureSet(&[_]Feature{}),
1221 };
681 result[@intFromEnum(Feature.xtheadba)] = .{1222 result[@intFromEnum(Feature.xtheadba)] = .{
682 .llvm_name = "xtheadba",1223 .llvm_name = "xtheadba",
683 .description = "'xtheadba' (T-Head address calculation instructions)",1224 .description = "'XTHeadBa' (T-Head address calculation instructions)",
684 .dependencies = featureSet(&[_]Feature{}),1225 .dependencies = featureSet(&[_]Feature{}),
685 };1226 };
686 result[@intFromEnum(Feature.xtheadbb)] = .{1227 result[@intFromEnum(Feature.xtheadbb)] = .{
687 .llvm_name = "xtheadbb",1228 .llvm_name = "xtheadbb",
688 .description = "'xtheadbb' (T-Head basic bit-manipulation instructions)",1229 .description = "'XTHeadBb' (T-Head basic bit-manipulation instructions)",
689 .dependencies = featureSet(&[_]Feature{}),1230 .dependencies = featureSet(&[_]Feature{}),
690 };1231 };
691 result[@intFromEnum(Feature.xtheadbs)] = .{1232 result[@intFromEnum(Feature.xtheadbs)] = .{
692 .llvm_name = "xtheadbs",1233 .llvm_name = "xtheadbs",
693 .description = "'xtheadbs' (T-Head single-bit instructions)",1234 .description = "'XTHeadBs' (T-Head single-bit instructions)",
694 .dependencies = featureSet(&[_]Feature{}),1235 .dependencies = featureSet(&[_]Feature{}),
695 };1236 };
696 result[@intFromEnum(Feature.xtheadcmo)] = .{1237 result[@intFromEnum(Feature.xtheadcmo)] = .{
697 .llvm_name = "xtheadcmo",1238 .llvm_name = "xtheadcmo",
698 .description = "'xtheadcmo' (T-Head cache management instructions)",1239 .description = "'XTHeadCmo' (T-Head cache management instructions)",
699 .dependencies = featureSet(&[_]Feature{}),1240 .dependencies = featureSet(&[_]Feature{}),
700 };1241 };
701 result[@intFromEnum(Feature.xtheadcondmov)] = .{1242 result[@intFromEnum(Feature.xtheadcondmov)] = .{
702 .llvm_name = "xtheadcondmov",1243 .llvm_name = "xtheadcondmov",
703 .description = "'xtheadcondmov' (T-Head conditional move instructions)",1244 .description = "'XTHeadCondMov' (T-Head conditional move instructions)",
704 .dependencies = featureSet(&[_]Feature{}),1245 .dependencies = featureSet(&[_]Feature{}),
705 };1246 };
706 result[@intFromEnum(Feature.xtheadfmemidx)] = .{1247 result[@intFromEnum(Feature.xtheadfmemidx)] = .{
707 .llvm_name = "xtheadfmemidx",1248 .llvm_name = "xtheadfmemidx",
708 .description = "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)",1249 .description = "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)",
709 .dependencies = featureSet(&[_]Feature{1250 .dependencies = featureSet(&[_]Feature{}),
710 .f,
711 }),
712 };1251 };
713 result[@intFromEnum(Feature.xtheadmac)] = .{1252 result[@intFromEnum(Feature.xtheadmac)] = .{
714 .llvm_name = "xtheadmac",1253 .llvm_name = "xtheadmac",
715 .description = "'xtheadmac' (T-Head Multiply-Accumulate Instructions)",1254 .description = "'XTHeadMac' (T-Head Multiply-Accumulate Instructions)",
716 .dependencies = featureSet(&[_]Feature{}),1255 .dependencies = featureSet(&[_]Feature{}),
717 };1256 };
718 result[@intFromEnum(Feature.xtheadmemidx)] = .{1257 result[@intFromEnum(Feature.xtheadmemidx)] = .{
719 .llvm_name = "xtheadmemidx",1258 .llvm_name = "xtheadmemidx",
720 .description = "'xtheadmemidx' (T-Head Indexed Memory Operations)",1259 .description = "'XTHeadMemIdx' (T-Head Indexed Memory Operations)",
721 .dependencies = featureSet(&[_]Feature{}),1260 .dependencies = featureSet(&[_]Feature{}),
722 };1261 };
723 result[@intFromEnum(Feature.xtheadmempair)] = .{1262 result[@intFromEnum(Feature.xtheadmempair)] = .{
724 .llvm_name = "xtheadmempair",1263 .llvm_name = "xtheadmempair",
725 .description = "'xtheadmempair' (T-Head two-GPR Memory Operations)",1264 .description = "'XTHeadMemPair' (T-Head two-GPR Memory Operations)",
726 .dependencies = featureSet(&[_]Feature{}),1265 .dependencies = featureSet(&[_]Feature{}),
727 };1266 };
728 result[@intFromEnum(Feature.xtheadsync)] = .{1267 result[@intFromEnum(Feature.xtheadsync)] = .{
729 .llvm_name = "xtheadsync",1268 .llvm_name = "xtheadsync",
730 .description = "'xtheadsync' (T-Head multicore synchronization instructions)",1269 .description = "'XTHeadSync' (T-Head multicore synchronization instructions)",
731 .dependencies = featureSet(&[_]Feature{}),1270 .dependencies = featureSet(&[_]Feature{}),
732 };1271 };
733 result[@intFromEnum(Feature.xtheadvdot)] = .{1272 result[@intFromEnum(Feature.xtheadvdot)] = .{
734 .llvm_name = "xtheadvdot",1273 .llvm_name = "xtheadvdot",
735 .description = "'xtheadvdot' (T-Head Vector Extensions for Dot)",1274 .description = "'XTHeadVdot' (T-Head Vector Extensions for Dot)",
736 .dependencies = featureSet(&[_]Feature{1275 .dependencies = featureSet(&[_]Feature{
737 .v,1276 .v,
738 }),1277 }),
...@@ -742,6 +1281,11 @@ pub const all_features = blk: {...@@ -742,6 +1281,11 @@ pub const all_features = blk: {
742 .description = "'XVentanaCondOps' (Ventana Conditional Ops)",1281 .description = "'XVentanaCondOps' (Ventana Conditional Ops)",
743 .dependencies = featureSet(&[_]Feature{}),1282 .dependencies = featureSet(&[_]Feature{}),
744 };1283 };
1284 result[@intFromEnum(Feature.xwchc)] = .{
1285 .llvm_name = "xwchc",
1286 .description = "'Xwchc' (WCH/QingKe additional compressed opcodes)",
1287 .dependencies = featureSet(&[_]Feature{}),
1288 };
745 result[@intFromEnum(Feature.za128rs)] = .{1289 result[@intFromEnum(Feature.za128rs)] = .{
746 .llvm_name = "za128rs",1290 .llvm_name = "za128rs",
747 .description = "'Za128rs' (Reservation Set Size of at Most 128 Bytes)",1291 .description = "'Za128rs' (Reservation Set Size of at Most 128 Bytes)",
...@@ -752,6 +1296,26 @@ pub const all_features = blk: {...@@ -752,6 +1296,26 @@ pub const all_features = blk: {
752 .description = "'Za64rs' (Reservation Set Size of at Most 64 Bytes)",1296 .description = "'Za64rs' (Reservation Set Size of at Most 64 Bytes)",
753 .dependencies = featureSet(&[_]Feature{}),1297 .dependencies = featureSet(&[_]Feature{}),
754 };1298 };
1299 result[@intFromEnum(Feature.zaamo)] = .{
1300 .llvm_name = "zaamo",
1301 .description = "'Zaamo' (Atomic Memory Operations)",
1302 .dependencies = featureSet(&[_]Feature{}),
1303 };
1304 result[@intFromEnum(Feature.zabha)] = .{
1305 .llvm_name = "zabha",
1306 .description = "'Zabha' (Byte and Halfword Atomic Memory Operations)",
1307 .dependencies = featureSet(&[_]Feature{}),
1308 };
1309 result[@intFromEnum(Feature.zalrsc)] = .{
1310 .llvm_name = "zalrsc",
1311 .description = "'Zalrsc' (Load-Reserved/Store-Conditional)",
1312 .dependencies = featureSet(&[_]Feature{}),
1313 };
1314 result[@intFromEnum(Feature.zama16b)] = .{
1315 .llvm_name = "zama16b",
1316 .description = "'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)",
1317 .dependencies = featureSet(&[_]Feature{}),
1318 };
755 result[@intFromEnum(Feature.zawrs)] = .{1319 result[@intFromEnum(Feature.zawrs)] = .{
756 .llvm_name = "zawrs",1320 .llvm_name = "zawrs",
757 .description = "'Zawrs' (Wait on Reservation Set)",1321 .description = "'Zawrs' (Wait on Reservation Set)",
...@@ -808,6 +1372,7 @@ pub const all_features = blk: {...@@ -808,6 +1372,7 @@ pub const all_features = blk: {
808 .llvm_name = "zcd",1372 .llvm_name = "zcd",
809 .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",1373 .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",
810 .dependencies = featureSet(&[_]Feature{1374 .dependencies = featureSet(&[_]Feature{
1375 .d,
811 .zca,1376 .zca,
812 }),1377 }),
813 };1378 };
...@@ -823,6 +1388,14 @@ pub const all_features = blk: {...@@ -823,6 +1388,14 @@ pub const all_features = blk: {
823 result[@intFromEnum(Feature.zcf)] = .{1388 result[@intFromEnum(Feature.zcf)] = .{
824 .llvm_name = "zcf",1389 .llvm_name = "zcf",
825 .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",1390 .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",
1391 .dependencies = featureSet(&[_]Feature{
1392 .f,
1393 .zca,
1394 }),
1395 };
1396 result[@intFromEnum(Feature.zcmop)] = .{
1397 .llvm_name = "zcmop",
1398 .description = "'Zcmop' (Compressed May-Be-Operations)",
826 .dependencies = featureSet(&[_]Feature{1399 .dependencies = featureSet(&[_]Feature{
827 .zca,1400 .zca,
828 }),1401 }),
...@@ -866,6 +1439,13 @@ pub const all_features = blk: {...@@ -866,6 +1439,13 @@ pub const all_features = blk: {
866 .f,1439 .f,
867 }),1440 }),
868 };1441 };
1442 result[@intFromEnum(Feature.zfbfmin)] = .{
1443 .llvm_name = "zfbfmin",
1444 .description = "'Zfbfmin' (Scalar BF16 Converts)",
1445 .dependencies = featureSet(&[_]Feature{
1446 .f,
1447 }),
1448 };
869 result[@intFromEnum(Feature.zfh)] = .{1449 result[@intFromEnum(Feature.zfh)] = .{
870 .llvm_name = "zfh",1450 .llvm_name = "zfh",
871 .description = "'Zfh' (Half-Precision Floating-Point)",1451 .description = "'Zfh' (Half-Precision Floating-Point)",
...@@ -980,6 +1560,11 @@ pub const all_features = blk: {...@@ -980,6 +1560,11 @@ pub const all_features = blk: {
980 .zicsr,1560 .zicsr,
981 }),1561 }),
982 };1562 };
1563 result[@intFromEnum(Feature.zimop)] = .{
1564 .llvm_name = "zimop",
1565 .description = "'Zimop' (May-Be-Operations)",
1566 .dependencies = featureSet(&[_]Feature{}),
1567 };
983 result[@intFromEnum(Feature.zk)] = .{1568 result[@intFromEnum(Feature.zk)] = .{
984 .llvm_name = "zk",1569 .llvm_name = "zk",
985 .description = "'Zk' (Standard scalar cryptography extension)",1570 .description = "'Zk' (Standard scalar cryptography extension)",
...@@ -1052,6 +1637,11 @@ pub const all_features = blk: {...@@ -1052,6 +1637,11 @@ pub const all_features = blk: {
1052 .description = "'Zmmul' (Integer Multiplication)",1637 .description = "'Zmmul' (Integer Multiplication)",
1053 .dependencies = featureSet(&[_]Feature{}),1638 .dependencies = featureSet(&[_]Feature{}),
1054 };1639 };
1640 result[@intFromEnum(Feature.ztso)] = .{
1641 .llvm_name = "ztso",
1642 .description = "'Ztso' (Memory Model - Total Store Order)",
1643 .dependencies = featureSet(&[_]Feature{}),
1644 };
1055 result[@intFromEnum(Feature.zvbb)] = .{1645 result[@intFromEnum(Feature.zvbb)] = .{
1056 .llvm_name = "zvbb",1646 .llvm_name = "zvbb",
1057 .description = "'Zvbb' (Vector basic bit-manipulation instructions)",1647 .description = "'Zvbb' (Vector basic bit-manipulation instructions)",
...@@ -1104,6 +1694,21 @@ pub const all_features = blk: {...@@ -1104,6 +1694,21 @@ pub const all_features = blk: {
1104 .zvl64b,1694 .zvl64b,
1105 }),1695 }),
1106 };1696 };
1697 result[@intFromEnum(Feature.zvfbfmin)] = .{
1698 .llvm_name = "zvfbfmin",
1699 .description = "'Zvbfmin' (Vector BF16 Converts)",
1700 .dependencies = featureSet(&[_]Feature{
1701 .zve32f,
1702 }),
1703 };
1704 result[@intFromEnum(Feature.zvfbfwma)] = .{
1705 .llvm_name = "zvfbfwma",
1706 .description = "'Zvfbfwma' (Vector BF16 widening mul-add)",
1707 .dependencies = featureSet(&[_]Feature{
1708 .zfbfmin,
1709 .zvfbfmin,
1710 }),
1711 };
1107 result[@intFromEnum(Feature.zvfh)] = .{1712 result[@intFromEnum(Feature.zvfh)] = .{
1108 .llvm_name = "zvfh",1713 .llvm_name = "zvfh",
1109 .description = "'Zvfh' (Vector Half-Precision Floating-Point)",1714 .description = "'Zvfh' (Vector Half-Precision Floating-Point)",
...@@ -1312,6 +1917,7 @@ pub const cpu = struct {...@@ -1312,6 +1917,7 @@ pub const cpu = struct {
1312 .a,1917 .a,
1313 .c,1918 .c,
1314 .d,1919 .d,
1920 .i,
1315 .m,1921 .m,
1316 }),1922 }),
1317 };1923 };
...@@ -1323,6 +1929,7 @@ pub const cpu = struct {...@@ -1323,6 +1929,7 @@ pub const cpu = struct {
1323 .a,1929 .a,
1324 .c,1930 .c,
1325 .d,1931 .d,
1932 .i,
1326 .m,1933 .m,
1327 }),1934 }),
1328 };1935 };
...@@ -1336,6 +1943,7 @@ pub const cpu = struct {...@@ -1336,6 +1943,7 @@ pub const cpu = struct {
1336 .llvm_name = "generic-rv32",1943 .llvm_name = "generic-rv32",
1337 .features = featureSet(&[_]Feature{1944 .features = featureSet(&[_]Feature{
1338 .@"32bit",1945 .@"32bit",
1946 .i,
1339 }),1947 }),
1340 };1948 };
1341 pub const generic_rv64 = CpuModel{1949 pub const generic_rv64 = CpuModel{
...@@ -1343,6 +1951,7 @@ pub const cpu = struct {...@@ -1343,6 +1951,7 @@ pub const cpu = struct {
1343 .llvm_name = "generic-rv64",1951 .llvm_name = "generic-rv64",
1344 .features = featureSet(&[_]Feature{1952 .features = featureSet(&[_]Feature{
1345 .@"64bit",1953 .@"64bit",
1954 .i,
1346 }),1955 }),
1347 };1956 };
1348 pub const rocket = CpuModel{1957 pub const rocket = CpuModel{
...@@ -1355,6 +1964,7 @@ pub const cpu = struct {...@@ -1355,6 +1964,7 @@ pub const cpu = struct {
1355 .llvm_name = "rocket-rv32",1964 .llvm_name = "rocket-rv32",
1356 .features = featureSet(&[_]Feature{1965 .features = featureSet(&[_]Feature{
1357 .@"32bit",1966 .@"32bit",
1967 .i,
1358 .zicsr,1968 .zicsr,
1359 .zifencei,1969 .zifencei,
1360 }),1970 }),
...@@ -1364,6 +1974,7 @@ pub const cpu = struct {...@@ -1364,6 +1974,7 @@ pub const cpu = struct {
1364 .llvm_name = "rocket-rv64",1974 .llvm_name = "rocket-rv64",
1365 .features = featureSet(&[_]Feature{1975 .features = featureSet(&[_]Feature{
1366 .@"64bit",1976 .@"64bit",
1977 .i,
1367 .zicsr,1978 .zicsr,
1368 .zifencei,1979 .zifencei,
1369 }),1980 }),
...@@ -1374,6 +1985,7 @@ pub const cpu = struct {...@@ -1374,6 +1985,7 @@ pub const cpu = struct {
1374 .features = featureSet(&[_]Feature{1985 .features = featureSet(&[_]Feature{
1375 .no_default_unroll,1986 .no_default_unroll,
1376 .short_forward_branch_opt,1987 .short_forward_branch_opt,
1988 .use_postra_scheduler,
1377 }),1989 }),
1378 };1990 };
1379 pub const sifive_e20 = CpuModel{1991 pub const sifive_e20 = CpuModel{
...@@ -1382,6 +1994,7 @@ pub const cpu = struct {...@@ -1382,6 +1994,7 @@ pub const cpu = struct {
1382 .features = featureSet(&[_]Feature{1994 .features = featureSet(&[_]Feature{
1383 .@"32bit",1995 .@"32bit",
1384 .c,1996 .c,
1997 .i,
1385 .m,1998 .m,
1386 .zicsr,1999 .zicsr,
1387 .zifencei,2000 .zifencei,
...@@ -1394,6 +2007,7 @@ pub const cpu = struct {...@@ -1394,6 +2007,7 @@ pub const cpu = struct {
1394 .@"32bit",2007 .@"32bit",
1395 .a,2008 .a,
1396 .c,2009 .c,
2010 .i,
1397 .m,2011 .m,
1398 .zicsr,2012 .zicsr,
1399 .zifencei,2013 .zifencei,
...@@ -1407,6 +2021,7 @@ pub const cpu = struct {...@@ -1407,6 +2021,7 @@ pub const cpu = struct {
1407 .a,2021 .a,
1408 .c,2022 .c,
1409 .f,2023 .f,
2024 .i,
1410 .m,2025 .m,
1411 .zifencei,2026 .zifencei,
1412 }),2027 }),
...@@ -1418,6 +2033,7 @@ pub const cpu = struct {...@@ -1418,6 +2033,7 @@ pub const cpu = struct {
1418 .@"32bit",2033 .@"32bit",
1419 .a,2034 .a,
1420 .c,2035 .c,
2036 .i,
1421 .m,2037 .m,
1422 .zicsr,2038 .zicsr,
1423 .zifencei,2039 .zifencei,
...@@ -1431,6 +2047,7 @@ pub const cpu = struct {...@@ -1431,6 +2047,7 @@ pub const cpu = struct {
1431 .a,2047 .a,
1432 .c,2048 .c,
1433 .f,2049 .f,
2050 .i,
1434 .m,2051 .m,
1435 .zifencei,2052 .zifencei,
1436 }),2053 }),
...@@ -1443,9 +2060,11 @@ pub const cpu = struct {...@@ -1443,9 +2060,11 @@ pub const cpu = struct {
1443 .a,2060 .a,
1444 .c,2061 .c,
1445 .f,2062 .f,
2063 .i,
1446 .m,2064 .m,
1447 .no_default_unroll,2065 .no_default_unroll,
1448 .short_forward_branch_opt,2066 .short_forward_branch_opt,
2067 .use_postra_scheduler,
1449 .zifencei,2068 .zifencei,
1450 }),2069 }),
1451 };2070 };
...@@ -1459,10 +2078,13 @@ pub const cpu = struct {...@@ -1459,10 +2078,13 @@ pub const cpu = struct {
1459 .c,2078 .c,
1460 .conditional_cmv_fusion,2079 .conditional_cmv_fusion,
1461 .d,2080 .d,
1462 .fast_unaligned_access,2081 .i,
1463 .lui_addi_fusion,2082 .lui_addi_fusion,
1464 .m,2083 .m,
1465 .no_default_unroll,2084 .no_default_unroll,
2085 .unaligned_scalar_mem,
2086 .unaligned_vector_mem,
2087 .use_postra_scheduler,
1466 .za64rs,2088 .za64rs,
1467 .zba,2089 .zba,
1468 .zbb,2090 .zbb,
...@@ -1491,10 +2113,14 @@ pub const cpu = struct {...@@ -1491,10 +2113,14 @@ pub const cpu = struct {
1491 .auipc_addi_fusion,2113 .auipc_addi_fusion,
1492 .c,2114 .c,
1493 .conditional_cmv_fusion,2115 .conditional_cmv_fusion,
1494 .fast_unaligned_access,2116 .i,
1495 .lui_addi_fusion,2117 .lui_addi_fusion,
1496 .m,2118 .m,
1497 .no_default_unroll,2119 .no_default_unroll,
2120 .no_sink_splat_operands,
2121 .unaligned_scalar_mem,
2122 .unaligned_vector_mem,
2123 .use_postra_scheduler,
1498 .v,2124 .v,
1499 .za64rs,2125 .za64rs,
1500 .zba,2126 .zba,
...@@ -1527,6 +2153,7 @@ pub const cpu = struct {...@@ -1527,6 +2153,7 @@ pub const cpu = struct {
1527 .@"64bit",2153 .@"64bit",
1528 .a,2154 .a,
1529 .c,2155 .c,
2156 .i,
1530 .m,2157 .m,
1531 .zicsr,2158 .zicsr,
1532 .zifencei,2159 .zifencei,
...@@ -1539,6 +2166,7 @@ pub const cpu = struct {...@@ -1539,6 +2166,7 @@ pub const cpu = struct {
1539 .@"64bit",2166 .@"64bit",
1540 .a,2167 .a,
1541 .c,2168 .c,
2169 .i,
1542 .m,2170 .m,
1543 .zicsr,2171 .zicsr,
1544 .zifencei,2172 .zifencei,
...@@ -1552,6 +2180,7 @@ pub const cpu = struct {...@@ -1552,6 +2180,7 @@ pub const cpu = struct {
1552 .a,2180 .a,
1553 .c,2181 .c,
1554 .d,2182 .d,
2183 .i,
1555 .m,2184 .m,
1556 .zifencei,2185 .zifencei,
1557 }),2186 }),
...@@ -1564,9 +2193,11 @@ pub const cpu = struct {...@@ -1564,9 +2193,11 @@ pub const cpu = struct {
1564 .a,2193 .a,
1565 .c,2194 .c,
1566 .d,2195 .d,
2196 .i,
1567 .m,2197 .m,
1568 .no_default_unroll,2198 .no_default_unroll,
1569 .short_forward_branch_opt,2199 .short_forward_branch_opt,
2200 .use_postra_scheduler,
1570 .zifencei,2201 .zifencei,
1571 .zihintpause,2202 .zihintpause,
1572 }),2203 }),
...@@ -1579,6 +2210,7 @@ pub const cpu = struct {...@@ -1579,6 +2210,7 @@ pub const cpu = struct {
1579 .a,2210 .a,
1580 .c,2211 .c,
1581 .d,2212 .d,
2213 .i,
1582 .m,2214 .m,
1583 .zifencei,2215 .zifencei,
1584 }),2216 }),
...@@ -1591,9 +2223,11 @@ pub const cpu = struct {...@@ -1591,9 +2223,11 @@ pub const cpu = struct {
1591 .a,2223 .a,
1592 .c,2224 .c,
1593 .d,2225 .d,
2226 .i,
1594 .m,2227 .m,
1595 .no_default_unroll,2228 .no_default_unroll,
1596 .short_forward_branch_opt,2229 .short_forward_branch_opt,
2230 .use_postra_scheduler,
1597 .zifencei,2231 .zifencei,
1598 }),2232 }),
1599 };2233 };
...@@ -1605,9 +2239,12 @@ pub const cpu = struct {...@@ -1605,9 +2239,12 @@ pub const cpu = struct {
1605 .a,2239 .a,
1606 .c,2240 .c,
1607 .dlen_factor_2,2241 .dlen_factor_2,
2242 .i,
1608 .m,2243 .m,
1609 .no_default_unroll,2244 .no_default_unroll,
2245 .optimized_zero_stride_load,
1610 .short_forward_branch_opt,2246 .short_forward_branch_opt,
2247 .use_postra_scheduler,
1611 .v,2248 .v,
1612 .zba,2249 .zba,
1613 .zbb,2250 .zbb,
...@@ -1617,12 +2254,61 @@ pub const cpu = struct {...@@ -1617,12 +2254,61 @@ pub const cpu = struct {
1617 .zvl512b,2254 .zvl512b,
1618 }),2255 }),
1619 };2256 };
2257 pub const spacemit_x60 = CpuModel{
2258 .name = "spacemit_x60",
2259 .llvm_name = "spacemit-x60",
2260 .features = featureSet(&[_]Feature{
2261 .@"64bit",
2262 .a,
2263 .c,
2264 .dlen_factor_2,
2265 .i,
2266 .m,
2267 .ssccptr,
2268 .sscofpmf,
2269 .sscounterenw,
2270 .sstc,
2271 .sstvala,
2272 .sstvecd,
2273 .svade,
2274 .svbare,
2275 .svinval,
2276 .svnapot,
2277 .svpbmt,
2278 .v,
2279 .za64rs,
2280 .zba,
2281 .zbb,
2282 .zbc,
2283 .zbkc,
2284 .zbs,
2285 .zfh,
2286 .zic64b,
2287 .zicbom,
2288 .zicbop,
2289 .zicboz,
2290 .ziccamoa,
2291 .ziccif,
2292 .zicclsm,
2293 .ziccrse,
2294 .zicntr,
2295 .zicond,
2296 .zifencei,
2297 .zihintpause,
2298 .zihpm,
2299 .zkt,
2300 .zvfh,
2301 .zvkt,
2302 .zvl256b,
2303 }),
2304 };
1620 pub const syntacore_scr1_base = CpuModel{2305 pub const syntacore_scr1_base = CpuModel{
1621 .name = "syntacore_scr1_base",2306 .name = "syntacore_scr1_base",
1622 .llvm_name = "syntacore-scr1-base",2307 .llvm_name = "syntacore-scr1-base",
1623 .features = featureSet(&[_]Feature{2308 .features = featureSet(&[_]Feature{
1624 .@"32bit",2309 .@"32bit",
1625 .c,2310 .c,
2311 .i,
1626 .no_default_unroll,2312 .no_default_unroll,
1627 .zicsr,2313 .zicsr,
1628 .zifencei,2314 .zifencei,
...@@ -1634,8 +2320,38 @@ pub const cpu = struct {...@@ -1634,8 +2320,38 @@ pub const cpu = struct {
1634 .features = featureSet(&[_]Feature{2320 .features = featureSet(&[_]Feature{
1635 .@"32bit",2321 .@"32bit",
1636 .c,2322 .c,
2323 .i,
2324 .m,
2325 .no_default_unroll,
2326 .zicsr,
2327 .zifencei,
2328 }),
2329 };
2330 pub const syntacore_scr3_rv32 = CpuModel{
2331 .name = "syntacore_scr3_rv32",
2332 .llvm_name = "syntacore-scr3-rv32",
2333 .features = featureSet(&[_]Feature{
2334 .@"32bit",
2335 .c,
2336 .i,
2337 .m,
2338 .no_default_unroll,
2339 .use_postra_scheduler,
2340 .zicsr,
2341 .zifencei,
2342 }),
2343 };
2344 pub const syntacore_scr3_rv64 = CpuModel{
2345 .name = "syntacore_scr3_rv64",
2346 .llvm_name = "syntacore-scr3-rv64",
2347 .features = featureSet(&[_]Feature{
2348 .@"64bit",
2349 .a,
2350 .c,
2351 .i,
1637 .m,2352 .m,
1638 .no_default_unroll,2353 .no_default_unroll,
2354 .use_postra_scheduler,
1639 .zicsr,2355 .zicsr,
1640 .zifencei,2356 .zifencei,
1641 }),2357 }),
...@@ -1649,6 +2365,7 @@ pub const cpu = struct {...@@ -1649,6 +2365,7 @@ pub const cpu = struct {
1649 .auipc_addi_fusion,2365 .auipc_addi_fusion,
1650 .c,2366 .c,
1651 .d,2367 .d,
2368 .i,
1652 .ld_add_fusion,2369 .ld_add_fusion,
1653 .lui_addi_fusion,2370 .lui_addi_fusion,
1654 .m,2371 .m,
...@@ -1678,12 +2395,17 @@ pub const cpu = struct {...@@ -1678,12 +2395,17 @@ pub const cpu = struct {
1678 .a,2395 .a,
1679 .c,2396 .c,
1680 .d,2397 .d,
2398 .i,
1681 .m,2399 .m,
2400 .no_default_unroll,
2401 .shifted_zextw_fusion,
1682 .svinval,2402 .svinval,
1683 .zba,2403 .zba,
1684 .zbb,2404 .zbb,
1685 .zbc,2405 .zbc,
1686 .zbs,2406 .zbs,
2407 .zexth_fusion,
2408 .zextw_fusion,
1687 .zicbom,2409 .zicbom,
1688 .zicboz,2410 .zicboz,
1689 .zifencei,2411 .zifencei,
lib/std/Target/s390x.zig+18
...@@ -40,7 +40,9 @@ pub const Feature = enum {...@@ -40,7 +40,9 @@ pub const Feature = enum {
40 reset_dat_protection,40 reset_dat_protection,
41 reset_reference_bits_multiple,41 reset_reference_bits_multiple,
42 soft_float,42 soft_float,
43 test_pending_external_interruption,
43 transactional_execution,44 transactional_execution,
45 unaligned_symbols,
44 vector,46 vector,
45 vector_enhancements_1,47 vector_enhancements_1,
46 vector_enhancements_2,48 vector_enhancements_2,
...@@ -233,11 +235,21 @@ pub const all_features = blk: {...@@ -233,11 +235,21 @@ pub const all_features = blk: {
233 .description = "Use software emulation for floating point",235 .description = "Use software emulation for floating point",
234 .dependencies = featureSet(&[_]Feature{}),236 .dependencies = featureSet(&[_]Feature{}),
235 };237 };
238 result[@intFromEnum(Feature.test_pending_external_interruption)] = .{
239 .llvm_name = "test-pending-external-interruption",
240 .description = "Assume that the test-pending-external-interruption facility is installed",
241 .dependencies = featureSet(&[_]Feature{}),
242 };
236 result[@intFromEnum(Feature.transactional_execution)] = .{243 result[@intFromEnum(Feature.transactional_execution)] = .{
237 .llvm_name = "transactional-execution",244 .llvm_name = "transactional-execution",
238 .description = "Assume that the transactional-execution facility is installed",245 .description = "Assume that the transactional-execution facility is installed",
239 .dependencies = featureSet(&[_]Feature{}),246 .dependencies = featureSet(&[_]Feature{}),
240 };247 };
248 result[@intFromEnum(Feature.unaligned_symbols)] = .{
249 .llvm_name = "unaligned-symbols",
250 .description = "Don't apply the ABI minimum alignment to external symbols.",
251 .dependencies = featureSet(&[_]Feature{}),
252 };
241 result[@intFromEnum(Feature.vector)] = .{253 result[@intFromEnum(Feature.vector)] = .{
242 .llvm_name = "vector",254 .llvm_name = "vector",
243 .description = "Assume that the vectory facility is installed",255 .description = "Assume that the vectory facility is installed",
...@@ -357,6 +369,7 @@ pub const cpu = struct {...@@ -357,6 +369,7 @@ pub const cpu = struct {
357 .population_count,369 .population_count,
358 .processor_assist,370 .processor_assist,
359 .reset_reference_bits_multiple,371 .reset_reference_bits_multiple,
372 .test_pending_external_interruption,
360 .transactional_execution,373 .transactional_execution,
361 .vector,374 .vector,
362 .vector_enhancements_1,375 .vector_enhancements_1,
...@@ -396,6 +409,7 @@ pub const cpu = struct {...@@ -396,6 +409,7 @@ pub const cpu = struct {
396 .population_count,409 .population_count,
397 .processor_assist,410 .processor_assist,
398 .reset_reference_bits_multiple,411 .reset_reference_bits_multiple,
412 .test_pending_external_interruption,
399 .transactional_execution,413 .transactional_execution,
400 .vector,414 .vector,
401 .vector_enhancements_1,415 .vector_enhancements_1,
...@@ -441,6 +455,7 @@ pub const cpu = struct {...@@ -441,6 +455,7 @@ pub const cpu = struct {
441 .processor_assist,455 .processor_assist,
442 .reset_dat_protection,456 .reset_dat_protection,
443 .reset_reference_bits_multiple,457 .reset_reference_bits_multiple,
458 .test_pending_external_interruption,
444 .transactional_execution,459 .transactional_execution,
445 .vector,460 .vector,
446 .vector_enhancements_1,461 .vector_enhancements_1,
...@@ -538,6 +553,7 @@ pub const cpu = struct {...@@ -538,6 +553,7 @@ pub const cpu = struct {
538 .population_count,553 .population_count,
539 .processor_assist,554 .processor_assist,
540 .reset_reference_bits_multiple,555 .reset_reference_bits_multiple,
556 .test_pending_external_interruption,
541 .transactional_execution,557 .transactional_execution,
542 .vector,558 .vector,
543 .vector_enhancements_1,559 .vector_enhancements_1,
...@@ -577,6 +593,7 @@ pub const cpu = struct {...@@ -577,6 +593,7 @@ pub const cpu = struct {
577 .population_count,593 .population_count,
578 .processor_assist,594 .processor_assist,
579 .reset_reference_bits_multiple,595 .reset_reference_bits_multiple,
596 .test_pending_external_interruption,
580 .transactional_execution,597 .transactional_execution,
581 .vector,598 .vector,
582 .vector_enhancements_1,599 .vector_enhancements_1,
...@@ -622,6 +639,7 @@ pub const cpu = struct {...@@ -622,6 +639,7 @@ pub const cpu = struct {
622 .processor_assist,639 .processor_assist,
623 .reset_dat_protection,640 .reset_dat_protection,
624 .reset_reference_bits_multiple,641 .reset_reference_bits_multiple,
642 .test_pending_external_interruption,
625 .transactional_execution,643 .transactional_execution,
626 .vector,644 .vector,
627 .vector_enhancements_1,645 .vector_enhancements_1,
lib/std/Target/wasm.zig+15
...@@ -9,6 +9,7 @@ pub const Feature = enum {...@@ -9,6 +9,7 @@ pub const Feature = enum {
9 bulk_memory,9 bulk_memory,
10 exception_handling,10 exception_handling,
11 extended_const,11 extended_const,
12 half_precision,
12 multimemory,13 multimemory,
13 multivalue,14 multivalue,
14 mutable_globals,15 mutable_globals,
...@@ -49,6 +50,11 @@ pub const all_features = blk: {...@@ -49,6 +50,11 @@ pub const all_features = blk: {
49 .description = "Enable extended const expressions",50 .description = "Enable extended const expressions",
50 .dependencies = featureSet(&[_]Feature{}),51 .dependencies = featureSet(&[_]Feature{}),
51 };52 };
53 result[@intFromEnum(Feature.half_precision)] = .{
54 .llvm_name = "half-precision",
55 .description = "Enable half precision instructions",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
52 result[@intFromEnum(Feature.multimemory)] = .{58 result[@intFromEnum(Feature.multimemory)] = .{
53 .llvm_name = "multimemory",59 .llvm_name = "multimemory",
54 .description = "Enable multiple memories",60 .description = "Enable multiple memories",
...@@ -109,8 +115,15 @@ pub const cpu = struct {...@@ -109,8 +115,15 @@ pub const cpu = struct {
109 .features = featureSet(&[_]Feature{115 .features = featureSet(&[_]Feature{
110 .atomics,116 .atomics,
111 .bulk_memory,117 .bulk_memory,
118 .exception_handling,
119 .extended_const,
120 .half_precision,
121 .multimemory,
122 .multivalue,
112 .mutable_globals,123 .mutable_globals,
113 .nontrapping_fptoint,124 .nontrapping_fptoint,
125 .reference_types,
126 .relaxed_simd,
114 .sign_ext,127 .sign_ext,
115 .simd128,128 .simd128,
116 .tail_call,129 .tail_call,
...@@ -120,7 +133,9 @@ pub const cpu = struct {...@@ -120,7 +133,9 @@ pub const cpu = struct {
120 .name = "generic",133 .name = "generic",
121 .llvm_name = "generic",134 .llvm_name = "generic",
122 .features = featureSet(&[_]Feature{135 .features = featureSet(&[_]Feature{
136 .multivalue,
123 .mutable_globals,137 .mutable_globals,
138 .reference_types,
124 .sign_ext,139 .sign_ext,
125 }),140 }),
126 };141 };
lib/std/Target/x86.zig+106-19
...@@ -45,6 +45,7 @@ pub const Feature = enum {...@@ -45,6 +45,7 @@ pub const Feature = enum {
45 avxvnniint8,45 avxvnniint8,
46 bmi,46 bmi,
47 bmi2,47 bmi2,
48 branch_hint,
48 branchfusion,49 branchfusion,
49 ccmp,50 ccmp,
50 cf,51 cf,
...@@ -73,8 +74,10 @@ pub const Feature = enum {...@@ -73,8 +74,10 @@ pub const Feature = enum {
73 fast_15bytenop,74 fast_15bytenop,
74 fast_7bytenop,75 fast_7bytenop,
75 fast_bextr,76 fast_bextr,
77 fast_dpwssd,
76 fast_gather,78 fast_gather,
77 fast_hops,79 fast_hops,
80 fast_imm16,
78 fast_lzcnt,81 fast_lzcnt,
79 fast_movbe,82 fast_movbe,
80 fast_scalar_fsqrt,83 fast_scalar_fsqrt,
...@@ -96,6 +99,7 @@ pub const Feature = enum {...@@ -96,6 +99,7 @@ pub const Feature = enum {
96 hreset,99 hreset,
97 idivl_to_divb,100 idivl_to_divb,
98 idivq_to_divl,101 idivq_to_divl,
102 inline_asm_use_gpr32,
99 invpcid,103 invpcid,
100 kl,104 kl,
101 lea_sp,105 lea_sp,
...@@ -111,6 +115,7 @@ pub const Feature = enum {...@@ -111,6 +115,7 @@ pub const Feature = enum {
111 movdiri,115 movdiri,
112 mwaitx,116 mwaitx,
113 ndd,117 ndd,
118 nf,
114 no_bypass_delay,119 no_bypass_delay,
115 no_bypass_delay_blend,120 no_bypass_delay_blend,
116 no_bypass_delay_mov,121 no_bypass_delay_mov,
...@@ -191,6 +196,7 @@ pub const Feature = enum {...@@ -191,6 +196,7 @@ pub const Feature = enum {
191 xsavec,196 xsavec,
192 xsaveopt,197 xsaveopt,
193 xsaves,198 xsaves,
199 zu,
194};200};
195201
196pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;202pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
...@@ -213,14 +219,14 @@ pub const all_features = blk: {...@@ -213,14 +219,14 @@ pub const all_features = blk: {
213 .dependencies = featureSet(&[_]Feature{}),219 .dependencies = featureSet(&[_]Feature{}),
214 };220 };
215 result[@intFromEnum(Feature.@"3dnow")] = .{221 result[@intFromEnum(Feature.@"3dnow")] = .{
216 .llvm_name = "3dnow",222 .llvm_name = null,
217 .description = "Enable 3DNow! instructions",223 .description = "Enable 3DNow! instructions",
218 .dependencies = featureSet(&[_]Feature{224 .dependencies = featureSet(&[_]Feature{
219 .mmx,225 .mmx,
220 }),226 }),
221 };227 };
222 result[@intFromEnum(Feature.@"3dnowa")] = .{228 result[@intFromEnum(Feature.@"3dnowa")] = .{
223 .llvm_name = "3dnowa",229 .llvm_name = null,
224 .description = "Enable 3DNow! Athlon instructions",230 .description = "Enable 3DNow! Athlon instructions",
225 .dependencies = featureSet(&[_]Feature{231 .dependencies = featureSet(&[_]Feature{
226 .@"3dnow",232 .@"3dnow",
...@@ -356,7 +362,7 @@ pub const all_features = blk: {...@@ -356,7 +362,7 @@ pub const all_features = blk: {
356 }),362 }),
357 };363 };
358 result[@intFromEnum(Feature.avx512er)] = .{364 result[@intFromEnum(Feature.avx512er)] = .{
359 .llvm_name = "avx512er",365 .llvm_name = null,
360 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",366 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
361 .dependencies = featureSet(&[_]Feature{367 .dependencies = featureSet(&[_]Feature{
362 .avx512f,368 .avx512f,
...@@ -388,7 +394,7 @@ pub const all_features = blk: {...@@ -388,7 +394,7 @@ pub const all_features = blk: {
388 }),394 }),
389 };395 };
390 result[@intFromEnum(Feature.avx512pf)] = .{396 result[@intFromEnum(Feature.avx512pf)] = .{
391 .llvm_name = "avx512pf",397 .llvm_name = null,
392 .description = "Enable AVX-512 PreFetch Instructions",398 .description = "Enable AVX-512 PreFetch Instructions",
393 .dependencies = featureSet(&[_]Feature{399 .dependencies = featureSet(&[_]Feature{
394 .avx512f,400 .avx512f,
...@@ -481,6 +487,11 @@ pub const all_features = blk: {...@@ -481,6 +487,11 @@ pub const all_features = blk: {
481 .description = "Support BMI2 instructions",487 .description = "Support BMI2 instructions",
482 .dependencies = featureSet(&[_]Feature{}),488 .dependencies = featureSet(&[_]Feature{}),
483 };489 };
490 result[@intFromEnum(Feature.branch_hint)] = .{
491 .llvm_name = "branch-hint",
492 .description = "Target has branch hint feature",
493 .dependencies = featureSet(&[_]Feature{}),
494 };
484 result[@intFromEnum(Feature.branchfusion)] = .{495 result[@intFromEnum(Feature.branchfusion)] = .{
485 .llvm_name = "branchfusion",496 .llvm_name = "branchfusion",
486 .description = "CMP/TEST can be fused with conditional branches",497 .description = "CMP/TEST can be fused with conditional branches",
...@@ -625,6 +636,11 @@ pub const all_features = blk: {...@@ -625,6 +636,11 @@ pub const all_features = blk: {
625 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",636 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
626 .dependencies = featureSet(&[_]Feature{}),637 .dependencies = featureSet(&[_]Feature{}),
627 };638 };
639 result[@intFromEnum(Feature.fast_dpwssd)] = .{
640 .llvm_name = "fast-dpwssd",
641 .description = "Prefer vpdpwssd instruction over vpmaddwd+vpaddd instruction sequence",
642 .dependencies = featureSet(&[_]Feature{}),
643 };
628 result[@intFromEnum(Feature.fast_gather)] = .{644 result[@intFromEnum(Feature.fast_gather)] = .{
629 .llvm_name = "fast-gather",645 .llvm_name = "fast-gather",
630 .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)",646 .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)",
...@@ -635,6 +651,11 @@ pub const all_features = blk: {...@@ -635,6 +651,11 @@ pub const all_features = blk: {
635 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",651 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
636 .dependencies = featureSet(&[_]Feature{}),652 .dependencies = featureSet(&[_]Feature{}),
637 };653 };
654 result[@intFromEnum(Feature.fast_imm16)] = .{
655 .llvm_name = "fast-imm16",
656 .description = "Prefer a i16 instruction with i16 immediate over extension to i32",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
638 result[@intFromEnum(Feature.fast_lzcnt)] = .{659 result[@intFromEnum(Feature.fast_lzcnt)] = .{
639 .llvm_name = "fast-lzcnt",660 .llvm_name = "fast-lzcnt",
640 .description = "LZCNT instructions are as fast as most simple integer ops",661 .description = "LZCNT instructions are as fast as most simple integer ops",
...@@ -747,6 +768,11 @@ pub const all_features = blk: {...@@ -747,6 +768,11 @@ pub const all_features = blk: {
747 .description = "Use 32-bit divide for positive values less than 2^32",768 .description = "Use 32-bit divide for positive values less than 2^32",
748 .dependencies = featureSet(&[_]Feature{}),769 .dependencies = featureSet(&[_]Feature{}),
749 };770 };
771 result[@intFromEnum(Feature.inline_asm_use_gpr32)] = .{
772 .llvm_name = "inline-asm-use-gpr32",
773 .description = "Enable use of GPR32 in inline assembly for APX",
774 .dependencies = featureSet(&[_]Feature{}),
775 };
750 result[@intFromEnum(Feature.invpcid)] = .{776 result[@intFromEnum(Feature.invpcid)] = .{
751 .llvm_name = "invpcid",777 .llvm_name = "invpcid",
752 .description = "Invalidate Process-Context Identifier",778 .description = "Invalidate Process-Context Identifier",
...@@ -824,6 +850,11 @@ pub const all_features = blk: {...@@ -824,6 +850,11 @@ pub const all_features = blk: {
824 .description = "Support non-destructive destination",850 .description = "Support non-destructive destination",
825 .dependencies = featureSet(&[_]Feature{}),851 .dependencies = featureSet(&[_]Feature{}),
826 };852 };
853 result[@intFromEnum(Feature.nf)] = .{
854 .llvm_name = "nf",
855 .description = "Support status flags update suppression",
856 .dependencies = featureSet(&[_]Feature{}),
857 };
827 result[@intFromEnum(Feature.no_bypass_delay)] = .{858 result[@intFromEnum(Feature.no_bypass_delay)] = .{
828 .llvm_name = "no-bypass-delay",859 .llvm_name = "no-bypass-delay",
829 .description = "Has no bypass delay when using the 'wrong' domain",860 .description = "Has no bypass delay when using the 'wrong' domain",
...@@ -917,7 +948,7 @@ pub const all_features = blk: {...@@ -917,7 +948,7 @@ pub const all_features = blk: {
917 .dependencies = featureSet(&[_]Feature{}),948 .dependencies = featureSet(&[_]Feature{}),
918 };949 };
919 result[@intFromEnum(Feature.prefetchwt1)] = .{950 result[@intFromEnum(Feature.prefetchwt1)] = .{
920 .llvm_name = "prefetchwt1",951 .llvm_name = null,
921 .description = "Prefetch with Intent to Write and T1 Hint",952 .description = "Prefetch with Intent to Write and T1 Hint",
922 .dependencies = featureSet(&[_]Feature{}),953 .dependencies = featureSet(&[_]Feature{}),
923 };954 };
...@@ -1269,6 +1300,11 @@ pub const all_features = blk: {...@@ -1269,6 +1300,11 @@ pub const all_features = blk: {
1269 .xsave,1300 .xsave,
1270 }),1301 }),
1271 };1302 };
1303 result[@intFromEnum(Feature.zu)] = .{
1304 .llvm_name = "zu",
1305 .description = "Support zero-upper SETcc/IMUL",
1306 .dependencies = featureSet(&[_]Feature{}),
1307 };
1272 const ti = @typeInfo(Feature);1308 const ti = @typeInfo(Feature);
1273 for (&result, 0..) |*elem, i| {1309 for (&result, 0..) |*elem, i| {
1274 elem.index = i;1310 elem.index = i;
...@@ -1357,6 +1393,7 @@ pub const cpu = struct {...@@ -1357,6 +1393,7 @@ pub const cpu = struct {
1357 .cx16,1393 .cx16,
1358 .fast_scalar_shift_masks,1394 .fast_scalar_shift_masks,
1359 .fxsr,1395 .fxsr,
1396 .idivq_to_divl,
1360 .lzcnt,1397 .lzcnt,
1361 .nopl,1398 .nopl,
1362 .popcnt,1399 .popcnt,
...@@ -1531,6 +1568,7 @@ pub const cpu = struct {...@@ -1531,6 +1568,7 @@ pub const cpu = struct {
1531 .cmov,1568 .cmov,
1532 .cx8,1569 .cx8,
1533 .nopl,1570 .nopl,
1571 .prfchw,
1534 .slow_shld,1572 .slow_shld,
1535 .slow_unaligned_mem_16,1573 .slow_unaligned_mem_16,
1536 .vzeroupper,1574 .vzeroupper,
...@@ -1548,6 +1586,7 @@ pub const cpu = struct {...@@ -1548,6 +1586,7 @@ pub const cpu = struct {
1548 .fast_scalar_shift_masks,1586 .fast_scalar_shift_masks,
1549 .fxsr,1587 .fxsr,
1550 .nopl,1588 .nopl,
1589 .prfchw,
1551 .sbb_dep_breaking,1590 .sbb_dep_breaking,
1552 .slow_shld,1591 .slow_shld,
1553 .slow_unaligned_mem_16,1592 .slow_unaligned_mem_16,
...@@ -1567,6 +1606,7 @@ pub const cpu = struct {...@@ -1567,6 +1606,7 @@ pub const cpu = struct {
1567 .fast_scalar_shift_masks,1606 .fast_scalar_shift_masks,
1568 .fxsr,1607 .fxsr,
1569 .nopl,1608 .nopl,
1609 .prfchw,
1570 .sbb_dep_breaking,1610 .sbb_dep_breaking,
1571 .slow_shld,1611 .slow_shld,
1572 .slow_unaligned_mem_16,1612 .slow_unaligned_mem_16,
...@@ -1584,6 +1624,7 @@ pub const cpu = struct {...@@ -1584,6 +1624,7 @@ pub const cpu = struct {
1584 .cx8,1624 .cx8,
1585 .fxsr,1625 .fxsr,
1586 .nopl,1626 .nopl,
1627 .prfchw,
1587 .slow_shld,1628 .slow_shld,
1588 .slow_unaligned_mem_16,1629 .slow_unaligned_mem_16,
1589 .sse,1630 .sse,
...@@ -1602,6 +1643,7 @@ pub const cpu = struct {...@@ -1602,6 +1643,7 @@ pub const cpu = struct {
1602 .fast_scalar_shift_masks,1643 .fast_scalar_shift_masks,
1603 .fxsr,1644 .fxsr,
1604 .nopl,1645 .nopl,
1646 .prfchw,
1605 .sbb_dep_breaking,1647 .sbb_dep_breaking,
1606 .slow_shld,1648 .slow_shld,
1607 .slow_unaligned_mem_16,1649 .slow_unaligned_mem_16,
...@@ -1619,6 +1661,7 @@ pub const cpu = struct {...@@ -1619,6 +1661,7 @@ pub const cpu = struct {
1619 .cx8,1661 .cx8,
1620 .fxsr,1662 .fxsr,
1621 .nopl,1663 .nopl,
1664 .prfchw,
1622 .slow_shld,1665 .slow_shld,
1623 .slow_unaligned_mem_16,1666 .slow_unaligned_mem_16,
1624 .sse,1667 .sse,
...@@ -1634,6 +1677,7 @@ pub const cpu = struct {...@@ -1634,6 +1677,7 @@ pub const cpu = struct {
1634 .cmov,1677 .cmov,
1635 .cx8,1678 .cx8,
1636 .nopl,1679 .nopl,
1680 .prfchw,
1637 .slow_shld,1681 .slow_shld,
1638 .slow_unaligned_mem_16,1682 .slow_unaligned_mem_16,
1639 .vzeroupper,1683 .vzeroupper,
...@@ -1649,6 +1693,7 @@ pub const cpu = struct {...@@ -1649,6 +1693,7 @@ pub const cpu = struct {
1649 .cx8,1693 .cx8,
1650 .fxsr,1694 .fxsr,
1651 .nopl,1695 .nopl,
1696 .prfchw,
1652 .slow_shld,1697 .slow_shld,
1653 .slow_unaligned_mem_16,1698 .slow_unaligned_mem_16,
1654 .sse,1699 .sse,
...@@ -1663,6 +1708,7 @@ pub const cpu = struct {...@@ -1663,6 +1708,7 @@ pub const cpu = struct {
1663 .@"64bit",1708 .@"64bit",
1664 .cmov,1709 .cmov,
1665 .cx16,1710 .cx16,
1711 .fast_imm16,
1666 .fxsr,1712 .fxsr,
1667 .idivl_to_divb,1713 .idivl_to_divb,
1668 .idivq_to_divl,1714 .idivq_to_divl,
...@@ -1693,6 +1739,7 @@ pub const cpu = struct {...@@ -1693,6 +1739,7 @@ pub const cpu = struct {
1693 .cx16,1739 .cx16,
1694 .false_deps_popcnt,1740 .false_deps_popcnt,
1695 .fast_7bytenop,1741 .fast_7bytenop,
1742 .fast_imm16,
1696 .fast_movbe,1743 .fast_movbe,
1697 .fsgsbase,1744 .fsgsbase,
1698 .fxsr,1745 .fxsr,
...@@ -1731,6 +1778,7 @@ pub const cpu = struct {...@@ -1731,6 +1778,7 @@ pub const cpu = struct {
1731 .cx16,1778 .cx16,
1732 .fast_scalar_shift_masks,1779 .fast_scalar_shift_masks,
1733 .fxsr,1780 .fxsr,
1781 .idivq_to_divl,
1734 .lzcnt,1782 .lzcnt,
1735 .nopl,1783 .nopl,
1736 .popcnt,1784 .popcnt,
...@@ -1756,6 +1804,7 @@ pub const cpu = struct {...@@ -1756,6 +1804,7 @@ pub const cpu = struct {
1756 .fast_11bytenop,1804 .fast_11bytenop,
1757 .fast_scalar_shift_masks,1805 .fast_scalar_shift_masks,
1758 .fxsr,1806 .fxsr,
1807 .idivq_to_divl,
1759 .lwp,1808 .lwp,
1760 .lzcnt,1809 .lzcnt,
1761 .mmx,1810 .mmx,
...@@ -1790,6 +1839,7 @@ pub const cpu = struct {...@@ -1790,6 +1839,7 @@ pub const cpu = struct {
1790 .fast_scalar_shift_masks,1839 .fast_scalar_shift_masks,
1791 .fma,1840 .fma,
1792 .fxsr,1841 .fxsr,
1842 .idivq_to_divl,
1793 .lwp,1843 .lwp,
1794 .lzcnt,1844 .lzcnt,
1795 .mmx,1845 .mmx,
...@@ -1826,6 +1876,7 @@ pub const cpu = struct {...@@ -1826,6 +1876,7 @@ pub const cpu = struct {
1826 .fma,1876 .fma,
1827 .fsgsbase,1877 .fsgsbase,
1828 .fxsr,1878 .fxsr,
1879 .idivq_to_divl,
1829 .lwp,1880 .lwp,
1830 .lzcnt,1881 .lzcnt,
1831 .mmx,1882 .mmx,
...@@ -1864,6 +1915,7 @@ pub const cpu = struct {...@@ -1864,6 +1915,7 @@ pub const cpu = struct {
1864 .fma,1915 .fma,
1865 .fsgsbase,1916 .fsgsbase,
1866 .fxsr,1917 .fxsr,
1918 .idivq_to_divl,
1867 .lwp,1919 .lwp,
1868 .lzcnt,1920 .lzcnt,
1869 .mmx,1921 .mmx,
...@@ -1891,6 +1943,7 @@ pub const cpu = struct {...@@ -1891,6 +1943,7 @@ pub const cpu = struct {
1891 .@"64bit",1943 .@"64bit",
1892 .cmov,1944 .cmov,
1893 .cx16,1945 .cx16,
1946 .fast_imm16,
1894 .fxsr,1947 .fxsr,
1895 .idivl_to_divb,1948 .idivl_to_divb,
1896 .idivq_to_divl,1949 .idivq_to_divl,
...@@ -1963,9 +2016,11 @@ pub const cpu = struct {...@@ -1963,9 +2016,11 @@ pub const cpu = struct {
1963 .cmov,2016 .cmov,
1964 .cx16,2017 .cx16,
1965 .fast_15bytenop,2018 .fast_15bytenop,
2019 .fast_imm16,
1966 .fast_scalar_shift_masks,2020 .fast_scalar_shift_masks,
1967 .fast_vector_shift_masks,2021 .fast_vector_shift_masks,
1968 .fxsr,2022 .fxsr,
2023 .idivq_to_divl,
1969 .lzcnt,2024 .lzcnt,
1970 .mmx,2025 .mmx,
1971 .nopl,2026 .nopl,
...@@ -1994,11 +2049,13 @@ pub const cpu = struct {...@@ -1994,11 +2049,13 @@ pub const cpu = struct {
1994 .fast_15bytenop,2049 .fast_15bytenop,
1995 .fast_bextr,2050 .fast_bextr,
1996 .fast_hops,2051 .fast_hops,
2052 .fast_imm16,
1997 .fast_lzcnt,2053 .fast_lzcnt,
1998 .fast_movbe,2054 .fast_movbe,
1999 .fast_scalar_shift_masks,2055 .fast_scalar_shift_masks,
2000 .fast_vector_shift_masks,2056 .fast_vector_shift_masks,
2001 .fxsr,2057 .fxsr,
2058 .idivq_to_divl,
2002 .lzcnt,2059 .lzcnt,
2003 .mmx,2060 .mmx,
2004 .movbe,2061 .movbe,
...@@ -2019,6 +2076,7 @@ pub const cpu = struct {...@@ -2019,6 +2076,7 @@ pub const cpu = struct {
2019 .llvm_name = "c3",2076 .llvm_name = "c3",
2020 .features = featureSet(&[_]Feature{2077 .features = featureSet(&[_]Feature{
2021 .@"3dnow",2078 .@"3dnow",
2079 .prfchw,
2022 .slow_unaligned_mem_16,2080 .slow_unaligned_mem_16,
2023 .vzeroupper,2081 .vzeroupper,
2024 .x87,2082 .x87,
...@@ -2324,6 +2382,7 @@ pub const cpu = struct {...@@ -2324,6 +2382,7 @@ pub const cpu = struct {
2324 .crc32,2382 .crc32,
2325 .cx16,2383 .cx16,
2326 .fxsr,2384 .fxsr,
2385 .idivq_to_divl,
2327 .macrofusion,2386 .macrofusion,
2328 .mmx,2387 .mmx,
2329 .no_bypass_delay_mov,2388 .no_bypass_delay_mov,
...@@ -2441,6 +2500,7 @@ pub const cpu = struct {...@@ -2441,6 +2500,7 @@ pub const cpu = struct {
2441 .features = featureSet(&[_]Feature{2500 .features = featureSet(&[_]Feature{
2442 .@"3dnowa",2501 .@"3dnowa",
2443 .cx8,2502 .cx8,
2503 .prfchw,
2444 .slow_unaligned_mem_16,2504 .slow_unaligned_mem_16,
2445 .vzeroupper,2505 .vzeroupper,
2446 .x87,2506 .x87,
...@@ -2457,6 +2517,7 @@ pub const cpu = struct {...@@ -2457,6 +2517,7 @@ pub const cpu = struct {
2457 .crc32,2517 .crc32,
2458 .cx16,2518 .cx16,
2459 .false_deps_popcnt,2519 .false_deps_popcnt,
2520 .fast_imm16,
2460 .fast_movbe,2521 .fast_movbe,
2461 .fsgsbase,2522 .fsgsbase,
2462 .fxsr,2523 .fxsr,
...@@ -2493,6 +2554,7 @@ pub const cpu = struct {...@@ -2493,6 +2554,7 @@ pub const cpu = struct {
2493 .cmov,2554 .cmov,
2494 .crc32,2555 .crc32,
2495 .cx16,2556 .cx16,
2557 .fast_imm16,
2496 .fast_movbe,2558 .fast_movbe,
2497 .fsgsbase,2559 .fsgsbase,
2498 .fxsr,2560 .fxsr,
...@@ -2547,8 +2609,6 @@ pub const cpu = struct {...@@ -2547,8 +2609,6 @@ pub const cpu = struct {
2547 .fxsr,2609 .fxsr,
2548 .gfni,2610 .gfni,
2549 .hreset,2611 .hreset,
2550 .idivl_to_divb,
2551 .idivq_to_divl,
2552 .invpcid,2612 .invpcid,
2553 .lzcnt,2613 .lzcnt,
2554 .macrofusion,2614 .macrofusion,
...@@ -2602,7 +2662,11 @@ pub const cpu = struct {...@@ -2602,7 +2662,11 @@ pub const cpu = struct {
2602 .cx16,2662 .cx16,
2603 .enqcmd,2663 .enqcmd,
2604 .f16c,2664 .f16c,
2605 .fast_movbe,2665 .false_deps_popcnt,
2666 .fast_15bytenop,
2667 .fast_scalar_fsqrt,
2668 .fast_variable_perlane_shuffle,
2669 .fast_vector_fsqrt,
2606 .fma,2670 .fma,
2607 .fsgsbase,2671 .fsgsbase,
2608 .fxsr,2672 .fxsr,
...@@ -2610,11 +2674,11 @@ pub const cpu = struct {...@@ -2610,11 +2674,11 @@ pub const cpu = struct {
2610 .hreset,2674 .hreset,
2611 .invpcid,2675 .invpcid,
2612 .lzcnt,2676 .lzcnt,
2677 .macrofusion,
2613 .mmx,2678 .mmx,
2614 .movbe,2679 .movbe,
2615 .movdir64b,2680 .movdir64b,
2616 .movdiri,2681 .movdiri,
2617 .no_bypass_delay,
2618 .nopl,2682 .nopl,
2619 .pconfig,2683 .pconfig,
2620 .pku,2684 .pku,
...@@ -2628,11 +2692,8 @@ pub const cpu = struct {...@@ -2628,11 +2692,8 @@ pub const cpu = struct {
2628 .serialize,2692 .serialize,
2629 .sha,2693 .sha,
2630 .shstk,2694 .shstk,
2631 .slow_incdec,2695 .slow_3ops_lea,
2632 .slow_lea,
2633 .slow_two_mem_ops,
2634 .uintr,2696 .uintr,
2635 .use_glm_div_sqrt_costs,
2636 .vaes,2697 .vaes,
2637 .vpclmulqdq,2698 .vpclmulqdq,
2638 .vzeroupper,2699 .vzeroupper,
...@@ -2666,6 +2727,7 @@ pub const cpu = struct {...@@ -2666,6 +2727,7 @@ pub const cpu = struct {
2666 .avxvnni,2727 .avxvnni,
2667 .bmi,2728 .bmi,
2668 .bmi2,2729 .bmi2,
2730 .branch_hint,
2669 .cldemote,2731 .cldemote,
2670 .clflushopt,2732 .clflushopt,
2671 .clwb,2733 .clwb,
...@@ -2754,6 +2816,7 @@ pub const cpu = struct {...@@ -2754,6 +2816,7 @@ pub const cpu = struct {
2754 .avxvnni,2816 .avxvnni,
2755 .bmi,2817 .bmi,
2756 .bmi2,2818 .bmi2,
2819 .branch_hint,
2757 .cldemote,2820 .cldemote,
2758 .clflushopt,2821 .clflushopt,
2759 .clwb,2822 .clwb,
...@@ -3080,6 +3143,7 @@ pub const cpu = struct {...@@ -3080,6 +3143,7 @@ pub const cpu = struct {
3080 .features = featureSet(&[_]Feature{3143 .features = featureSet(&[_]Feature{
3081 .@"3dnow",3144 .@"3dnow",
3082 .cx8,3145 .cx8,
3146 .prfchw,
3083 .slow_unaligned_mem_16,3147 .slow_unaligned_mem_16,
3084 .vzeroupper,3148 .vzeroupper,
3085 .x87,3149 .x87,
...@@ -3091,6 +3155,7 @@ pub const cpu = struct {...@@ -3091,6 +3155,7 @@ pub const cpu = struct {
3091 .features = featureSet(&[_]Feature{3155 .features = featureSet(&[_]Feature{
3092 .@"3dnow",3156 .@"3dnow",
3093 .cx8,3157 .cx8,
3158 .prfchw,
3094 .slow_unaligned_mem_16,3159 .slow_unaligned_mem_16,
3095 .vzeroupper,3160 .vzeroupper,
3096 .x87,3161 .x87,
...@@ -3107,6 +3172,7 @@ pub const cpu = struct {...@@ -3107,6 +3172,7 @@ pub const cpu = struct {
3107 .fast_scalar_shift_masks,3172 .fast_scalar_shift_masks,
3108 .fxsr,3173 .fxsr,
3109 .nopl,3174 .nopl,
3175 .prfchw,
3110 .sbb_dep_breaking,3176 .sbb_dep_breaking,
3111 .slow_shld,3177 .slow_shld,
3112 .slow_unaligned_mem_16,3178 .slow_unaligned_mem_16,
...@@ -3126,6 +3192,7 @@ pub const cpu = struct {...@@ -3126,6 +3192,7 @@ pub const cpu = struct {
3126 .fast_scalar_shift_masks,3192 .fast_scalar_shift_masks,
3127 .fxsr,3193 .fxsr,
3128 .nopl,3194 .nopl,
3195 .prfchw,
3129 .sbb_dep_breaking,3196 .sbb_dep_breaking,
3130 .slow_shld,3197 .slow_shld,
3131 .slow_unaligned_mem_16,3198 .slow_unaligned_mem_16,
...@@ -3151,6 +3218,7 @@ pub const cpu = struct {...@@ -3151,6 +3218,7 @@ pub const cpu = struct {
3151 .cx16,3218 .cx16,
3152 .evex512,3219 .evex512,
3153 .fast_gather,3220 .fast_gather,
3221 .fast_imm16,
3154 .fast_movbe,3222 .fast_movbe,
3155 .fsgsbase,3223 .fsgsbase,
3156 .fxsr,3224 .fxsr,
...@@ -3193,6 +3261,7 @@ pub const cpu = struct {...@@ -3193,6 +3261,7 @@ pub const cpu = struct {
3193 .cx16,3261 .cx16,
3194 .evex512,3262 .evex512,
3195 .fast_gather,3263 .fast_gather,
3264 .fast_imm16,
3196 .fast_movbe,3265 .fast_movbe,
3197 .fsgsbase,3266 .fsgsbase,
3198 .fxsr,3267 .fxsr,
...@@ -3384,6 +3453,7 @@ pub const cpu = struct {...@@ -3384,6 +3453,7 @@ pub const cpu = struct {
3384 .crc32,3453 .crc32,
3385 .cx16,3454 .cx16,
3386 .fxsr,3455 .fxsr,
3456 .idivq_to_divl,
3387 .macrofusion,3457 .macrofusion,
3388 .mmx,3458 .mmx,
3389 .no_bypass_delay_mov,3459 .no_bypass_delay_mov,
...@@ -3422,6 +3492,7 @@ pub const cpu = struct {...@@ -3422,6 +3492,7 @@ pub const cpu = struct {
3422 .fast_scalar_shift_masks,3492 .fast_scalar_shift_masks,
3423 .fxsr,3493 .fxsr,
3424 .nopl,3494 .nopl,
3495 .prfchw,
3425 .sbb_dep_breaking,3496 .sbb_dep_breaking,
3426 .slow_shld,3497 .slow_shld,
3427 .slow_unaligned_mem_16,3498 .slow_unaligned_mem_16,
...@@ -3441,6 +3512,7 @@ pub const cpu = struct {...@@ -3441,6 +3512,7 @@ pub const cpu = struct {
3441 .fast_scalar_shift_masks,3512 .fast_scalar_shift_masks,
3442 .fxsr,3513 .fxsr,
3443 .nopl,3514 .nopl,
3515 .prfchw,
3444 .sbb_dep_breaking,3516 .sbb_dep_breaking,
3445 .slow_shld,3517 .slow_shld,
3446 .slow_unaligned_mem_16,3518 .slow_unaligned_mem_16,
...@@ -3937,7 +4009,11 @@ pub const cpu = struct {...@@ -3937,7 +4009,11 @@ pub const cpu = struct {
3937 .cx16,4009 .cx16,
3938 .enqcmd,4010 .enqcmd,
3939 .f16c,4011 .f16c,
3940 .fast_movbe,4012 .false_deps_popcnt,
4013 .fast_15bytenop,
4014 .fast_scalar_fsqrt,
4015 .fast_variable_perlane_shuffle,
4016 .fast_vector_fsqrt,
3941 .fma,4017 .fma,
3942 .fsgsbase,4018 .fsgsbase,
3943 .fxsr,4019 .fxsr,
...@@ -3945,11 +4021,11 @@ pub const cpu = struct {...@@ -3945,11 +4021,11 @@ pub const cpu = struct {
3945 .hreset,4021 .hreset,
3946 .invpcid,4022 .invpcid,
3947 .lzcnt,4023 .lzcnt,
4024 .macrofusion,
3948 .mmx,4025 .mmx,
3949 .movbe,4026 .movbe,
3950 .movdir64b,4027 .movdir64b,
3951 .movdiri,4028 .movdiri,
3952 .no_bypass_delay,
3953 .nopl,4029 .nopl,
3954 .pconfig,4030 .pconfig,
3955 .pku,4031 .pku,
...@@ -3963,11 +4039,8 @@ pub const cpu = struct {...@@ -3963,11 +4039,8 @@ pub const cpu = struct {
3963 .serialize,4039 .serialize,
3964 .sha,4040 .sha,
3965 .shstk,4041 .shstk,
3966 .slow_incdec,4042 .slow_3ops_lea,
3967 .slow_lea,
3968 .slow_two_mem_ops,
3969 .uintr,4043 .uintr,
3970 .use_glm_div_sqrt_costs,
3971 .vaes,4044 .vaes,
3972 .vpclmulqdq,4045 .vpclmulqdq,
3973 .vzeroupper,4046 .vzeroupper,
...@@ -3989,6 +4062,7 @@ pub const cpu = struct {...@@ -3989,6 +4062,7 @@ pub const cpu = struct {
3989 .cx16,4062 .cx16,
3990 .false_deps_popcnt,4063 .false_deps_popcnt,
3991 .fast_7bytenop,4064 .fast_7bytenop,
4065 .fast_imm16,
3992 .fast_movbe,4066 .fast_movbe,
3993 .fxsr,4067 .fxsr,
3994 .idivq_to_divl,4068 .idivq_to_divl,
...@@ -4191,6 +4265,7 @@ pub const cpu = struct {...@@ -4191,6 +4265,7 @@ pub const cpu = struct {
4191 .cx16,4265 .cx16,
4192 .false_deps_popcnt,4266 .false_deps_popcnt,
4193 .fast_7bytenop,4267 .fast_7bytenop,
4268 .fast_imm16,
4194 .fast_movbe,4269 .fast_movbe,
4195 .fxsr,4270 .fxsr,
4196 .idivq_to_divl,4271 .idivq_to_divl,
...@@ -4293,6 +4368,7 @@ pub const cpu = struct {...@@ -4293,6 +4368,7 @@ pub const cpu = struct {
4293 .cmov,4368 .cmov,
4294 .crc32,4369 .crc32,
4295 .cx16,4370 .cx16,
4371 .fast_imm16,
4296 .fast_movbe,4372 .fast_movbe,
4297 .fsgsbase,4373 .fsgsbase,
4298 .fxsr,4374 .fxsr,
...@@ -4331,6 +4407,7 @@ pub const cpu = struct {...@@ -4331,6 +4407,7 @@ pub const cpu = struct {
4331 .crc32,4407 .crc32,
4332 .cx16,4408 .cx16,
4333 .fxsr,4409 .fxsr,
4410 .idivq_to_divl,
4334 .macrofusion,4411 .macrofusion,
4335 .mmx,4412 .mmx,
4336 .no_bypass_delay_mov,4413 .no_bypass_delay_mov,
...@@ -4348,6 +4425,7 @@ pub const cpu = struct {...@@ -4348,6 +4425,7 @@ pub const cpu = struct {
4348 .llvm_name = "winchip2",4425 .llvm_name = "winchip2",
4349 .features = featureSet(&[_]Feature{4426 .features = featureSet(&[_]Feature{
4350 .@"3dnow",4427 .@"3dnow",
4428 .prfchw,
4351 .slow_unaligned_mem_16,4429 .slow_unaligned_mem_16,
4352 .vzeroupper,4430 .vzeroupper,
4353 .x87,4431 .x87,
...@@ -4519,6 +4597,7 @@ pub const cpu = struct {...@@ -4519,6 +4597,7 @@ pub const cpu = struct {
4519 .f16c,4597 .f16c,
4520 .fast_15bytenop,4598 .fast_15bytenop,
4521 .fast_bextr,4599 .fast_bextr,
4600 .fast_imm16,
4522 .fast_lzcnt,4601 .fast_lzcnt,
4523 .fast_movbe,4602 .fast_movbe,
4524 .fast_scalar_fsqrt,4603 .fast_scalar_fsqrt,
...@@ -4528,6 +4607,7 @@ pub const cpu = struct {...@@ -4528,6 +4607,7 @@ pub const cpu = struct {
4528 .fma,4607 .fma,
4529 .fsgsbase,4608 .fsgsbase,
4530 .fxsr,4609 .fxsr,
4610 .idivq_to_divl,
4531 .lzcnt,4611 .lzcnt,
4532 .mmx,4612 .mmx,
4533 .movbe,4613 .movbe,
...@@ -4571,6 +4651,7 @@ pub const cpu = struct {...@@ -4571,6 +4651,7 @@ pub const cpu = struct {
4571 .f16c,4651 .f16c,
4572 .fast_15bytenop,4652 .fast_15bytenop,
4573 .fast_bextr,4653 .fast_bextr,
4654 .fast_imm16,
4574 .fast_lzcnt,4655 .fast_lzcnt,
4575 .fast_movbe,4656 .fast_movbe,
4576 .fast_scalar_fsqrt,4657 .fast_scalar_fsqrt,
...@@ -4580,6 +4661,7 @@ pub const cpu = struct {...@@ -4580,6 +4661,7 @@ pub const cpu = struct {
4580 .fma,4661 .fma,
4581 .fsgsbase,4662 .fsgsbase,
4582 .fxsr,4663 .fxsr,
4664 .idivq_to_divl,
4583 .lzcnt,4665 .lzcnt,
4584 .mmx,4666 .mmx,
4585 .movbe,4667 .movbe,
...@@ -4624,6 +4706,7 @@ pub const cpu = struct {...@@ -4624,6 +4706,7 @@ pub const cpu = struct {
4624 .f16c,4706 .f16c,
4625 .fast_15bytenop,4707 .fast_15bytenop,
4626 .fast_bextr,4708 .fast_bextr,
4709 .fast_imm16,
4627 .fast_lzcnt,4710 .fast_lzcnt,
4628 .fast_movbe,4711 .fast_movbe,
4629 .fast_scalar_fsqrt,4712 .fast_scalar_fsqrt,
...@@ -4634,6 +4717,7 @@ pub const cpu = struct {...@@ -4634,6 +4717,7 @@ pub const cpu = struct {
4634 .fsgsbase,4717 .fsgsbase,
4635 .fsrm,4718 .fsrm,
4636 .fxsr,4719 .fxsr,
4720 .idivq_to_divl,
4637 .invpcid,4721 .invpcid,
4638 .lzcnt,4722 .lzcnt,
4639 .macrofusion,4723 .macrofusion,
...@@ -4692,6 +4776,8 @@ pub const cpu = struct {...@@ -4692,6 +4776,8 @@ pub const cpu = struct {
4692 .evex512,4776 .evex512,
4693 .fast_15bytenop,4777 .fast_15bytenop,
4694 .fast_bextr,4778 .fast_bextr,
4779 .fast_dpwssd,
4780 .fast_imm16,
4695 .fast_lzcnt,4781 .fast_lzcnt,
4696 .fast_movbe,4782 .fast_movbe,
4697 .fast_scalar_fsqrt,4783 .fast_scalar_fsqrt,
...@@ -4702,6 +4788,7 @@ pub const cpu = struct {...@@ -4702,6 +4788,7 @@ pub const cpu = struct {
4702 .fsrm,4788 .fsrm,
4703 .fxsr,4789 .fxsr,
4704 .gfni,4790 .gfni,
4791 .idivq_to_divl,
4705 .invpcid,4792 .invpcid,
4706 .lzcnt,4793 .lzcnt,
4707 .macrofusion,4794 .macrofusion,