Commit db8bc4770c37470e8807c21571d483e3a73f9f69 | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2024-07-21 14:17:51+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2024-07-21 22:38:30+02:00
log	db8bc4770c37470e8807c21571d483e3a73f9f69
tree	5081485f9bae36094df14010dcadeb824733f640
parent	21cc5a20440e41a0f8b53b5eeac4ba5da55b64bf
signature	Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Remove the `tce`/`tcele` arch tags.

There is no obvious reason why this would be relevant for Zig to target. I
rather question the value of LLVM even having target triple code for this, too.

See: https://blog.llvm.org/2010/06/tce-project-co-design-of-application.html
See: https://github.com/cpc/llvmtce

6 files changed, 1 insertions(+), 51 deletions(-)

lib
- compiler
  - aro
    aro
    target.zig
- std
  - Target.zig
src
- Type.zig
- Zcu.zig
- codegen
  - llvm.zig
- target.zig

lib/compiler/aro/aro/target.zig+1-11

...	@@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type {	...	@@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type {
17	.riscv64,	17	.riscv64,
18	.powerpc64,	18	.powerpc64,
19	.powerpc64le,	19	.powerpc64le,
20	.tce,
21	.tcele,
22	.ve,	20	.ve,
23	=> return .{ .specifier = .long },	21	=> return .{ .specifier = .long },
24		22
...	@@ -54,8 +52,6 @@ pub fn intPtrType(target: std.Target) Type {	...	@@ -54,8 +52,6 @@ pub fn intPtrType(target: std.Target) Type {
54	.riscv32,	52	.riscv32,
55	.xcore,	53	.xcore,
56	.hexagon,	54	.hexagon,
57	.tce,
58	.tcele,
59	.m68k,	55	.m68k,
60	.spir,	56	.spir,
61	.spirv32,	57	.spirv32,
...	@@ -153,7 +149,7 @@ pub fn isTlsSupported(target: std.Target) bool {	...	@@ -153,7 +149,7 @@ pub fn isTlsSupported(target: std.Target) bool {
153	return supported;	149	return supported;
154	}	150	}
155	return switch (target.cpu.arch) {	151	return switch (target.cpu.arch) {
156	.tce, .tcele, .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,	152	.bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,
157	else => true,	153	else => true,
158	};	154	};
159	}	155	}
...	@@ -473,8 +469,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {	...	@@ -473,8 +469,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
473	.riscv32,	469	.riscv32,
474	.sparc,	470	.sparc,
475	.sparcel,	471	.sparcel,
476	.tce,
477	.tcele,
478	.thumb,	472	.thumb,
479	.thumbeb,	473	.thumbeb,
480	.x86,	474	.x86,
...	@@ -523,8 +517,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {	...	@@ -523,8 +517,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
523	.msp430,	517	.msp430,
524	.sparcel,	518	.sparcel,
525	.spu_2,	519	.spu_2,
526	.tce,
527	.tcele,
528	.xcore,	520	.xcore,
529	.xtensa,	521	.xtensa,
530	=> return null,	522	=> return null,
...	@@ -611,8 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {	...	@@ -611,8 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
611	.sparc64 => "sparc64",	603	.sparc64 => "sparc64",
612	.sparcel => "sparcel",	604	.sparcel => "sparcel",
613	.s390x => "s390x",	605	.s390x => "s390x",
614	.tce => "tce",
615	.tcele => "tcele",
616	.thumb => "thumb",	606	.thumb => "thumb",
617	.thumbeb => "thumbeb",	607	.thumbeb => "thumbeb",
618	.x86 => "i386",	608	.x86 => "i386",

lib/std/Target.zig-28

...	@@ -1001,8 +1001,6 @@ pub const Cpu = struct {	...	@@ -1001,8 +1001,6 @@ pub const Cpu = struct {
1001	sparc64,	1001	sparc64,
1002	sparcel,	1002	sparcel,
1003	s390x,	1003	s390x,
1004	tce,
1005	tcele,
1006	thumb,	1004	thumb,
1007	thumbeb,	1005	thumbeb,
1008	x86,	1006	x86,
...	@@ -1143,8 +1141,6 @@ pub const Cpu = struct {	...	@@ -1143,8 +1141,6 @@ pub const Cpu = struct {
1143	.riscv32 => .RISCV,	1141	.riscv32 => .RISCV,
1144	.sparc => .SPARC,	1142	.sparc => .SPARC,
1145	.sparcel => .SPARC,	1143	.sparcel => .SPARC,
1146	.tce => .NONE,
1147	.tcele => .NONE,
1148	.thumb => .ARM,	1144	.thumb => .ARM,
1149	.thumbeb => .ARM,	1145	.thumbeb => .ARM,
1150	.x86 => .@"386",	1146	.x86 => .@"386",
...	@@ -1199,8 +1195,6 @@ pub const Cpu = struct {	...	@@ -1199,8 +1195,6 @@ pub const Cpu = struct {
1199	.riscv32 => .RISCV32,	1195	.riscv32 => .RISCV32,
1200	.sparc => .Unknown,	1196	.sparc => .Unknown,
1201	.sparcel => .Unknown,	1197	.sparcel => .Unknown,
1202	.tce => .Unknown,
1203	.tcele => .Unknown,
1204	.thumb => .Thumb,	1198	.thumb => .Thumb,
1205	.thumbeb => .Thumb,	1199	.thumbeb => .Thumb,
1206	.x86 => .I386,	1200	.x86 => .I386,
...	@@ -1257,7 +1251,6 @@ pub const Cpu = struct {	...	@@ -1257,7 +1251,6 @@ pub const Cpu = struct {
1257	.nvptx,	1251	.nvptx,
1258	.nvptx64,	1252	.nvptx64,
1259	.sparcel,	1253	.sparcel,
1260	.tcele,
1261	.powerpcle,	1254	.powerpcle,
1262	.powerpc64le,	1255	.powerpc64le,
1263	.riscv32,	1256	.riscv32,
...	@@ -1293,7 +1286,6 @@ pub const Cpu = struct {	...	@@ -1293,7 +1286,6 @@ pub const Cpu = struct {
1293	.thumbeb,	1286	.thumbeb,
1294	.sparc,	1287	.sparc,
1295	.sparc64,	1288	.sparc64,
1296	.tce,
1297	.lanai,	1289	.lanai,
1298	.s390x,	1290	.s390x,
1299	=> .big,	1291	=> .big,
...	@@ -1749,8 +1741,6 @@ pub const DynamicLinker = struct {	...	@@ -1749,8 +1741,6 @@ pub const DynamicLinker = struct {
1749	.m68k,	1741	.m68k,
1750	.msp430,	1742	.msp430,
1751	.amdgcn,	1743	.amdgcn,
1752	.tce,
1753	.tcele,
1754	.xcore,	1744	.xcore,
1755	.spir,	1745	.spir,
1756	.spir64,	1746	.spir64,
...	@@ -1846,8 +1836,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {	...	@@ -1846,8 +1836,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1846	.powerpcle,	1836	.powerpcle,
1847	.riscv32,	1837	.riscv32,
1848	.sparcel,	1838	.sparcel,
1849	.tce,
1850	.tcele,
1851	.thumb,	1839	.thumb,
1852	.thumbeb,	1840	.thumbeb,
1853	.x86,	1841	.x86,
...	@@ -2022,12 +2010,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {	...	@@ -2022,12 +2010,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2022	.long, .ulong, .float, .double, .longdouble => return 32,	2010	.long, .ulong, .float, .double, .longdouble => return 32,
2023	.longlong, .ulonglong => return 64,	2011	.longlong, .ulonglong => return 64,
2024	},	2012	},
2025	.tce, .tcele => switch (c_type) {
2026	.char => return 8,
2027	.short, .ushort => return 16,
2028	.int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2029	.float, .double, .longdouble => return 32,
2030	},
2031	.mips64, .mips64el => switch (c_type) {	2013	.mips64, .mips64el => switch (c_type) {
2032	.char => return 8,	2014	.char => return 8,
2033	.short, .ushort => return 16,	2015	.short, .ushort => return 16,
...	@@ -2117,12 +2099,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {	...	@@ -2117,12 +2099,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2117	.long, .ulong, .float, .double, .longdouble => return 32,	2099	.long, .ulong, .float, .double, .longdouble => return 32,
2118	.longlong, .ulonglong => return 64,	2100	.longlong, .ulonglong => return 64,
2119	},	2101	},
2120	.tce, .tcele => switch (c_type) {
2121	.char => return 8,
2122	.short, .ushort => return 16,
2123	.int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2124	.float, .double, .longdouble => return 32,
2125	},
2126	.mips64, .mips64el => switch (c_type) {	2102	.mips64, .mips64el => switch (c_type) {
2127	.char => return 8,	2103	.char => return 8,
2128	.short, .ushort => return 16,	2104	.short, .ushort => return 16,
...	@@ -2370,8 +2346,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {	...	@@ -2370,8 +2346,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2370	.xcore,	2346	.xcore,
2371	.dxil,	2347	.dxil,
2372	.loongarch32,	2348	.loongarch32,
2373	.tce,
2374	.tcele,
2375	.spir,	2349	.spir,
2376	.spirv32,	2350	.spirv32,
2377	.kalimba,	2351	.kalimba,
...	@@ -2481,8 +2455,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {	...	@@ -2481,8 +2455,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2481	.xcore,	2455	.xcore,
2482	.dxil,	2456	.dxil,
2483	.loongarch32,	2457	.loongarch32,
2484	.tce,
2485	.tcele,
2486	.spir,	2458	.spir,
2487	.spirv32,	2459	.spirv32,
2488	.kalimba,	2460	.kalimba,

src/Type.zig-2

...	@@ -1648,8 +1648,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {	...	@@ -1648,8 +1648,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1648	.csky,	1648	.csky,
1649	.arc,	1649	.arc,
1650	.m68k,	1650	.m68k,
1651	.tce,
1652	.tcele,
1653	.spir,	1651	.spir,
1654	.kalimba,	1652	.kalimba,
1655	.spirv,	1653	.spirv,

src/Zcu.zig-2

...	@@ -3249,8 +3249,6 @@ pub fn atomicPtrAlignment(	...	@@ -3249,8 +3249,6 @@ pub fn atomicPtrAlignment(
3249	.riscv32,	3249	.riscv32,
3250	.sparc,	3250	.sparc,
3251	.sparcel,	3251	.sparcel,
3252	.tce,
3253	.tcele,
3254	.thumb,	3252	.thumb,
3255	.thumbeb,	3253	.thumbeb,
3256	.x86,	3254	.x86,

src/codegen/llvm.zig-6

...	@@ -72,8 +72,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {	...	@@ -72,8 +72,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
72	.sparc64 => "sparc64",	72	.sparc64 => "sparc64",
73	.sparcel => "sparcel",	73	.sparcel => "sparcel",
74	.s390x => "s390x",	74	.s390x => "s390x",
75	.tce => "tce",
76	.tcele => "tcele",
77	.thumb => "thumb",	75	.thumb => "thumb",
78	.thumbeb => "thumbeb",	76	.thumbeb => "thumbeb",
79	.x86 => "i386",	77	.x86 => "i386",
...	@@ -288,8 +286,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {	...	@@ -288,8 +286,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
288	.sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.	286	.sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.
289	.sparcel => .sparcel,	287	.sparcel => .sparcel,
290	.s390x => .systemz,	288	.s390x => .systemz,
291	.tce => .tce,
292	.tcele => .tcele,
293	.thumb => .thumb,	289	.thumb => .thumb,
294	.thumbeb => .thumbeb,	290	.thumbeb => .thumbeb,
295	.x86 => .x86,	291	.x86 => .x86,
...	@@ -12076,8 +12072,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {	...	@@ -12076,8 +12072,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12076	},	12072	},
12077		12073
12078	// LLVM backends that have no initialization functions.	12074	// LLVM backends that have no initialization functions.
12079	.tce,
12080	.tcele,
12081	.spir,	12075	.spir,
12082	.spir64,	12076	.spir64,
12083	.spirv,	12077	.spirv,

src/target.zig-2

...	@@ -142,8 +142,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {	...	@@ -142,8 +142,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
142	.sparc64,	142	.sparc64,
143	.sparcel,	143	.sparcel,
144	.s390x,	144	.s390x,
145	.tce,
146	.tcele,
147	.thumb,	145	.thumb,
148	.thumbeb,	146	.thumbeb,
149	.x86,	147	.x86,