authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-08-23 16:54:32+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-10-07 00:30:52+02:00
loge4ad3e963eecaa2743910ec1a9fe36b621e259eb
treec1863e87b4f1d6ef004abab254e209772a1b613a
parent02488d96d636e930c8eb97c90b8a97e27bdde123
signature Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

test-behavior: re-enable float `vector cmp` tests on powerpc64

1 files changed, 0 insertions(+), 3 deletions(-)

test/behavior/floatop.zig-3
...@@ -234,7 +234,6 @@ test "vector cmp f32" {...@@ -234,7 +234,6 @@ test "vector cmp f32" {
234 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isArm()) return error.SkipZigTest;234 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isArm()) return error.SkipZigTest;
235 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isAarch64() and builtin.os.tag == .netbsd) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/36765235 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isAarch64() and builtin.os.tag == .netbsd) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/36765
236 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isAarch64() and builtin.os.tag == .netbsd) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/36765236 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isAarch64() and builtin.os.tag == .netbsd) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/36765
237 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/214198
238 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;237 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
239238
240 try testCmpVector(f32);239 try testCmpVector(f32);
...@@ -258,7 +257,6 @@ test "vector cmp f128" {...@@ -258,7 +257,6 @@ test "vector cmp f128" {
258 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO257 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
259 if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;258 if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
260 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;259 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
261 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/214198
262 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;260 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
263261
264 try testCmpVector(f128);262 try testCmpVector(f128);
...@@ -268,7 +266,6 @@ test "vector cmp f128" {...@@ -268,7 +266,6 @@ test "vector cmp f128" {
268test "vector cmp f80/c_longdouble" {266test "vector cmp f80/c_longdouble" {
269 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;267 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
270 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;268 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
271 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/214198
272 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;269 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
273 if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;270 if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
274271