authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2019-06-12 18:08:56-04:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2019-06-12 18:08:56-04:00
loge6fa2ee70632ef1efbe3ebc54214abf30d6d40c1
treed9185c839d2efae13b5a7a35e34364914a7a52b7
parent1526d89711c90a4a98dfecb6d3c64f28c3ab7da6
signaturelock-open Commit is signed but in an unrecognized format.

fix nested peer result locs with no memory loc

```zig export fn entry2(c: bool) i32 { return if (c) i32(0) else if (c) i32(1) else i32(2); } ``` ```llvm define i32 @entry2(i1) #2 !dbg !35 { Entry: %c = alloca i1, align 1 store i1 %0, i1* %c, align 1 call void @llvm.dbg.declare(metadata i1* %c, metadata !41, metadata !DIExpression()), !dbg !42 %1 = load i1, i1* %c, align 1, !dbg !43 br i1 %1, label %Then, label %Else, !dbg !43 Then: ; preds = %Entry br label %EndIf3, !dbg !45 Else: ; preds = %Entry %2 = load i1, i1* %c, align 1, !dbg !46 br i1 %2, label %Then1, label %Else2, !dbg !46 Then1: ; preds = %Else br label %EndIf, !dbg !47 Else2: ; preds = %Else br label %EndIf, !dbg !47 EndIf: ; preds = %Else2, %Then1 %3 = phi i32 [ 1, %Then1 ], [ 2, %Else2 ], !dbg !47 br label %EndIf3, !dbg !45 EndIf3: ; preds = %EndIf, %Then %4 = phi i32 [ 0, %Then ], [ %3, %EndIf ], !dbg !45 ret i32 %4, !dbg !48 } ```

2 files changed, 17 insertions(+), 11 deletions(-)

src/all_types.hpp+1
......@@ -3652,6 +3652,7 @@ struct ResultLocReturn {
36523652struct ResultLocPeerParent {
36533653 ResultLoc base;
36543654
3655 bool skipped;
36553656 ResultLoc *parent;
36563657 ResultLocPeer *peers;
36573658 size_t peer_count;
src/ir.cpp+16-11
......@@ -14899,7 +14899,10 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1489914899 bool is_comptime;
1490014900 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_comptime))
1490114901 return ira->codegen->invalid_instruction;
14902 if (is_comptime) return nullptr;
14902 peer_parent->skipped = is_comptime;
14903 if (peer_parent->skipped) {
14904 return nullptr;
14905 }
1490314906
1490414907 if (peer_parent->resolved_type == nullptr) {
1490514908 ResultLocPeer *last_peer = &peer_parent->peers[peer_parent->peer_count - 1];
......@@ -14916,6 +14919,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1491614919 {
1491714920 return parent_result_loc;
1491814921 }
14922 result_loc->written = true;
1491914923 result_loc->resolved_loc = parent_result_loc;
1492014924 return result_loc->resolved_loc;
1492114925 }
......@@ -16385,16 +16389,15 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1638516389 }
1638616390
1638716391 ResultLocPeerParent *peer_parent = phi_instruction->peer_parent;
16388 if (peer_parent != nullptr && peer_parent->resolved_type == nullptr) {
16389 bool is_comptime;
16390 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_comptime))
16391 return ira->codegen->invalid_instruction;
16392 if (is_comptime) goto skip_peer_stuff;
16393
16392 if (peer_parent != nullptr && peer_parent->resolved_type == nullptr && !peer_parent->skipped) {
1639416393 // Suspend the phi first so that it gets resumed last
16395 IrSuspendPosition suspend_pos;
16396 ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);
16397 ira->resume_stack.append(suspend_pos);
16394 ira->resume_stack.add_one();
16395 for (size_t i = ira->resume_stack.length;;) {
16396 if (i <= 1) break;
16397 i -= 1;
16398 ira->resume_stack.items[i] = ira->resume_stack.items[i-1];
16399 }
16400 ira_suspend(ira, &phi_instruction->base, nullptr, &ira->resume_stack.items[0]);
1639816401
1639916402 IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peer_count);
1640016403 for (size_t i = 0; i < peer_parent->peer_count; i += 1) {
......@@ -16427,7 +16430,6 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1642716430
1642816431 return ira_resume(ira);
1642916432 }
16430skip_peer_stuff:
1643116433
1643216434 ZigList<IrBasicBlock*> new_incoming_blocks = {0};
1643316435 ZigList<IrInstruction*> new_incoming_values = {0};
......@@ -24598,6 +24600,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2459824600 continue;
2459924601 }
2460024602
24603 if (ira->codegen->verbose_ir) {
24604 fprintf(stderr, "analyze #%zu\n", old_instruction->debug_id);
24605 }
2460124606 IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
2460224607 if (new_instruction != nullptr) {
2460324608 ir_assert(new_instruction->value.type != nullptr || new_instruction->value.type != nullptr, old_instruction);