authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-03 03:29:30+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-03 04:00:32+02:00
loge87387ee0cac673b73ec655694a5a205a11ede0f
treea98b6521a57b1bfbb7cb12da69012ea4e5d5fbfb
parent8ff104380d76e86302061c1cf8adf565bb3df1b7
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.zig.system.arm: Update some of the CPU lists based on LLVM 19.

1 files changed, 56 insertions(+), 31 deletions(-)

lib/std/zig/system/arm.zig+56-31
...@@ -22,32 +22,34 @@ pub const cpu_models = struct {...@@ -22,32 +22,34 @@ pub const cpu_models = struct {
2222
23 // implementer = 0x4123 // implementer = 0x41
24 const ARM = [_]E{24 const ARM = [_]E{
25 E{ .part = 0x926, .m32 = &A32.arm926ej_s, .m64 = null },25 E{ .part = 0x926, .m32 = &A32.arm926ej_s },
26 E{ .part = 0xb02, .m32 = &A32.mpcore, .m64 = null },26 E{ .part = 0xb02, .m32 = &A32.mpcore },
27 E{ .part = 0xb36, .m32 = &A32.arm1136j_s, .m64 = null },27 E{ .part = 0xb36, .m32 = &A32.arm1136j_s },
28 E{ .part = 0xb56, .m32 = &A32.arm1156t2_s, .m64 = null },28 E{ .part = 0xb56, .m32 = &A32.arm1156t2_s },
29 E{ .part = 0xb76, .m32 = &A32.arm1176jz_s, .m64 = null },29 E{ .part = 0xb76, .m32 = &A32.arm1176jz_s },
30 E{ .part = 0xc05, .m32 = &A32.cortex_a5, .m64 = null },30 E{ .part = 0xc05, .m32 = &A32.cortex_a5 },
31 E{ .part = 0xc07, .m32 = &A32.cortex_a7, .m64 = null },31 E{ .part = 0xc07, .m32 = &A32.cortex_a7 },
32 E{ .part = 0xc08, .m32 = &A32.cortex_a8, .m64 = null },32 E{ .part = 0xc08, .m32 = &A32.cortex_a8 },
33 E{ .part = 0xc09, .m32 = &A32.cortex_a9, .m64 = null },33 E{ .part = 0xc09, .m32 = &A32.cortex_a9 },
34 E{ .part = 0xc0d, .m32 = &A32.cortex_a17, .m64 = null },34 E{ .part = 0xc0d, .m32 = &A32.cortex_a17 },
35 E{ .part = 0xc0f, .m32 = &A32.cortex_a15, .m64 = null },35 E{ .part = 0xc0e, .m32 = &A32.cortex_a17 },
36 E{ .part = 0xc0e, .m32 = &A32.cortex_a17, .m64 = null },36 E{ .part = 0xc0f, .m32 = &A32.cortex_a15 },
37 E{ .part = 0xc14, .m32 = &A32.cortex_r4, .m64 = null },37 E{ .part = 0xc14, .m32 = &A32.cortex_r4 },
38 E{ .part = 0xc15, .m32 = &A32.cortex_r5, .m64 = null },38 E{ .part = 0xc15, .m32 = &A32.cortex_r5 },
39 E{ .part = 0xc17, .m32 = &A32.cortex_r7, .m64 = null },39 E{ .part = 0xc17, .m32 = &A32.cortex_r7 },
40 E{ .part = 0xc18, .m32 = &A32.cortex_r8, .m64 = null },40 E{ .part = 0xc18, .m32 = &A32.cortex_r8 },
41 E{ .part = 0xc20, .m32 = &A32.cortex_m0, .m64 = null },41 E{ .part = 0xc20, .m32 = &A32.cortex_m0 },
42 E{ .part = 0xc21, .m32 = &A32.cortex_m1, .m64 = null },42 E{ .part = 0xc21, .m32 = &A32.cortex_m1 },
43 E{ .part = 0xc23, .m32 = &A32.cortex_m3, .m64 = null },43 E{ .part = 0xc23, .m32 = &A32.cortex_m3 },
44 E{ .part = 0xc24, .m32 = &A32.cortex_m4, .m64 = null },44 E{ .part = 0xc24, .m32 = &A32.cortex_m4 },
45 E{ .part = 0xc27, .m32 = &A32.cortex_m7, .m64 = null },45 E{ .part = 0xc27, .m32 = &A32.cortex_m7 },
46 E{ .part = 0xc60, .m32 = &A32.cortex_m0plus, .m64 = null },46 E{ .part = 0xc60, .m32 = &A32.cortex_m0plus },
47 E{ .part = 0xd01, .m32 = &A32.cortex_a32, .m64 = null },47 E{ .part = 0xd01, .m32 = &A32.cortex_a32 },
48 E{ .part = 0xd02, .m64 = &A64.cortex_a34 },
48 E{ .part = 0xd03, .m32 = &A32.cortex_a53, .m64 = &A64.cortex_a53 },49 E{ .part = 0xd03, .m32 = &A32.cortex_a53, .m64 = &A64.cortex_a53 },
49 E{ .part = 0xd04, .m32 = &A32.cortex_a35, .m64 = &A64.cortex_a35 },50 E{ .part = 0xd04, .m32 = &A32.cortex_a35, .m64 = &A64.cortex_a35 },
50 E{ .part = 0xd05, .m32 = &A32.cortex_a55, .m64 = &A64.cortex_a55 },51 E{ .part = 0xd05, .m32 = &A32.cortex_a55, .m64 = &A64.cortex_a55 },
52 E{ .part = 0xd06, .m64 = &A64.cortex_a65 },
51 E{ .part = 0xd07, .m32 = &A32.cortex_a57, .m64 = &A64.cortex_a57 },53 E{ .part = 0xd07, .m32 = &A32.cortex_a57, .m64 = &A64.cortex_a57 },
52 E{ .part = 0xd08, .m32 = &A32.cortex_a72, .m64 = &A64.cortex_a72 },54 E{ .part = 0xd08, .m32 = &A32.cortex_a72, .m64 = &A64.cortex_a72 },
53 E{ .part = 0xd09, .m32 = &A32.cortex_a73, .m64 = &A64.cortex_a73 },55 E{ .part = 0xd09, .m32 = &A32.cortex_a73, .m64 = &A64.cortex_a73 },
...@@ -55,16 +57,38 @@ pub const cpu_models = struct {...@@ -55,16 +57,38 @@ pub const cpu_models = struct {
55 E{ .part = 0xd0b, .m32 = &A32.cortex_a76, .m64 = &A64.cortex_a76 },57 E{ .part = 0xd0b, .m32 = &A32.cortex_a76, .m64 = &A64.cortex_a76 },
56 E{ .part = 0xd0c, .m32 = &A32.neoverse_n1, .m64 = &A64.neoverse_n1 },58 E{ .part = 0xd0c, .m32 = &A32.neoverse_n1, .m64 = &A64.neoverse_n1 },
57 E{ .part = 0xd0d, .m32 = &A32.cortex_a77, .m64 = &A64.cortex_a77 },59 E{ .part = 0xd0d, .m32 = &A32.cortex_a77, .m64 = &A64.cortex_a77 },
58 E{ .part = 0xd13, .m32 = &A32.cortex_r52, .m64 = null },60 E{ .part = 0xd0e, .m32 = &A32.cortex_a76ae, .m64 = &A64.cortex_a76ae },
59 E{ .part = 0xd20, .m32 = &A32.cortex_m23, .m64 = null },61 E{ .part = 0xd13, .m32 = &A32.cortex_r52 },
60 E{ .part = 0xd21, .m32 = &A32.cortex_m33, .m64 = null },62 E{ .part = 0xd14, .m64 = &A64.cortex_r82ae },
63 E{ .part = 0xd15, .m64 = &A64.cortex_r82 },
64 E{ .part = 0xd16, .m32 = &A32.cortex_r52plus },
65 E{ .part = 0xd20, .m32 = &A32.cortex_m23 },
66 E{ .part = 0xd21, .m32 = &A32.cortex_m33 },
67 E{ .part = 0xd40, .m32 = &A32.neoverse_v1, .m64 = &A64.neoverse_v1 },
61 E{ .part = 0xd41, .m32 = &A32.cortex_a78, .m64 = &A64.cortex_a78 },68 E{ .part = 0xd41, .m32 = &A32.cortex_a78, .m64 = &A64.cortex_a78 },
69 E{ .part = 0xd42, .m32 = &A32.cortex_a78ae, .m64 = &A64.cortex_a78ae },
70 E{ .part = 0xd43, .m64 = &A64.cortex_a65ae },
71 E{ .part = 0xd44, .m32 = &A32.cortex_x1, .m64 = &A64.cortex_x1 },
72 E{ .part = 0xd46, .m64 = &A64.cortex_a510 },
73 E{ .part = 0xd47, .m32 = &A32.cortex_a710, .m64 = &A64.cortex_a710 },
74 E{ .part = 0xd48, .m64 = &A64.cortex_x2 },
75 E{ .part = 0xd49, .m32 = &A32.neoverse_n2, .m64 = &A64.neoverse_n2 },
76 E{ .part = 0xd4a, .m64 = &A64.neoverse_e1 },
62 E{ .part = 0xd4b, .m32 = &A32.cortex_a78c, .m64 = &A64.cortex_a78c },77 E{ .part = 0xd4b, .m32 = &A32.cortex_a78c, .m64 = &A64.cortex_a78c },
63 E{ .part = 0xd4c, .m32 = &A32.cortex_x1c, .m64 = &A64.cortex_x1c },78 E{ .part = 0xd4c, .m32 = &A32.cortex_x1c, .m64 = &A64.cortex_x1c },
64 E{ .part = 0xd44, .m32 = &A32.cortex_x1, .m64 = &A64.cortex_x1 },79 E{ .part = 0xd4d, .m64 = &A64.cortex_a715 },
65 E{ .part = 0xd02, .m64 = &A64.cortex_a34 },80 E{ .part = 0xd4e, .m64 = &A64.cortex_x3 },
66 E{ .part = 0xd06, .m64 = &A64.cortex_a65 },81 E{ .part = 0xd4f, .m64 = &A64.neoverse_v2 },
67 E{ .part = 0xd43, .m64 = &A64.cortex_a65ae },82 E{ .part = 0xd80, .m64 = &A64.cortex_a520 },
83 E{ .part = 0xd81, .m64 = &A64.cortex_a720 },
84 E{ .part = 0xd82, .m64 = &A64.cortex_x4 },
85 E{ .part = 0xd83, .m64 = &A64.neoverse_v3ae },
86 E{ .part = 0xd84, .m64 = &A64.neoverse_v3 },
87 E{ .part = 0xd85, .m64 = &A64.cortex_x925 },
88 E{ .part = 0xd87, .m64 = &A64.cortex_a725 },
89 E{ .part = 0xd88, .m64 = &A64.cortex_a520ae },
90 E{ .part = 0xd89, .m64 = &A64.cortex_a720ae },
91 E{ .part = 0xd8e, .m64 = &A64.neoverse_n3 },
68 };92 };
69 // implementer = 0x4293 // implementer = 0x42
70 const Broadcom = [_]E{94 const Broadcom = [_]E{
...@@ -97,6 +121,7 @@ pub const cpu_models = struct {...@@ -97,6 +121,7 @@ pub const cpu_models = struct {
97 };121 };
98 // implementer = 0x51122 // implementer = 0x51
99 const Qualcomm = [_]E{123 const Qualcomm = [_]E{
124 E{ .part = 0x001, .m64 = &A64.oryon_1 },
100 E{ .part = 0x06f, .m32 = &A32.krait },125 E{ .part = 0x06f, .m32 = &A32.krait },
101 E{ .part = 0x201, .m64 = &A64.kryo, .m32 = &A64.kryo },126 E{ .part = 0x201, .m64 = &A64.kryo, .m32 = &A64.kryo },
102 E{ .part = 0x205, .m64 = &A64.kryo, .m32 = &A64.kryo },127 E{ .part = 0x205, .m64 = &A64.kryo, .m32 = &A64.kryo },
...@@ -110,7 +135,7 @@ pub const cpu_models = struct {...@@ -110,7 +135,7 @@ pub const cpu_models = struct {
110 E{ .part = 0xc00, .m64 = &A64.falkor },135 E{ .part = 0xc00, .m64 = &A64.falkor },
111 E{ .part = 0xc01, .m64 = &A64.saphira },136 E{ .part = 0xc01, .m64 = &A64.saphira },
112 };137 };
113138 // implementer = 0x61
114 const Apple = [_]E{139 const Apple = [_]E{
115 E{ .part = 0x022, .m64 = &A64.apple_m1 },140 E{ .part = 0x022, .m64 = &A64.apple_m1 },
116 E{ .part = 0x023, .m64 = &A64.apple_m1 },141 E{ .part = 0x023, .m64 = &A64.apple_m1 },