authorgravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-13 03:01:19+03:30
committergravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-18 07:05:50+03:30
logee06b2ce760d927b62726de1e2e3cb33b48d4932
tree6046947d801d8c10b3dd1fd98d3ae8aba5da187a
parentd18eaf8586cf173d5605d5885fcbe26d64af00c5

spirv: require int8/int16 capabilities

4 files changed, 9 insertions(+), 20 deletions(-)

lib/std/Target/spirv.zig+1-13
...@@ -10,8 +10,6 @@ pub const Feature = enum {...@@ -10,8 +10,6 @@ pub const Feature = enum {
10 v1_4,10 v1_4,
11 v1_5,11 v1_5,
12 v1_6,12 v1_6,
13 int8,
14 int16,
15 int64,13 int64,
16 float16,14 float16,
17 float64,15 float64,
...@@ -71,16 +69,6 @@ pub const all_features = blk: {...@@ -71,16 +69,6 @@ pub const all_features = blk: {
71 .description = "Enable version 1.6",69 .description = "Enable version 1.6",
72 .dependencies = featureSet(&[_]Feature{.v1_5}),70 .dependencies = featureSet(&[_]Feature{.v1_5}),
73 };71 };
74 result[@intFromEnum(Feature.int8)] = .{
75 .llvm_name = null,
76 .description = "Enable Int8 capability",
77 .dependencies = featureSet(&[_]Feature{.v1_0}),
78 };
79 result[@intFromEnum(Feature.int16)] = .{
80 .llvm_name = null,
81 .description = "Enable Int16 capability",
82 .dependencies = featureSet(&[_]Feature{.v1_0}),
83 };
84 result[@intFromEnum(Feature.int64)] = .{72 result[@intFromEnum(Feature.int64)] = .{
85 .llvm_name = null,73 .llvm_name = null,
86 .description = "Enable Int64 capability",74 .description = "Enable Int64 capability",
...@@ -109,7 +97,7 @@ pub const all_features = blk: {...@@ -109,7 +97,7 @@ pub const all_features = blk: {
109 result[@intFromEnum(Feature.arbitrary_precision_integers)] = .{97 result[@intFromEnum(Feature.arbitrary_precision_integers)] = .{
110 .llvm_name = null,98 .llvm_name = null,
111 .description = "Enable SPV_INTEL_arbitrary_precision_integers extension and the ArbitraryPrecisionIntegersINTEL capability",99 .description = "Enable SPV_INTEL_arbitrary_precision_integers extension and the ArbitraryPrecisionIntegersINTEL capability",
112 .dependencies = featureSet(&[_]Feature{ .v1_5, .int8, .int16 }),100 .dependencies = featureSet(&[_]Feature{.v1_5}),
113 };101 };
114 result[@intFromEnum(Feature.kernel)] = .{102 result[@intFromEnum(Feature.kernel)] = .{
115 .llvm_name = null,103 .llvm_name = null,
src/codegen/spirv.zig+4-4
...@@ -588,11 +588,11 @@ const NavGen = struct {...@@ -588,11 +588,11 @@ const NavGen = struct {
588588
589 if (self.spv.hasFeature(.arbitrary_precision_integers) and bits <= 32) return bits;589 if (self.spv.hasFeature(.arbitrary_precision_integers) and bits <= 32) return bits;
590590
591 // 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.591 // We require Int8 and Int16 capabilities and benefit Int64 when available.
592 // 32-bit integers are always supported (see spec, 2.16.1, Data rules).592 // 32-bit integers are always supported (see spec, 2.16.1, Data rules).
593 const ints = [_]struct { bits: u16, feature: ?Target.spirv.Feature }{593 const ints = [_]struct { bits: u16, feature: ?Target.spirv.Feature }{
594 .{ .bits = 8, .feature = .int8 },594 .{ .bits = 8, .feature = null },
595 .{ .bits = 16, .feature = .int16 },595 .{ .bits = 16, .feature = null },
596 .{ .bits = 32, .feature = null },596 .{ .bits = 32, .feature = null },
597 .{ .bits = 64, .feature = .int64 },597 .{ .bits = 64, .feature = .int64 },
598 };598 };
...@@ -1373,7 +1373,7 @@ const NavGen = struct {...@@ -1373,7 +1373,7 @@ const NavGen = struct {
1373 var member_types: [4]IdRef = undefined;1373 var member_types: [4]IdRef = undefined;
1374 var member_names: [4][]const u8 = undefined;1374 var member_names: [4][]const u8 = undefined;
13751375
1376 const u8_ty_id = try self.resolveType(Type.u8, .direct); // TODO: What if Int8Type is not enabled?1376 const u8_ty_id = try self.resolveType(Type.u8, .direct);
13771377
1378 if (layout.tag_size != 0) {1378 if (layout.tag_size != 0) {
1379 const tag_ty_id = try self.resolveType(Type.fromInterned(union_obj.enum_tag_ty), .indirect);1379 const tag_ty_id = try self.resolveType(Type.fromInterned(union_obj.enum_tag_ty), .indirect);
src/codegen/spirv/Module.zig+3-2
...@@ -333,8 +333,6 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {...@@ -333,8 +333,6 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {
333 // Versions333 // Versions
334 .v1_0, .v1_1, .v1_2, .v1_3, .v1_4, .v1_5, .v1_6 => {},334 .v1_0, .v1_1, .v1_2, .v1_3, .v1_4, .v1_5, .v1_6 => {},
335 // Features with no dependencies335 // Features with no dependencies
336 .int8 => try self.addCapability(.Int8),
337 .int16 => try self.addCapability(.Int16),
338 .int64 => try self.addCapability(.Int64),336 .int64 => try self.addCapability(.Int64),
339 .float16 => try self.addCapability(.Float16),337 .float16 => try self.addCapability(.Float16),
340 .float64 => try self.addCapability(.Float64),338 .float64 => try self.addCapability(.Float64),
...@@ -361,6 +359,9 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {...@@ -361,6 +359,9 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {
361 }359 }
362 }360 }
363 }361 }
362 // These are well supported
363 try self.addCapability(.Int8);
364 try self.addCapability(.Int16);
364365
365 // Emit memory model366 // Emit memory model
366 const addressing_model: spec.AddressingModel = blk: {367 const addressing_model: spec.AddressingModel = blk: {
test/tests.zig+1-1
...@@ -143,7 +143,7 @@ const test_targets = blk: {...@@ -143,7 +143,7 @@ const test_targets = blk: {
143 .{143 .{
144 .target = std.Target.Query.parse(.{144 .target = std.Target.Query.parse(.{
145 .arch_os_abi = "spirv64-vulkan",145 .arch_os_abi = "spirv64-vulkan",
146 .cpu_features = "vulkan_v1_2+int8+int16+int64+float16+float64",146 .cpu_features = "vulkan_v1_2+int64+float16+float64",
147 }) catch unreachable,147 }) catch unreachable,
148 .use_llvm = false,148 .use_llvm = false,
149 .use_lld = false,149 .use_lld = false,