authorgravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2019-11-13 00:45:37+02:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2019-11-13 00:52:15+02:00
logf0c94d95dde320ba5e7509dc1499b33e54a1c951
tree0a2d9acdfa2a066c0fcee6d893747ee731a5083b
parent110ef2e52825656fc048cba020f0fc36a1e58d13
signaturelock-open Commit is signed but in an unrecognized format.

use @atomicStore in std lib

10 files changed, 25 insertions(+), 26 deletions(-)

lib/std/atomic/queue.zig+1-1
...@@ -199,7 +199,7 @@ test "std.atomic.Queue" {...@@ -199,7 +199,7 @@ test "std.atomic.Queue" {
199199
200 for (putters) |t|200 for (putters) |t|
201 t.wait();201 t.wait();
202 _ = @atomicRmw(u8, &context.puts_done, builtin.AtomicRmwOp.Xchg, 1, AtomicOrder.SeqCst);202 @atomicStore(u8, &context.puts_done, 1, AtomicOrder.SeqCst);
203 for (getters) |t|203 for (getters) |t|
204 t.wait();204 t.wait();
205205
lib/std/atomic/stack.zig+1-1
...@@ -128,7 +128,7 @@ test "std.atomic.stack" {...@@ -128,7 +128,7 @@ test "std.atomic.stack" {
128128
129 for (putters) |t|129 for (putters) |t|
130 t.wait();130 t.wait();
131 _ = @atomicRmw(u8, &context.puts_done, builtin.AtomicRmwOp.Xchg, 1, AtomicOrder.SeqCst);131 @atomicStore(u8, &context.puts_done, 1, AtomicOrder.SeqCst);
132 for (getters) |t|132 for (getters) |t|
133 t.wait();133 t.wait();
134 }134 }
lib/std/event/channel.zig+2-2
...@@ -161,7 +161,7 @@ pub fn Channel(comptime T: type) type {...@@ -161,7 +161,7 @@ pub fn Channel(comptime T: type) type {
161161
162 fn dispatch(self: *SelfChannel) void {162 fn dispatch(self: *SelfChannel) void {
163 // set the "need dispatch" flag163 // set the "need dispatch" flag
164 _ = @atomicRmw(u8, &self.need_dispatch, .Xchg, 1, .SeqCst);164 @atomicStore(u8, &self.need_dispatch, 1, .SeqCst);
165165
166 lock: while (true) {166 lock: while (true) {
167 // set the lock flag167 // set the lock flag
...@@ -169,7 +169,7 @@ pub fn Channel(comptime T: type) type {...@@ -169,7 +169,7 @@ pub fn Channel(comptime T: type) type {
169 if (prev_lock != 0) return;169 if (prev_lock != 0) return;
170170
171 // clear the need_dispatch flag since we're about to do it171 // clear the need_dispatch flag since we're about to do it
172 _ = @atomicRmw(u8, &self.need_dispatch, .Xchg, 0, .SeqCst);172 @atomicStore(u8, &self.need_dispatch, 0, .SeqCst);
173173
174 while (true) {174 while (true) {
175 one_dispatch: {175 one_dispatch: {
lib/std/event/future.zig+2-2
...@@ -62,12 +62,12 @@ pub fn Future(comptime T: type) type {...@@ -62,12 +62,12 @@ pub fn Future(comptime T: type) type {
62 pub async fn start(self: *Self) ?*T {62 pub async fn start(self: *Self) ?*T {
63 const state = @cmpxchgStrong(Available, &self.available, .NotStarted, .Started, .SeqCst, .SeqCst) orelse return null;63 const state = @cmpxchgStrong(Available, &self.available, .NotStarted, .Started, .SeqCst, .SeqCst) orelse return null;
64 switch (state) {64 switch (state) {
65 1 => {65 .Started => {
66 const held = self.lock.acquire();66 const held = self.lock.acquire();
67 held.release();67 held.release();
68 return &self.data;68 return &self.data;
69 },69 },
70 2 => return &self.data,70 .Finished => return &self.data,
71 else => unreachable,71 else => unreachable,
72 }72 }
73 }73 }
lib/std/event/lock.zig+5-5
...@@ -31,8 +31,8 @@ pub const Lock = struct {...@@ -31,8 +31,8 @@ pub const Lock = struct {
31 }31 }
3232
33 // We need to release the lock.33 // We need to release the lock.
34 _ = @atomicRmw(u8, &self.lock.queue_empty_bit, .Xchg, 1, .SeqCst);34 @atomicStore(u8, &self.lock.queue_empty_bit, 1, .SeqCst);
35 _ = @atomicRmw(u8, &self.lock.shared_bit, .Xchg, 0, .SeqCst);35 @atomicStore(u8, &self.lock.shared_bit, 0, .SeqCst);
3636
37 // There might be a queue item. If we know the queue is empty, we can be done,37 // There might be a queue item. If we know the queue is empty, we can be done,
38 // because the other actor will try to obtain the lock.38 // because the other actor will try to obtain the lock.
...@@ -56,8 +56,8 @@ pub const Lock = struct {...@@ -56,8 +56,8 @@ pub const Lock = struct {
56 }56 }
5757
58 // Release the lock again.58 // Release the lock again.
59 _ = @atomicRmw(u8, &self.lock.queue_empty_bit, .Xchg, 1, .SeqCst);59 @atomicStore(u8, &self.lock.queue_empty_bit, 1, .SeqCst);
60 _ = @atomicRmw(u8, &self.lock.shared_bit, .Xchg, 0, .SeqCst);60 @atomicStore(u8, &self.lock.shared_bit, 0, .SeqCst);
6161
62 // Find out if we can be done.62 // Find out if we can be done.
63 if (@atomicLoad(u8, &self.lock.queue_empty_bit, .SeqCst) == 1) {63 if (@atomicLoad(u8, &self.lock.queue_empty_bit, .SeqCst) == 1) {
...@@ -101,7 +101,7 @@ pub const Lock = struct {...@@ -101,7 +101,7 @@ pub const Lock = struct {
101101
102 // We set this bit so that later we can rely on the fact, that if queue_empty_bit is 1, some actor102 // We set this bit so that later we can rely on the fact, that if queue_empty_bit is 1, some actor
103 // will attempt to grab the lock.103 // will attempt to grab the lock.
104 _ = @atomicRmw(u8, &self.queue_empty_bit, .Xchg, 0, .SeqCst);104 @atomicStore(u8, &self.queue_empty_bit, 0, .SeqCst);
105105
106 const old_bit = @atomicRmw(u8, &self.shared_bit, .Xchg, 1, .SeqCst);106 const old_bit = @atomicRmw(u8, &self.shared_bit, .Xchg, 1, .SeqCst);
107 if (old_bit == 0) {107 if (old_bit == 0) {
lib/std/event/loop.zig+2-2
...@@ -820,7 +820,7 @@ pub const Loop = struct {...@@ -820,7 +820,7 @@ pub const Loop = struct {
820 _ = os.kevent(self.os_data.fs_kqfd, fs_kevs, empty_kevs, null) catch unreachable;820 _ = os.kevent(self.os_data.fs_kqfd, fs_kevs, empty_kevs, null) catch unreachable;
821 },821 },
822 .linux => {822 .linux => {
823 _ = @atomicRmw(i32, &self.os_data.fs_queue_item, AtomicRmwOp.Xchg, 1, AtomicOrder.SeqCst);823 @atomicStore(i32, &self.os_data.fs_queue_item, 1, AtomicOrder.SeqCst);
824 const rc = os.linux.futex_wake(&self.os_data.fs_queue_item, os.linux.FUTEX_WAKE, 1);824 const rc = os.linux.futex_wake(&self.os_data.fs_queue_item, os.linux.FUTEX_WAKE, 1);
825 switch (os.linux.getErrno(rc)) {825 switch (os.linux.getErrno(rc)) {
826 0 => {},826 0 => {},
...@@ -843,7 +843,7 @@ pub const Loop = struct {...@@ -843,7 +843,7 @@ pub const Loop = struct {
843 fn posixFsRun(self: *Loop) void {843 fn posixFsRun(self: *Loop) void {
844 while (true) {844 while (true) {
845 if (builtin.os == .linux) {845 if (builtin.os == .linux) {
846 _ = @atomicRmw(i32, &self.os_data.fs_queue_item, .Xchg, 0, .SeqCst);846 @atomicStore(i32, &self.os_data.fs_queue_item, 0, .SeqCst);
847 }847 }
848 while (self.os_data.fs_queue.get()) |node| {848 while (self.os_data.fs_queue.get()) |node| {
849 switch (node.data.msg) {849 switch (node.data.msg) {
lib/std/event/rwlock.zig+9-9
...@@ -40,7 +40,7 @@ pub const RwLock = struct {...@@ -40,7 +40,7 @@ pub const RwLock = struct {
40 return;40 return;
41 }41 }
4242
43 _ = @atomicRmw(u8, &self.lock.reader_queue_empty_bit, .Xchg, 1, .SeqCst);43 @atomicStore(u8, &self.lock.reader_queue_empty_bit, 1, .SeqCst);
44 if (@cmpxchgStrong(State, &self.lock.shared_state, .ReadLock, .Unlocked, .SeqCst, .SeqCst) != null) {44 if (@cmpxchgStrong(State, &self.lock.shared_state, .ReadLock, .Unlocked, .SeqCst, .SeqCst) != null) {
45 // Didn't unlock. Someone else's problem.45 // Didn't unlock. Someone else's problem.
46 return;46 return;
...@@ -64,15 +64,15 @@ pub const RwLock = struct {...@@ -64,15 +64,15 @@ pub const RwLock = struct {
64 // We need to release the write lock. Check if any readers are waiting to grab the lock.64 // We need to release the write lock. Check if any readers are waiting to grab the lock.
65 if (@atomicLoad(u8, &self.lock.reader_queue_empty_bit, .SeqCst) == 0) {65 if (@atomicLoad(u8, &self.lock.reader_queue_empty_bit, .SeqCst) == 0) {
66 // Switch to a read lock.66 // Switch to a read lock.
67 _ = @atomicRmw(State, &self.lock.shared_state, .Xchg, .ReadLock, .SeqCst);67 @atomicStore(State, &self.lock.shared_state, .ReadLock, .SeqCst);
68 while (self.lock.reader_queue.get()) |node| {68 while (self.lock.reader_queue.get()) |node| {
69 global_event_loop.onNextTick(node);69 global_event_loop.onNextTick(node);
70 }70 }
71 return;71 return;
72 }72 }
7373
74 _ = @atomicRmw(u8, &self.lock.writer_queue_empty_bit, .Xchg, 1, .SeqCst);74 @atomicStore(u8, &self.lock.writer_queue_empty_bit, 1, .SeqCst);
75 _ = @atomicRmw(State, &self.lock.shared_state, .Xchg, State.Unlocked, .SeqCst);75 @atomicStore(State, &self.lock.shared_state, .Unlocked, .SeqCst);
7676
77 self.lock.commonPostUnlock();77 self.lock.commonPostUnlock();
78 }78 }
...@@ -113,7 +113,7 @@ pub const RwLock = struct {...@@ -113,7 +113,7 @@ pub const RwLock = struct {
113113
114 // We set this bit so that later we can rely on the fact, that if reader_queue_empty_bit is 1,114 // We set this bit so that later we can rely on the fact, that if reader_queue_empty_bit is 1,
115 // some actor will attempt to grab the lock.115 // some actor will attempt to grab the lock.
116 _ = @atomicRmw(u8, &self.reader_queue_empty_bit, .Xchg, 0, .SeqCst);116 @atomicStore(u8, &self.reader_queue_empty_bit, 0, .SeqCst);
117117
118 // Here we don't care if we are the one to do the locking or if it was already locked for reading.118 // Here we don't care if we are the one to do the locking or if it was already locked for reading.
119 const have_read_lock = if (@cmpxchgStrong(State, &self.shared_state, .Unlocked, .ReadLock, .SeqCst, .SeqCst)) |old_state| old_state == .ReadLock else true;119 const have_read_lock = if (@cmpxchgStrong(State, &self.shared_state, .Unlocked, .ReadLock, .SeqCst, .SeqCst)) |old_state| old_state == .ReadLock else true;
...@@ -144,7 +144,7 @@ pub const RwLock = struct {...@@ -144,7 +144,7 @@ pub const RwLock = struct {
144144
145 // We set this bit so that later we can rely on the fact, that if writer_queue_empty_bit is 1,145 // We set this bit so that later we can rely on the fact, that if writer_queue_empty_bit is 1,
146 // some actor will attempt to grab the lock.146 // some actor will attempt to grab the lock.
147 _ = @atomicRmw(u8, &self.writer_queue_empty_bit, .Xchg, 0, .SeqCst);147 @atomicStore(u8, &self.writer_queue_empty_bit, 0, .SeqCst);
148148
149 // Here we must be the one to acquire the write lock. It cannot already be locked.149 // Here we must be the one to acquire the write lock. It cannot already be locked.
150 if (@cmpxchgStrong(State, &self.shared_state, .Unlocked, .WriteLock, .SeqCst, .SeqCst) == null) {150 if (@cmpxchgStrong(State, &self.shared_state, .Unlocked, .WriteLock, .SeqCst, .SeqCst) == null) {
...@@ -176,8 +176,8 @@ pub const RwLock = struct {...@@ -176,8 +176,8 @@ pub const RwLock = struct {
176 return;176 return;
177 }177 }
178 // Release the lock again.178 // Release the lock again.
179 _ = @atomicRmw(u8, &self.writer_queue_empty_bit, .Xchg, 1, .SeqCst);179 @atomicStore(u8, &self.writer_queue_empty_bit, 1, .SeqCst);
180 _ = @atomicRmw(State, &self.shared_state, .Xchg, .Unlocked, .SeqCst);180 @atomicStore(State, &self.shared_state, .Unlocked, .SeqCst);
181 continue;181 continue;
182 }182 }
183183
...@@ -195,7 +195,7 @@ pub const RwLock = struct {...@@ -195,7 +195,7 @@ pub const RwLock = struct {
195 return;195 return;
196 }196 }
197 // Release the lock again.197 // Release the lock again.
198 _ = @atomicRmw(u8, &self.reader_queue_empty_bit, .Xchg, 1, .SeqCst);198 @atomicStore(u8, &self.reader_queue_empty_bit, 1, .SeqCst);
199 if (@cmpxchgStrong(State, &self.shared_state, .ReadLock, .Unlocked, .SeqCst, .SeqCst) != null) {199 if (@cmpxchgStrong(State, &self.shared_state, .ReadLock, .Unlocked, .SeqCst, .SeqCst) != null) {
200 // Didn't unlock. Someone else's problem.200 // Didn't unlock. Someone else's problem.
201 return;201 return;
lib/std/os/linux.zig+1-1
...@@ -531,7 +531,7 @@ extern fn init_vdso_clock_gettime(clk: i32, ts: *timespec) usize {...@@ -531,7 +531,7 @@ extern fn init_vdso_clock_gettime(clk: i32, ts: *timespec) usize {
531 const ptr = @intToPtr(?*const c_void, vdso.lookup(VDSO_CGT_VER, VDSO_CGT_SYM));531 const ptr = @intToPtr(?*const c_void, vdso.lookup(VDSO_CGT_VER, VDSO_CGT_SYM));
532 // Note that we may not have a VDSO at all, update the stub address anyway532 // Note that we may not have a VDSO at all, update the stub address anyway
533 // so that clock_gettime will fall back on the good old (and slow) syscall533 // so that clock_gettime will fall back on the good old (and slow) syscall
534 _ = @cmpxchgStrong(?*const c_void, &vdso_clock_gettime, &init_vdso_clock_gettime, ptr, .Monotonic, .Monotonic);534 @atomicStore(?*const c_void, &vdso_clock_gettime, ptr, .Monotonic);
535 // Call into the VDSO if available535 // Call into the VDSO if available
536 if (ptr) |fn_ptr| {536 if (ptr) |fn_ptr| {
537 const f = @ptrCast(vdso_clock_gettime_ty, fn_ptr);537 const f = @ptrCast(vdso_clock_gettime_ty, fn_ptr);
lib/std/spinlock.zig+1-2
...@@ -11,8 +11,7 @@ pub const SpinLock = struct {...@@ -11,8 +11,7 @@ pub const SpinLock = struct {
11 spinlock: *SpinLock,11 spinlock: *SpinLock,
1212
13 pub fn release(self: Held) void {13 pub fn release(self: Held) void {
14 // TODO: @atomicStore() https://github.com/ziglang/zig/issues/299514 @atomicStore(u8, &self.spinlock.lock, 0, .Release);
15 assert(@atomicRmw(u8, &self.spinlock.lock, .Xchg, 0, .Release) == 1);
16 }15 }
17 };16 };
1817
test/stage1/behavior/atomics.zig+1-1
...@@ -130,4 +130,4 @@ test "atomic store" {...@@ -130,4 +130,4 @@ test "atomic store" {
130 expect(@atomicLoad(u32, &x, .SeqCst) == 1);130 expect(@atomicLoad(u32, &x, .SeqCst) == 1);
131 @atomicStore(u32, &x, 12345678, .SeqCst);131 @atomicStore(u32, &x, 12345678, .SeqCst);
132 expect(@atomicLoad(u32, &x, .SeqCst) == 12345678);132 expect(@atomicLoad(u32, &x, .SeqCst) == 12345678);
133}
\ No newline at end of file
133}