authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2025-01-17 22:52:03-05:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2025-01-17 22:52:03-05:00
logf38d7a92cc1ca8059ba909a82f2f944966b52296
tree1ccf44369be00f105937046622f4a40ece101e07
parentf9a43770c87d4475a8e05b6539917ee26172b7c6
parentf7f6217df91b4de5225c0c971ca1946166026e49
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #22513 from ziglang/memcpy

enhance memcpy and remove redundant implementations

51 files changed, 163 insertions(+), 3267 deletions(-)

lib/compiler_rt.zig-1
...@@ -233,7 +233,6 @@ comptime {...@@ -233,7 +233,6 @@ comptime {
233233
234 _ = @import("compiler_rt/memcpy.zig");234 _ = @import("compiler_rt/memcpy.zig");
235 _ = @import("compiler_rt/memset.zig");235 _ = @import("compiler_rt/memset.zig");
236 _ = @import("compiler_rt/memmove.zig");
237 _ = @import("compiler_rt/memcmp.zig");236 _ = @import("compiler_rt/memcmp.zig");
238 _ = @import("compiler_rt/bcmp.zig");237 _ = @import("compiler_rt/bcmp.zig");
239 _ = @import("compiler_rt/ssp.zig");238 _ = @import("compiler_rt/ssp.zig");
lib/compiler_rt/memcpy.zig+157-12
...@@ -5,24 +5,169 @@ const builtin = @import("builtin");...@@ -5,24 +5,169 @@ const builtin = @import("builtin");
5comptime {5comptime {
6 if (builtin.object_format != .c) {6 if (builtin.object_format != .c) {
7 @export(&memcpy, .{ .name = "memcpy", .linkage = common.linkage, .visibility = common.visibility });7 @export(&memcpy, .{ .name = "memcpy", .linkage = common.linkage, .visibility = common.visibility });
8 @export(&memmove, .{ .name = "memmove", .linkage = common.linkage, .visibility = common.visibility });
8 }9 }
9}10}
1011
11pub fn memcpy(noalias dest: ?[*]u8, noalias src: ?[*]const u8, len: usize) callconv(.C) ?[*]u8 {12const llvm_cannot_lower = switch (builtin.cpu.arch) {
12 @setRuntimeSafety(false);13 .arm, .armeb, .thumb, .thumbeb => builtin.zig_backend == .stage2_llvm,
14 else => false,
15};
1316
14 if (len != 0) {17fn memcpy(noalias opt_dest: ?[*]u8, noalias opt_src: ?[*]const u8, len: usize) callconv(.C) ?[*]u8 {
15 var d = dest.?;18 if (llvm_cannot_lower) {
16 var s = src.?;19 for (0..len) |i| opt_dest.?[i] = opt_src.?[i];
17 var n = len;20 return opt_dest;
18 while (true) {21 } else {
19 d[0] = s[0];22 return memmove(opt_dest, opt_src, len);
20 n -= 1;23 }
21 if (n == 0) break;24}
22 d += 1;25
23 s += 1;26/// A port of https://github.com/facebook/folly/blob/1c8bc50e88804e2a7361a57cd9b551dd10f6c5fd/folly/memcpy.S
27fn memmove(opt_dest: ?[*]u8, opt_src: ?[*]const u8, len: usize) callconv(.C) ?[*]u8 {
28 if (llvm_cannot_lower) {
29 if (@intFromPtr(opt_dest) < @intFromPtr(opt_src)) {
30 for (0..len) |i| opt_dest.?[i] = opt_src.?[i];
31 return opt_dest;
32 } else {
33 var index = len;
34 while (index != 0) {
35 index -= 1;
36 opt_dest.?[index] = opt_src.?[index];
37 }
38 return opt_dest;
24 }39 }
25 }40 }
2641
42 if (len == 0) {
43 @branchHint(.unlikely);
44 return opt_dest;
45 }
46
47 const dest = opt_dest.?;
48 const src = opt_src.?;
49
50 if (len < 8) {
51 @branchHint(.unlikely);
52 if (len == 1) {
53 @branchHint(.unlikely);
54 dest[0] = src[0];
55 } else if (len >= 4) {
56 @branchHint(.unlikely);
57 blockCopy(dest, src, 4, len);
58 } else {
59 blockCopy(dest, src, 2, len);
60 }
61 return dest;
62 }
63
64 if (len > 32) {
65 @branchHint(.unlikely);
66 if (len > 256) {
67 @branchHint(.unlikely);
68 copyMove(dest, src, len);
69 return dest;
70 }
71 copyLong(dest, src, len);
72 return dest;
73 }
74
75 if (len > 16) {
76 @branchHint(.unlikely);
77 blockCopy(dest, src, 16, len);
78 return dest;
79 }
80
81 blockCopy(dest, src, 8, len);
82
27 return dest;83 return dest;
28}84}
85
86inline fn blockCopy(dest: [*]u8, src: [*]const u8, block_size: comptime_int, len: usize) void {
87 const first = @as(*align(1) const @Vector(block_size, u8), src[0..block_size]).*;
88 const second = @as(*align(1) const @Vector(block_size, u8), src[len - block_size ..][0..block_size]).*;
89 dest[0..block_size].* = first;
90 dest[len - block_size ..][0..block_size].* = second;
91}
92
93inline fn copyLong(dest: [*]u8, src: [*]const u8, len: usize) void {
94 var array: [8]@Vector(32, u8) = undefined;
95
96 inline for (.{ 64, 128, 192, 256 }, 0..) |N, i| {
97 array[i * 2] = src[(N / 2) - 32 ..][0..32].*;
98 array[(i * 2) + 1] = src[len - N / 2 ..][0..32].*;
99
100 if (len <= N) {
101 @branchHint(.unlikely);
102 for (0..i + 1) |j| {
103 dest[j * 32 ..][0..32].* = array[j * 2];
104 dest[len - ((j * 32) + 32) ..][0..32].* = array[(j * 2) + 1];
105 }
106 return;
107 }
108 }
109}
110
111inline fn copyMove(dest: [*]u8, src: [*]const u8, len: usize) void {
112 if (@intFromPtr(src) >= @intFromPtr(dest)) {
113 @branchHint(.unlikely);
114 copyForward(dest, src, len);
115 } else if (@intFromPtr(src) + len > @intFromPtr(dest)) {
116 @branchHint(.unlikely);
117 overlapBwd(dest, src, len);
118 } else {
119 copyForward(dest, src, len);
120 }
121}
122
123inline fn copyForward(dest: [*]u8, src: [*]const u8, len: usize) void {
124 const tail: @Vector(32, u8) = src[len - 32 ..][0..32].*;
125
126 const N: usize = len & ~@as(usize, 127);
127 var i: usize = 0;
128
129 while (i < N) : (i += 128) {
130 dest[i..][0..32].* = src[i..][0..32].*;
131 dest[i + 32 ..][0..32].* = src[i + 32 ..][0..32].*;
132 dest[i + 64 ..][0..32].* = src[i + 64 ..][0..32].*;
133 dest[i + 96 ..][0..32].* = src[i + 96 ..][0..32].*;
134 }
135
136 if (len - i <= 32) {
137 @branchHint(.unlikely);
138 dest[len - 32 ..][0..32].* = tail;
139 } else {
140 copyLong(dest[i..], src[i..], len - i);
141 }
142}
143
144inline fn overlapBwd(dest: [*]u8, src: [*]const u8, len: usize) void {
145 var array: [5]@Vector(32, u8) = undefined;
146 array[0] = src[len - 32 ..][0..32].*;
147 inline for (1..5) |i| array[i] = src[(i - 1) << 5 ..][0..32].*;
148
149 const end: usize = (@intFromPtr(dest) + len - 32) & 31;
150 const range = len - end;
151 var s = src + range;
152 var d = dest + range;
153
154 while (@intFromPtr(s) > @intFromPtr(src + 128)) {
155 // zig fmt: off
156 const first = @as(*align(1) const @Vector(32, u8), @ptrCast(s - 32)).*;
157 const second = @as(*align(1) const @Vector(32, u8), @ptrCast(s - 64)).*;
158 const third = @as(*align(1) const @Vector(32, u8), @ptrCast(s - 96)).*;
159 const fourth = @as(*align(1) const @Vector(32, u8), @ptrCast(s - 128)).*;
160
161 @as(*align(32) @Vector(32, u8), @alignCast(@ptrCast(d - 32))).* = first;
162 @as(*align(32) @Vector(32, u8), @alignCast(@ptrCast(d - 64))).* = second;
163 @as(*align(32) @Vector(32, u8), @alignCast(@ptrCast(d - 96))).* = third;
164 @as(*align(32) @Vector(32, u8), @alignCast(@ptrCast(d - 128))).* = fourth;
165 // zig fmt: on
166
167 s -= 128;
168 d -= 128;
169 }
170
171 inline for (array[1..], 0..) |vec, i| dest[i * 32 ..][0..32].* = vec;
172 dest[len - 32 ..][0..32].* = array[0];
173}
lib/compiler_rt/memmove.zig deleted-25
...@@ -1,25 +0,0 @@
1const std = @import("std");
2const common = @import("./common.zig");
3
4comptime {
5 @export(&memmove, .{ .name = "memmove", .linkage = common.linkage, .visibility = common.visibility });
6}
7
8pub fn memmove(dest: ?[*]u8, src: ?[*]const u8, n: usize) callconv(.C) ?[*]u8 {
9 @setRuntimeSafety(false);
10
11 if (@intFromPtr(dest) < @intFromPtr(src)) {
12 var index: usize = 0;
13 while (index != n) : (index += 1) {
14 dest.?[index] = src.?[index];
15 }
16 } else {
17 var index = n;
18 while (index != 0) {
19 index -= 1;
20 dest.?[index] = src.?[index];
21 }
22 }
23
24 return dest;
25}
lib/libc/musl/src/string/aarch64/memcpy.S deleted-186
...@@ -1,186 +0,0 @@
1/*
2 * memcpy - copy memory area
3 *
4 * Copyright (c) 2012-2020, Arm Limited.
5 * SPDX-License-Identifier: MIT
6 */
7
8/* Assumptions:
9 *
10 * ARMv8-a, AArch64, unaligned accesses.
11 *
12 */
13
14#define dstin x0
15#define src x1
16#define count x2
17#define dst x3
18#define srcend x4
19#define dstend x5
20#define A_l x6
21#define A_lw w6
22#define A_h x7
23#define B_l x8
24#define B_lw w8
25#define B_h x9
26#define C_l x10
27#define C_lw w10
28#define C_h x11
29#define D_l x12
30#define D_h x13
31#define E_l x14
32#define E_h x15
33#define F_l x16
34#define F_h x17
35#define G_l count
36#define G_h dst
37#define H_l src
38#define H_h srcend
39#define tmp1 x14
40
41/* This implementation of memcpy uses unaligned accesses and branchless
42 sequences to keep the code small, simple and improve performance.
43
44 Copies are split into 3 main cases: small copies of up to 32 bytes, medium
45 copies of up to 128 bytes, and large copies. The overhead of the overlap
46 check is negligible since it is only required for large copies.
47
48 Large copies use a software pipelined loop processing 64 bytes per iteration.
49 The destination pointer is 16-byte aligned to minimize unaligned accesses.
50 The loop tail is handled by always copying 64 bytes from the end.
51*/
52
53.global memcpy
54.type memcpy,%function
55memcpy:
56 add srcend, src, count
57 add dstend, dstin, count
58 cmp count, 128
59 b.hi .Lcopy_long
60 cmp count, 32
61 b.hi .Lcopy32_128
62
63 /* Small copies: 0..32 bytes. */
64 cmp count, 16
65 b.lo .Lcopy16
66 ldp A_l, A_h, [src]
67 ldp D_l, D_h, [srcend, -16]
68 stp A_l, A_h, [dstin]
69 stp D_l, D_h, [dstend, -16]
70 ret
71
72 /* Copy 8-15 bytes. */
73.Lcopy16:
74 tbz count, 3, .Lcopy8
75 ldr A_l, [src]
76 ldr A_h, [srcend, -8]
77 str A_l, [dstin]
78 str A_h, [dstend, -8]
79 ret
80
81 .p2align 3
82 /* Copy 4-7 bytes. */
83.Lcopy8:
84 tbz count, 2, .Lcopy4
85 ldr A_lw, [src]
86 ldr B_lw, [srcend, -4]
87 str A_lw, [dstin]
88 str B_lw, [dstend, -4]
89 ret
90
91 /* Copy 0..3 bytes using a branchless sequence. */
92.Lcopy4:
93 cbz count, .Lcopy0
94 lsr tmp1, count, 1
95 ldrb A_lw, [src]
96 ldrb C_lw, [srcend, -1]
97 ldrb B_lw, [src, tmp1]
98 strb A_lw, [dstin]
99 strb B_lw, [dstin, tmp1]
100 strb C_lw, [dstend, -1]
101.Lcopy0:
102 ret
103
104 .p2align 4
105 /* Medium copies: 33..128 bytes. */
106.Lcopy32_128:
107 ldp A_l, A_h, [src]
108 ldp B_l, B_h, [src, 16]
109 ldp C_l, C_h, [srcend, -32]
110 ldp D_l, D_h, [srcend, -16]
111 cmp count, 64
112 b.hi .Lcopy128
113 stp A_l, A_h, [dstin]
114 stp B_l, B_h, [dstin, 16]
115 stp C_l, C_h, [dstend, -32]
116 stp D_l, D_h, [dstend, -16]
117 ret
118
119 .p2align 4
120 /* Copy 65..128 bytes. */
121.Lcopy128:
122 ldp E_l, E_h, [src, 32]
123 ldp F_l, F_h, [src, 48]
124 cmp count, 96
125 b.ls .Lcopy96
126 ldp G_l, G_h, [srcend, -64]
127 ldp H_l, H_h, [srcend, -48]
128 stp G_l, G_h, [dstend, -64]
129 stp H_l, H_h, [dstend, -48]
130.Lcopy96:
131 stp A_l, A_h, [dstin]
132 stp B_l, B_h, [dstin, 16]
133 stp E_l, E_h, [dstin, 32]
134 stp F_l, F_h, [dstin, 48]
135 stp C_l, C_h, [dstend, -32]
136 stp D_l, D_h, [dstend, -16]
137 ret
138
139 .p2align 4
140 /* Copy more than 128 bytes. */
141.Lcopy_long:
142
143 /* Copy 16 bytes and then align dst to 16-byte alignment. */
144
145 ldp D_l, D_h, [src]
146 and tmp1, dstin, 15
147 bic dst, dstin, 15
148 sub src, src, tmp1
149 add count, count, tmp1 /* Count is now 16 too large. */
150 ldp A_l, A_h, [src, 16]
151 stp D_l, D_h, [dstin]
152 ldp B_l, B_h, [src, 32]
153 ldp C_l, C_h, [src, 48]
154 ldp D_l, D_h, [src, 64]!
155 subs count, count, 128 + 16 /* Test and readjust count. */
156 b.ls .Lcopy64_from_end
157
158.Lloop64:
159 stp A_l, A_h, [dst, 16]
160 ldp A_l, A_h, [src, 16]
161 stp B_l, B_h, [dst, 32]
162 ldp B_l, B_h, [src, 32]
163 stp C_l, C_h, [dst, 48]
164 ldp C_l, C_h, [src, 48]
165 stp D_l, D_h, [dst, 64]!
166 ldp D_l, D_h, [src, 64]!
167 subs count, count, 64
168 b.hi .Lloop64
169
170 /* Write the last iteration and copy 64 bytes from the end. */
171.Lcopy64_from_end:
172 ldp E_l, E_h, [srcend, -64]
173 stp A_l, A_h, [dst, 16]
174 ldp A_l, A_h, [srcend, -48]
175 stp B_l, B_h, [dst, 32]
176 ldp B_l, B_h, [srcend, -32]
177 stp C_l, C_h, [dst, 48]
178 ldp C_l, C_h, [srcend, -16]
179 stp D_l, D_h, [dst, 64]
180 stp E_l, E_h, [dstend, -64]
181 stp A_l, A_h, [dstend, -48]
182 stp B_l, B_h, [dstend, -32]
183 stp C_l, C_h, [dstend, -16]
184 ret
185
186.size memcpy,.-memcpy
lib/libc/musl/src/string/arm/__aeabi_memcpy.s deleted-45
...@@ -1,45 +0,0 @@
1.syntax unified
2
3.global __aeabi_memcpy8
4.global __aeabi_memcpy4
5.global __aeabi_memcpy
6.global __aeabi_memmove8
7.global __aeabi_memmove4
8.global __aeabi_memmove
9
10.type __aeabi_memcpy8,%function
11.type __aeabi_memcpy4,%function
12.type __aeabi_memcpy,%function
13.type __aeabi_memmove8,%function
14.type __aeabi_memmove4,%function
15.type __aeabi_memmove,%function
16
17__aeabi_memmove8:
18__aeabi_memmove4:
19__aeabi_memmove:
20 cmp r0, r1
21 bls 3f
22 cmp r2, #0
23 beq 2f
24 adds r0, r0, r2
25 adds r2, r1, r2
261: subs r2, r2, #1
27 ldrb r3, [r2]
28 subs r0, r0, #1
29 strb r3, [r0]
30 cmp r1, r2
31 bne 1b
322: bx lr
33__aeabi_memcpy8:
34__aeabi_memcpy4:
35__aeabi_memcpy:
363: cmp r2, #0
37 beq 2f
38 adds r2, r1, r2
391: ldrb r3, [r1]
40 adds r1, r1, #1
41 strb r3, [r0]
42 adds r0, r0, #1
43 cmp r1, r2
44 bne 1b
452: bx lr
lib/libc/musl/src/string/arm/memcpy.S deleted-479
...@@ -1,479 +0,0 @@
1/*
2 * Copyright (C) 2008 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29
30/*
31 * Optimized memcpy() for ARM.
32 *
33 * note that memcpy() always returns the destination pointer,
34 * so we have to preserve R0.
35 */
36
37/*
38 * This file has been modified from the original for use in musl libc.
39 * The main changes are: addition of .type memcpy,%function to make the
40 * code safely callable from thumb mode, adjusting the return
41 * instructions to be compatible with pre-thumb ARM cpus, removal of
42 * prefetch code that is not compatible with older cpus and support for
43 * building as thumb 2 and big-endian.
44 */
45
46.syntax unified
47
48.global memcpy
49.type memcpy,%function
50memcpy:
51 /* The stack must always be 64-bits aligned to be compliant with the
52 * ARM ABI. Since we have to save R0, we might as well save R4
53 * which we can use for better pipelining of the reads below
54 */
55 .fnstart
56 .save {r0, r4, lr}
57 stmfd sp!, {r0, r4, lr}
58 /* Making room for r5-r11 which will be spilled later */
59 .pad #28
60 sub sp, sp, #28
61
62 /* it simplifies things to take care of len<4 early */
63 cmp r2, #4
64 blo copy_last_3_and_return
65
66 /* compute the offset to align the source
67 * offset = (4-(src&3))&3 = -src & 3
68 */
69 rsb r3, r1, #0
70 ands r3, r3, #3
71 beq src_aligned
72
73 /* align source to 32 bits. We need to insert 2 instructions between
74 * a ldr[b|h] and str[b|h] because byte and half-word instructions
75 * stall 2 cycles.
76 */
77 movs r12, r3, lsl #31
78 sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
79 ldrbmi r3, [r1], #1
80 ldrbcs r4, [r1], #1
81 ldrbcs r12,[r1], #1
82 strbmi r3, [r0], #1
83 strbcs r4, [r0], #1
84 strbcs r12,[r0], #1
85
86src_aligned:
87
88 /* see if src and dst are aligned together (congruent) */
89 eor r12, r0, r1
90 tst r12, #3
91 bne non_congruent
92
93 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
94 * frame. Don't update sp.
95 */
96 stmea sp, {r5-r11}
97
98 /* align the destination to a cache-line */
99 rsb r3, r0, #0
100 ands r3, r3, #0x1C
101 beq congruent_aligned32
102 cmp r3, r2
103 andhi r3, r2, #0x1C
104
105 /* conditionnaly copies 0 to 7 words (length in r3) */
106 movs r12, r3, lsl #28
107 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
108 ldmmi r1!, {r8, r9} /* 8 bytes */
109 stmcs r0!, {r4, r5, r6, r7}
110 stmmi r0!, {r8, r9}
111 tst r3, #0x4
112 ldrne r10,[r1], #4 /* 4 bytes */
113 strne r10,[r0], #4
114 sub r2, r2, r3
115
116congruent_aligned32:
117 /*
118 * here source is aligned to 32 bytes.
119 */
120
121cached_aligned32:
122 subs r2, r2, #32
123 blo less_than_32_left
124
125 /*
126 * We preload a cache-line up to 64 bytes ahead. On the 926, this will
127 * stall only until the requested world is fetched, but the linefill
128 * continues in the the background.
129 * While the linefill is going, we write our previous cache-line
130 * into the write-buffer (which should have some free space).
131 * When the linefill is done, the writebuffer will
132 * start dumping its content into memory
133 *
134 * While all this is going, we then load a full cache line into
135 * 8 registers, this cache line should be in the cache by now
136 * (or partly in the cache).
137 *
138 * This code should work well regardless of the source/dest alignment.
139 *
140 */
141
142 /* Align the preload register to a cache-line because the cpu does
143 * "critical word first" (the first word requested is loaded first).
144 */
145 @ bic r12, r1, #0x1F
146 @ add r12, r12, #64
147
1481: ldmia r1!, { r4-r11 }
149 subs r2, r2, #32
150
151 /*
152 * NOTE: if r12 is more than 64 ahead of r1, the following ldrhi
153 * for ARM9 preload will not be safely guarded by the preceding subs.
154 * When it is safely guarded the only possibility to have SIGSEGV here
155 * is because the caller overstates the length.
156 */
157 @ ldrhi r3, [r12], #32 /* cheap ARM9 preload */
158 stmia r0!, { r4-r11 }
159 bhs 1b
160
161 add r2, r2, #32
162
163less_than_32_left:
164 /*
165 * less than 32 bytes left at this point (length in r2)
166 */
167
168 /* skip all this if there is nothing to do, which should
169 * be a common case (if not executed the code below takes
170 * about 16 cycles)
171 */
172 tst r2, #0x1F
173 beq 1f
174
175 /* conditionnaly copies 0 to 31 bytes */
176 movs r12, r2, lsl #28
177 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
178 ldmmi r1!, {r8, r9} /* 8 bytes */
179 stmcs r0!, {r4, r5, r6, r7}
180 stmmi r0!, {r8, r9}
181 movs r12, r2, lsl #30
182 ldrcs r3, [r1], #4 /* 4 bytes */
183 ldrhmi r4, [r1], #2 /* 2 bytes */
184 strcs r3, [r0], #4
185 strhmi r4, [r0], #2
186 tst r2, #0x1
187 ldrbne r3, [r1] /* last byte */
188 strbne r3, [r0]
189
190 /* we're done! restore everything and return */
1911: ldmfd sp!, {r5-r11}
192 ldmfd sp!, {r0, r4, lr}
193 bx lr
194
195 /********************************************************************/
196
197non_congruent:
198 /*
199 * here source is aligned to 4 bytes
200 * but destination is not.
201 *
202 * in the code below r2 is the number of bytes read
203 * (the number of bytes written is always smaller, because we have
204 * partial words in the shift queue)
205 */
206 cmp r2, #4
207 blo copy_last_3_and_return
208
209 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
210 * frame. Don't update sp.
211 */
212 stmea sp, {r5-r11}
213
214 /* compute shifts needed to align src to dest */
215 rsb r5, r0, #0
216 and r5, r5, #3 /* r5 = # bytes in partial words */
217 mov r12, r5, lsl #3 /* r12 = right */
218 rsb lr, r12, #32 /* lr = left */
219
220 /* read the first word */
221 ldr r3, [r1], #4
222 sub r2, r2, #4
223
224 /* write a partial word (0 to 3 bytes), such that destination
225 * becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
226 */
227 movs r5, r5, lsl #31
228
229#if __ARMEB__
230 movmi r3, r3, ror #24
231 strbmi r3, [r0], #1
232 movcs r3, r3, ror #24
233 strbcs r3, [r0], #1
234 movcs r3, r3, ror #24
235 strbcs r3, [r0], #1
236#else
237 strbmi r3, [r0], #1
238 movmi r3, r3, lsr #8
239 strbcs r3, [r0], #1
240 movcs r3, r3, lsr #8
241 strbcs r3, [r0], #1
242 movcs r3, r3, lsr #8
243#endif
244
245 cmp r2, #4
246 blo partial_word_tail
247
248#if __ARMEB__
249 mov r3, r3, lsr r12
250 mov r3, r3, lsl r12
251#endif
252
253 /* Align destination to 32 bytes (cache line boundary) */
2541: tst r0, #0x1c
255 beq 2f
256 ldr r5, [r1], #4
257 sub r2, r2, #4
258#if __ARMEB__
259 mov r4, r5, lsr lr
260 orr r4, r4, r3
261 mov r3, r5, lsl r12
262#else
263 mov r4, r5, lsl lr
264 orr r4, r4, r3
265 mov r3, r5, lsr r12
266#endif
267 str r4, [r0], #4
268 cmp r2, #4
269 bhs 1b
270 blo partial_word_tail
271
272 /* copy 32 bytes at a time */
2732: subs r2, r2, #32
274 blo less_than_thirtytwo
275
276 /* Use immediate mode for the shifts, because there is an extra cycle
277 * for register shifts, which could account for up to 50% of
278 * performance hit.
279 */
280
281 cmp r12, #24
282 beq loop24
283 cmp r12, #8
284 beq loop8
285
286loop16:
287 ldr r12, [r1], #4
2881: mov r4, r12
289 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
290 subs r2, r2, #32
291 ldrhs r12, [r1], #4
292#if __ARMEB__
293 orr r3, r3, r4, lsr #16
294 mov r4, r4, lsl #16
295 orr r4, r4, r5, lsr #16
296 mov r5, r5, lsl #16
297 orr r5, r5, r6, lsr #16
298 mov r6, r6, lsl #16
299 orr r6, r6, r7, lsr #16
300 mov r7, r7, lsl #16
301 orr r7, r7, r8, lsr #16
302 mov r8, r8, lsl #16
303 orr r8, r8, r9, lsr #16
304 mov r9, r9, lsl #16
305 orr r9, r9, r10, lsr #16
306 mov r10, r10, lsl #16
307 orr r10, r10, r11, lsr #16
308 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
309 mov r3, r11, lsl #16
310#else
311 orr r3, r3, r4, lsl #16
312 mov r4, r4, lsr #16
313 orr r4, r4, r5, lsl #16
314 mov r5, r5, lsr #16
315 orr r5, r5, r6, lsl #16
316 mov r6, r6, lsr #16
317 orr r6, r6, r7, lsl #16
318 mov r7, r7, lsr #16
319 orr r7, r7, r8, lsl #16
320 mov r8, r8, lsr #16
321 orr r8, r8, r9, lsl #16
322 mov r9, r9, lsr #16
323 orr r9, r9, r10, lsl #16
324 mov r10, r10, lsr #16
325 orr r10, r10, r11, lsl #16
326 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
327 mov r3, r11, lsr #16
328#endif
329 bhs 1b
330 b less_than_thirtytwo
331
332loop8:
333 ldr r12, [r1], #4
3341: mov r4, r12
335 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
336 subs r2, r2, #32
337 ldrhs r12, [r1], #4
338#if __ARMEB__
339 orr r3, r3, r4, lsr #24
340 mov r4, r4, lsl #8
341 orr r4, r4, r5, lsr #24
342 mov r5, r5, lsl #8
343 orr r5, r5, r6, lsr #24
344 mov r6, r6, lsl #8
345 orr r6, r6, r7, lsr #24
346 mov r7, r7, lsl #8
347 orr r7, r7, r8, lsr #24
348 mov r8, r8, lsl #8
349 orr r8, r8, r9, lsr #24
350 mov r9, r9, lsl #8
351 orr r9, r9, r10, lsr #24
352 mov r10, r10, lsl #8
353 orr r10, r10, r11, lsr #24
354 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
355 mov r3, r11, lsl #8
356#else
357 orr r3, r3, r4, lsl #24
358 mov r4, r4, lsr #8
359 orr r4, r4, r5, lsl #24
360 mov r5, r5, lsr #8
361 orr r5, r5, r6, lsl #24
362 mov r6, r6, lsr #8
363 orr r6, r6, r7, lsl #24
364 mov r7, r7, lsr #8
365 orr r7, r7, r8, lsl #24
366 mov r8, r8, lsr #8
367 orr r8, r8, r9, lsl #24
368 mov r9, r9, lsr #8
369 orr r9, r9, r10, lsl #24
370 mov r10, r10, lsr #8
371 orr r10, r10, r11, lsl #24
372 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
373 mov r3, r11, lsr #8
374#endif
375 bhs 1b
376 b less_than_thirtytwo
377
378loop24:
379 ldr r12, [r1], #4
3801: mov r4, r12
381 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
382 subs r2, r2, #32
383 ldrhs r12, [r1], #4
384#if __ARMEB__
385 orr r3, r3, r4, lsr #8
386 mov r4, r4, lsl #24
387 orr r4, r4, r5, lsr #8
388 mov r5, r5, lsl #24
389 orr r5, r5, r6, lsr #8
390 mov r6, r6, lsl #24
391 orr r6, r6, r7, lsr #8
392 mov r7, r7, lsl #24
393 orr r7, r7, r8, lsr #8
394 mov r8, r8, lsl #24
395 orr r8, r8, r9, lsr #8
396 mov r9, r9, lsl #24
397 orr r9, r9, r10, lsr #8
398 mov r10, r10, lsl #24
399 orr r10, r10, r11, lsr #8
400 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
401 mov r3, r11, lsl #24
402#else
403 orr r3, r3, r4, lsl #8
404 mov r4, r4, lsr #24
405 orr r4, r4, r5, lsl #8
406 mov r5, r5, lsr #24
407 orr r5, r5, r6, lsl #8
408 mov r6, r6, lsr #24
409 orr r6, r6, r7, lsl #8
410 mov r7, r7, lsr #24
411 orr r7, r7, r8, lsl #8
412 mov r8, r8, lsr #24
413 orr r8, r8, r9, lsl #8
414 mov r9, r9, lsr #24
415 orr r9, r9, r10, lsl #8
416 mov r10, r10, lsr #24
417 orr r10, r10, r11, lsl #8
418 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
419 mov r3, r11, lsr #24
420#endif
421 bhs 1b
422
423less_than_thirtytwo:
424 /* copy the last 0 to 31 bytes of the source */
425 rsb r12, lr, #32 /* we corrupted r12, recompute it */
426 add r2, r2, #32
427 cmp r2, #4
428 blo partial_word_tail
429
4301: ldr r5, [r1], #4
431 sub r2, r2, #4
432#if __ARMEB__
433 mov r4, r5, lsr lr
434 orr r4, r4, r3
435 mov r3, r5, lsl r12
436#else
437 mov r4, r5, lsl lr
438 orr r4, r4, r3
439 mov r3, r5, lsr r12
440#endif
441 str r4, [r0], #4
442 cmp r2, #4
443 bhs 1b
444
445partial_word_tail:
446 /* we have a partial word in the input buffer */
447 movs r5, lr, lsl #(31-3)
448#if __ARMEB__
449 movmi r3, r3, ror #24
450 strbmi r3, [r0], #1
451 movcs r3, r3, ror #24
452 strbcs r3, [r0], #1
453 movcs r3, r3, ror #24
454 strbcs r3, [r0], #1
455#else
456 strbmi r3, [r0], #1
457 movmi r3, r3, lsr #8
458 strbcs r3, [r0], #1
459 movcs r3, r3, lsr #8
460 strbcs r3, [r0], #1
461#endif
462
463 /* Refill spilled registers from the stack. Don't update sp. */
464 ldmfd sp, {r5-r11}
465
466copy_last_3_and_return:
467 movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
468 ldrbmi r2, [r1], #1
469 ldrbcs r3, [r1], #1
470 ldrbcs r12,[r1]
471 strbmi r2, [r0], #1
472 strbcs r3, [r0], #1
473 strbcs r12,[r0]
474
475 /* we're done! restore sp and spilled registers and return */
476 add sp, sp, #28
477 ldmfd sp!, {r0, r4, lr}
478 bx lr
479
lib/libc/musl/src/string/i386/memcpy.s deleted-32
...@@ -1,32 +0,0 @@
1.global memcpy
2.global __memcpy_fwd
3.hidden __memcpy_fwd
4.type memcpy,@function
5memcpy:
6__memcpy_fwd:
7 push %esi
8 push %edi
9 mov 12(%esp),%edi
10 mov 16(%esp),%esi
11 mov 20(%esp),%ecx
12 mov %edi,%eax
13 cmp $4,%ecx
14 jc 1f
15 test $3,%edi
16 jz 1f
172: movsb
18 dec %ecx
19 test $3,%edi
20 jnz 2b
211: mov %ecx,%edx
22 shr $2,%ecx
23 rep
24 movsl
25 and $3,%edx
26 jz 1f
272: movsb
28 dec %edx
29 jnz 2b
301: pop %edi
31 pop %esi
32 ret
lib/libc/musl/src/string/i386/memmove.s deleted-22
...@@ -1,22 +0,0 @@
1.global memmove
2.type memmove,@function
3memmove:
4 mov 4(%esp),%eax
5 sub 8(%esp),%eax
6 cmp 12(%esp),%eax
7.hidden __memcpy_fwd
8 jae __memcpy_fwd
9 push %esi
10 push %edi
11 mov 12(%esp),%edi
12 mov 16(%esp),%esi
13 mov 20(%esp),%ecx
14 lea -1(%edi,%ecx),%edi
15 lea -1(%esi,%ecx),%esi
16 std
17 rep movsb
18 cld
19 lea 1(%edi),%eax
20 pop %edi
21 pop %esi
22 ret
lib/libc/musl/src/string/memcpy.c deleted-124
...@@ -1,124 +0,0 @@
1#include <string.h>
2#include <stdint.h>
3#include <endian.h>
4
5void *memcpy(void *restrict dest, const void *restrict src, size_t n)
6{
7 unsigned char *d = dest;
8 const unsigned char *s = src;
9
10#ifdef __GNUC__
11
12#if __BYTE_ORDER == __LITTLE_ENDIAN
13#define LS >>
14#define RS <<
15#else
16#define LS <<
17#define RS >>
18#endif
19
20 typedef uint32_t __attribute__((__may_alias__)) u32;
21 uint32_t w, x;
22
23 for (; (uintptr_t)s % 4 && n; n--) *d++ = *s++;
24
25 if ((uintptr_t)d % 4 == 0) {
26 for (; n>=16; s+=16, d+=16, n-=16) {
27 *(u32 *)(d+0) = *(u32 *)(s+0);
28 *(u32 *)(d+4) = *(u32 *)(s+4);
29 *(u32 *)(d+8) = *(u32 *)(s+8);
30 *(u32 *)(d+12) = *(u32 *)(s+12);
31 }
32 if (n&8) {
33 *(u32 *)(d+0) = *(u32 *)(s+0);
34 *(u32 *)(d+4) = *(u32 *)(s+4);
35 d += 8; s += 8;
36 }
37 if (n&4) {
38 *(u32 *)(d+0) = *(u32 *)(s+0);
39 d += 4; s += 4;
40 }
41 if (n&2) {
42 *d++ = *s++; *d++ = *s++;
43 }
44 if (n&1) {
45 *d = *s;
46 }
47 return dest;
48 }
49
50 if (n >= 32) switch ((uintptr_t)d % 4) {
51 case 1:
52 w = *(u32 *)s;
53 *d++ = *s++;
54 *d++ = *s++;
55 *d++ = *s++;
56 n -= 3;
57 for (; n>=17; s+=16, d+=16, n-=16) {
58 x = *(u32 *)(s+1);
59 *(u32 *)(d+0) = (w LS 24) | (x RS 8);
60 w = *(u32 *)(s+5);
61 *(u32 *)(d+4) = (x LS 24) | (w RS 8);
62 x = *(u32 *)(s+9);
63 *(u32 *)(d+8) = (w LS 24) | (x RS 8);
64 w = *(u32 *)(s+13);
65 *(u32 *)(d+12) = (x LS 24) | (w RS 8);
66 }
67 break;
68 case 2:
69 w = *(u32 *)s;
70 *d++ = *s++;
71 *d++ = *s++;
72 n -= 2;
73 for (; n>=18; s+=16, d+=16, n-=16) {
74 x = *(u32 *)(s+2);
75 *(u32 *)(d+0) = (w LS 16) | (x RS 16);
76 w = *(u32 *)(s+6);
77 *(u32 *)(d+4) = (x LS 16) | (w RS 16);
78 x = *(u32 *)(s+10);
79 *(u32 *)(d+8) = (w LS 16) | (x RS 16);
80 w = *(u32 *)(s+14);
81 *(u32 *)(d+12) = (x LS 16) | (w RS 16);
82 }
83 break;
84 case 3:
85 w = *(u32 *)s;
86 *d++ = *s++;
87 n -= 1;
88 for (; n>=19; s+=16, d+=16, n-=16) {
89 x = *(u32 *)(s+3);
90 *(u32 *)(d+0) = (w LS 8) | (x RS 24);
91 w = *(u32 *)(s+7);
92 *(u32 *)(d+4) = (x LS 8) | (w RS 24);
93 x = *(u32 *)(s+11);
94 *(u32 *)(d+8) = (w LS 8) | (x RS 24);
95 w = *(u32 *)(s+15);
96 *(u32 *)(d+12) = (x LS 8) | (w RS 24);
97 }
98 break;
99 }
100 if (n&16) {
101 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
102 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
103 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
104 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
105 }
106 if (n&8) {
107 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
108 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
109 }
110 if (n&4) {
111 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
112 }
113 if (n&2) {
114 *d++ = *s++; *d++ = *s++;
115 }
116 if (n&1) {
117 *d = *s;
118 }
119 return dest;
120#endif
121
122 for (; n; n--) *d++ = *s++;
123 return dest;
124}
lib/libc/musl/src/string/memmove.c deleted-42
...@@ -1,42 +0,0 @@
1#include <string.h>
2#include <stdint.h>
3
4#ifdef __GNUC__
5typedef __attribute__((__may_alias__)) size_t WT;
6#define WS (sizeof(WT))
7#endif
8
9void *memmove(void *dest, const void *src, size_t n)
10{
11 char *d = dest;
12 const char *s = src;
13
14 if (d==s) return d;
15 if ((uintptr_t)s-(uintptr_t)d-n <= -2*n) return memcpy(d, s, n);
16
17 if (d<s) {
18#ifdef __GNUC__
19 if ((uintptr_t)s % WS == (uintptr_t)d % WS) {
20 while ((uintptr_t)d % WS) {
21 if (!n--) return dest;
22 *d++ = *s++;
23 }
24 for (; n>=WS; n-=WS, d+=WS, s+=WS) *(WT *)d = *(WT *)s;
25 }
26#endif
27 for (; n; n--) *d++ = *s++;
28 } else {
29#ifdef __GNUC__
30 if ((uintptr_t)s % WS == (uintptr_t)d % WS) {
31 while ((uintptr_t)(d+n) % WS) {
32 if (!n--) return dest;
33 d[n] = s[n];
34 }
35 while (n>=WS) n-=WS, *(WT *)(d+n) = *(WT *)(s+n);
36 }
37#endif
38 while (n) n--, d[n] = s[n];
39 }
40
41 return dest;
42}
lib/libc/musl/src/string/x86_64/memcpy.s deleted-25
...@@ -1,25 +0,0 @@
1.global memcpy
2.global __memcpy_fwd
3.hidden __memcpy_fwd
4.type memcpy,@function
5memcpy:
6__memcpy_fwd:
7 mov %rdi,%rax
8 cmp $8,%rdx
9 jc 1f
10 test $7,%edi
11 jz 1f
122: movsb
13 dec %rdx
14 test $7,%edi
15 jnz 2b
161: mov %rdx,%rcx
17 shr $3,%rcx
18 rep
19 movsq
20 and $7,%edx
21 jz 1f
222: movsb
23 dec %edx
24 jnz 2b
251: ret
lib/libc/musl/src/string/x86_64/memmove.s deleted-16
...@@ -1,16 +0,0 @@
1.global memmove
2.type memmove,@function
3memmove:
4 mov %rdi,%rax
5 sub %rsi,%rax
6 cmp %rdx,%rax
7.hidden __memcpy_fwd
8 jae __memcpy_fwd
9 mov %rdx,%rcx
10 lea -1(%rdi,%rdx),%rdi
11 lea -1(%rsi,%rdx),%rsi
12 std
13 rep movsb
14 cld
15 lea 1(%rdi),%rax
16 ret
lib/libc/wasi/libc-top-half/musl/src/fenv/arm/fenv-hf.S deleted-70
...@@ -1,70 +0,0 @@
1#if __ARM_PCS_VFP
2
3.syntax unified
4.fpu vfp
5
6.global fegetround
7.type fegetround,%function
8fegetround:
9 fmrx r0, fpscr
10 and r0, r0, #0xc00000
11 bx lr
12
13.global __fesetround
14.hidden __fesetround
15.type __fesetround,%function
16__fesetround:
17 fmrx r3, fpscr
18 bic r3, r3, #0xc00000
19 orr r3, r3, r0
20 fmxr fpscr, r3
21 mov r0, #0
22 bx lr
23
24.global fetestexcept
25.type fetestexcept,%function
26fetestexcept:
27 and r0, r0, #0x1f
28 fmrx r3, fpscr
29 and r0, r0, r3
30 bx lr
31
32.global feclearexcept
33.type feclearexcept,%function
34feclearexcept:
35 and r0, r0, #0x1f
36 fmrx r3, fpscr
37 bic r3, r3, r0
38 fmxr fpscr, r3
39 mov r0, #0
40 bx lr
41
42.global feraiseexcept
43.type feraiseexcept,%function
44feraiseexcept:
45 and r0, r0, #0x1f
46 fmrx r3, fpscr
47 orr r3, r3, r0
48 fmxr fpscr, r3
49 mov r0, #0
50 bx lr
51
52.global fegetenv
53.type fegetenv,%function
54fegetenv:
55 fmrx r3, fpscr
56 str r3, [r0]
57 mov r0, #0
58 bx lr
59
60.global fesetenv
61.type fesetenv,%function
62fesetenv:
63 cmn r0, #1
64 moveq r3, #0
65 ldrne r3, [r0]
66 fmxr fpscr, r3
67 mov r0, #0
68 bx lr
69
70#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/mips/fenv.S deleted-72
...@@ -1,72 +0,0 @@
1#ifndef __mips_soft_float
2
3.set noreorder
4
5.global feclearexcept
6.type feclearexcept,@function
7feclearexcept:
8 and $4, $4, 0x7c
9 cfc1 $5, $31
10 or $5, $5, $4
11 xor $5, $5, $4
12 ctc1 $5, $31
13 jr $ra
14 li $2, 0
15
16.global feraiseexcept
17.type feraiseexcept,@function
18feraiseexcept:
19 and $4, $4, 0x7c
20 cfc1 $5, $31
21 or $5, $5, $4
22 ctc1 $5, $31
23 jr $ra
24 li $2, 0
25
26.global fetestexcept
27.type fetestexcept,@function
28fetestexcept:
29 and $4, $4, 0x7c
30 cfc1 $2, $31
31 jr $ra
32 and $2, $2, $4
33
34.global fegetround
35.type fegetround,@function
36fegetround:
37 cfc1 $2, $31
38 jr $ra
39 andi $2, $2, 3
40
41.global __fesetround
42.hidden __fesetround
43.type __fesetround,@function
44__fesetround:
45 cfc1 $5, $31
46 li $6, -4
47 and $5, $5, $6
48 or $5, $5, $4
49 ctc1 $5, $31
50 jr $ra
51 li $2, 0
52
53.global fegetenv
54.type fegetenv,@function
55fegetenv:
56 cfc1 $5, $31
57 sw $5, 0($4)
58 jr $ra
59 li $2, 0
60
61.global fesetenv
62.type fesetenv,@function
63fesetenv:
64 addiu $5, $4, 1
65 beq $5, $0, 1f
66 nop
67 lw $5, 0($4)
681: ctc1 $5, $31
69 jr $ra
70 li $2, 0
71
72#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/mips64/fenv.S deleted-72
...@@ -1,72 +0,0 @@
1#ifndef __mips_soft_float
2
3.set noreorder
4
5.global feclearexcept
6.type feclearexcept,@function
7feclearexcept:
8 and $4, $4, 0x7c
9 cfc1 $5, $31
10 or $5, $5, $4
11 xor $5, $5, $4
12 ctc1 $5, $31
13 jr $ra
14 li $2, 0
15
16.global feraiseexcept
17.type feraiseexcept,@function
18feraiseexcept:
19 and $4, $4, 0x7c
20 cfc1 $5, $31
21 or $5, $5, $4
22 ctc1 $5, $31
23 jr $ra
24 li $2, 0
25
26.global fetestexcept
27.type fetestexcept,@function
28fetestexcept:
29 and $4, $4, 0x7c
30 cfc1 $2, $31
31 jr $ra
32 and $2, $2, $4
33
34.global fegetround
35.type fegetround,@function
36fegetround:
37 cfc1 $2, $31
38 jr $ra
39 andi $2, $2, 3
40
41.global __fesetround
42.hidden __fesetround
43.type __fesetround,@function
44__fesetround:
45 cfc1 $5, $31
46 li $6, -4
47 and $5, $5, $6
48 or $5, $5, $4
49 ctc1 $5, $31
50 jr $ra
51 li $2, 0
52
53.global fegetenv
54.type fegetenv,@function
55fegetenv:
56 cfc1 $5, $31
57 sw $5, 0($4)
58 jr $ra
59 li $2, 0
60
61.global fesetenv
62.type fesetenv,@function
63fesetenv:
64 daddiu $5, $4, 1
65 beq $5, $0, 1f
66 nop
67 lw $5, 0($4)
681: ctc1 $5, $31
69 jr $ra
70 li $2, 0
71
72#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/mipsn32/fenv.S deleted-71
...@@ -1,71 +0,0 @@
1#ifndef __mips_soft_float
2
3.set noreorder
4.global feclearexcept
5.type feclearexcept,@function
6feclearexcept:
7 and $4, $4, 0x7c
8 cfc1 $5, $31
9 or $5, $5, $4
10 xor $5, $5, $4
11 ctc1 $5, $31
12 jr $ra
13 li $2, 0
14
15.global feraiseexcept
16.type feraiseexcept,@function
17feraiseexcept:
18 and $4, $4, 0x7c
19 cfc1 $5, $31
20 or $5, $5, $4
21 ctc1 $5, $31
22 jr $ra
23 li $2, 0
24
25.global fetestexcept
26.type fetestexcept,@function
27fetestexcept:
28 and $4, $4, 0x7c
29 cfc1 $2, $31
30 jr $ra
31 and $2, $2, $4
32
33.global fegetround
34.type fegetround,@function
35fegetround:
36 cfc1 $2, $31
37 jr $ra
38 andi $2, $2, 3
39
40.global __fesetround
41.hidden __fesetround
42.type __fesetround,@function
43__fesetround:
44 cfc1 $5, $31
45 li $6, -4
46 and $5, $5, $6
47 or $5, $5, $4
48 ctc1 $5, $31
49 jr $ra
50 li $2, 0
51
52.global fegetenv
53.type fegetenv,@function
54fegetenv:
55 cfc1 $5, $31
56 sw $5, 0($4)
57 jr $ra
58 li $2, 0
59
60.global fesetenv
61.type fesetenv,@function
62fesetenv:
63 addiu $5, $4, 1
64 beq $5, $0, 1f
65 nop
66 lw $5, 0($4)
671: ctc1 $5, $31
68 jr $ra
69 li $2, 0
70
71#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/powerpc/fenv.S deleted-130
...@@ -1,130 +0,0 @@
1#if !defined(_SOFT_FLOAT) && !defined(__NO_FPRS__)
2.global feclearexcept
3.type feclearexcept,@function
4feclearexcept:
5 andis. 3,3,0x3e00
6 /* if (r3 & FE_INVALID) r3 |= all_invalid_flags */
7 andis. 0,3,0x2000
8 stwu 1,-16(1)
9 beq- 0,1f
10 oris 3,3,0x01f8
11 ori 3,3,0x0700
121:
13 /*
14 * note: fpscr contains various fpu status and control
15 * flags and we dont check if r3 may alter other flags
16 * than the exception related ones
17 * ufpscr &= ~r3
18 */
19 mffs 0
20 stfd 0,8(1)
21 lwz 9,12(1)
22 andc 9,9,3
23 stw 9,12(1)
24 lfd 0,8(1)
25 mtfsf 255,0
26
27 /* return 0 */
28 li 3,0
29 addi 1,1,16
30 blr
31
32.global feraiseexcept
33.type feraiseexcept,@function
34feraiseexcept:
35 andis. 3,3,0x3e00
36 /* if (r3 & FE_INVALID) r3 |= software_invalid_flag */
37 andis. 0,3,0x2000
38 stwu 1,-16(1)
39 beq- 0,1f
40 ori 3,3,0x0400
411:
42 /* fpscr |= r3 */
43 mffs 0
44 stfd 0,8(1)
45 lwz 9,12(1)
46 or 9,9,3
47 stw 9,12(1)
48 lfd 0,8(1)
49 mtfsf 255,0
50
51 /* return 0 */
52 li 3,0
53 addi 1,1,16
54 blr
55
56.global fetestexcept
57.type fetestexcept,@function
58fetestexcept:
59 andis. 3,3,0x3e00
60 /* return r3 & fpscr */
61 stwu 1,-16(1)
62 mffs 0
63 stfd 0,8(1)
64 lwz 9,12(1)
65 addi 1,1,16
66 and 3,3,9
67 blr
68
69.global fegetround
70.type fegetround,@function
71fegetround:
72 /* return fpscr & 3 */
73 stwu 1,-16(1)
74 mffs 0
75 stfd 0,8(1)
76 lwz 3,12(1)
77 addi 1,1,16
78 clrlwi 3,3,30
79 blr
80
81.global __fesetround
82.hidden __fesetround
83.type __fesetround,@function
84__fesetround:
85 /*
86 * note: invalid input is not checked, r3 < 4 must hold
87 * fpscr = (fpscr & -4U) | r3
88 */
89 stwu 1,-16(1)
90 mffs 0
91 stfd 0,8(1)
92 lwz 9,12(1)
93 clrrwi 9,9,2
94 or 9,9,3
95 stw 9,12(1)
96 lfd 0,8(1)
97 mtfsf 255,0
98
99 /* return 0 */
100 li 3,0
101 addi 1,1,16
102 blr
103
104.global fegetenv
105.type fegetenv,@function
106fegetenv:
107 /* *r3 = fpscr */
108 mffs 0
109 stfd 0,0(3)
110 /* return 0 */
111 li 3,0
112 blr
113
114.global fesetenv
115.type fesetenv,@function
116fesetenv:
117 cmpwi 3, -1
118 bne 1f
119 mflr 4
120 bl 2f
121 .zero 8
1222: mflr 3
123 mtlr 4
1241: /* fpscr = *r3 */
125 lfd 0,0(3)
126 mtfsf 255,0
127 /* return 0 */
128 li 3,0
129 blr
130#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/riscv64/fenv.S deleted-56
...@@ -1,56 +0,0 @@
1#ifdef __riscv_flen
2
3.global feclearexcept
4.type feclearexcept, %function
5feclearexcept:
6 csrc fflags, a0
7 li a0, 0
8 ret
9
10.global feraiseexcept
11.type feraiseexcept, %function
12feraiseexcept:
13 csrs fflags, a0
14 li a0, 0
15 ret
16
17.global fetestexcept
18.type fetestexcept, %function
19fetestexcept:
20 frflags t0
21 and a0, t0, a0
22 ret
23
24.global fegetround
25.type fegetround, %function
26fegetround:
27 frrm a0
28 ret
29
30.global __fesetround
31.type __fesetround, %function
32__fesetround:
33 fsrm t0, a0
34 li a0, 0
35 ret
36
37.global fegetenv
38.type fegetenv, %function
39fegetenv:
40 frcsr t0
41 sw t0, 0(a0)
42 li a0, 0
43 ret
44
45.global fesetenv
46.type fesetenv, %function
47fesetenv:
48 li t2, -1
49 li t1, 0
50 beq a0, t2, 1f
51 lw t1, 0(a0)
521: fscsr t1
53 li a0, 0
54 ret
55
56#endif
lib/libc/wasi/libc-top-half/musl/src/fenv/sh/fenv.S deleted-81
...@@ -1,81 +0,0 @@
1#if __SH_FPU_ANY__ || __SH4__
2
3.global fegetround
4.type fegetround, @function
5fegetround:
6 sts fpscr, r0
7 rts
8 and #3, r0
9
10.global __fesetround
11.hidden __fesetround
12.type __fesetround, @function
13__fesetround:
14 sts fpscr, r0
15 mov #-4, r1
16 and r1, r0
17 or r4, r0
18 lds r0, fpscr
19 rts
20 mov #0, r0
21
22.global fetestexcept
23.type fetestexcept, @function
24fetestexcept:
25 sts fpscr, r0
26 and r4, r0
27 rts
28 and #0x7c, r0
29
30.global feclearexcept
31.type feclearexcept, @function
32feclearexcept:
33 mov r4, r0
34 and #0x7c, r0
35 not r0, r4
36 sts fpscr, r0
37 and r4, r0
38 lds r0, fpscr
39 rts
40 mov #0, r0
41
42.global feraiseexcept
43.type feraiseexcept, @function
44feraiseexcept:
45 mov r4, r0
46 and #0x7c, r0
47 sts fpscr, r4
48 or r4, r0
49 lds r0, fpscr
50 rts
51 mov #0, r0
52
53.global fegetenv
54.type fegetenv, @function
55fegetenv:
56 sts fpscr, r0
57 mov.l r0, @r4
58 rts
59 mov #0, r0
60
61.global fesetenv
62.type fesetenv, @function
63fesetenv:
64 mov r4, r0
65 cmp/eq #-1, r0
66 bf 1f
67
68 ! the default environment is complicated by the fact that we need to
69 ! preserve the current precision bit, which we do not know a priori
70 sts fpscr, r0
71 mov #8, r1
72 swap.w r1, r1
73 bra 2f
74 and r1, r0
75
761: mov.l @r4, r0 ! non-default environment
772: lds r0, fpscr
78 rts
79 mov #0, r0
80
81#endif
lib/libc/wasi/libc-top-half/musl/src/ldso/arm/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/arm/tlsdesc.S deleted-55
...@@ -1,55 +0,0 @@
1.syntax unified
2
3.text
4.global __tlsdesc_static
5.hidden __tlsdesc_static
6.type __tlsdesc_static,%function
7__tlsdesc_static:
8 ldr r0,[r0]
9 bx lr
10
11.global __tlsdesc_dynamic
12.hidden __tlsdesc_dynamic
13.type __tlsdesc_dynamic,%function
14__tlsdesc_dynamic:
15 push {r2,r3,ip,lr}
16 ldr r1,[r0]
17 ldr r2,[r1,#4] // r2 = offset
18 ldr r1,[r1] // r1 = modid
19
20#if ((__ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
21 || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
22 mrc p15,0,r0,c13,c0,3
23#else
24 ldr r0,1f
25 add r0,r0,pc
26 ldr r0,[r0]
272:
28#if __ARM_ARCH >= 5
29 blx r0 // r0 = tp
30#else
31#if __thumb__
32 add lr,pc,#1
33#else
34 mov lr,pc
35#endif
36 bx r0
37#endif
38#endif
39 ldr r3,[r0,#-4] // r3 = dtv
40 ldr ip,[r3,r1,LSL #2]
41 sub r0,ip,r0
42 add r0,r0,r2 // r0 = r3[r1]-r0+r2
43#if __ARM_ARCH >= 5
44 pop {r2,r3,ip,pc}
45#else
46 pop {r2,r3,ip,lr}
47 bx lr
48#endif
49
50#if ((__ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
51 || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
52#else
53 .align 2
541: .word __a_gettp_ptr - 2b
55#endif
lib/libc/wasi/libc-top-half/musl/src/ldso/i386/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/m68k/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/microblaze/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/mips/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/mipsn32/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/or1k/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/powerpc/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/ldso/sh/dlsym_time64.S deleted-3
...@@ -1,3 +0,0 @@
1#define __dlsym __dlsym_redir_time64
2#define dlsym __dlsym_time64
3#include "dlsym.s"
lib/libc/wasi/libc-top-half/musl/src/setjmp/arm/longjmp.S deleted-50
...@@ -1,50 +0,0 @@
1.syntax unified
2.global _longjmp
3.global longjmp
4.type _longjmp,%function
5.type longjmp,%function
6_longjmp:
7longjmp:
8 mov ip,r0
9 movs r0,r1
10 moveq r0,#1
11 ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp}
12 ldmia ip!, {r2,lr}
13 mov sp,r2
14
15 adr r1,1f
16 ldr r2,1f
17 ldr r1,[r1,r2]
18
19#if __ARM_ARCH < 8
20 tst r1,#0x260
21 beq 3f
22 // HWCAP_ARM_FPA
23 tst r1,#0x20
24 beq 2f
25 ldc p2, cr4, [ip], #48
26#endif
272: tst r1,#0x40
28 beq 2f
29 .fpu vfp
30 vldmia ip!, {d8-d15}
31 .fpu softvfp
32 .eabi_attribute 10, 0
33 .eabi_attribute 27, 0
34#if __ARM_ARCH < 8
35 // HWCAP_ARM_IWMMXT
362: tst r1,#0x200
37 beq 3f
38 ldcl p1, cr10, [ip], #8
39 ldcl p1, cr11, [ip], #8
40 ldcl p1, cr12, [ip], #8
41 ldcl p1, cr13, [ip], #8
42 ldcl p1, cr14, [ip], #8
43 ldcl p1, cr15, [ip], #8
44#endif
452:
463: bx lr
47
48.hidden __hwcap
49.align 2
501: .word __hwcap-1b
lib/libc/wasi/libc-top-half/musl/src/setjmp/arm/setjmp.S deleted-52
...@@ -1,52 +0,0 @@
1.syntax unified
2.global __setjmp
3.global _setjmp
4.global setjmp
5.type __setjmp,%function
6.type _setjmp,%function
7.type setjmp,%function
8__setjmp:
9_setjmp:
10setjmp:
11 mov ip,r0
12 stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp}
13 mov r2,sp
14 stmia ip!,{r2,lr}
15 mov r0,#0
16
17 adr r1,1f
18 ldr r2,1f
19 ldr r1,[r1,r2]
20
21#if __ARM_ARCH < 8
22 tst r1,#0x260
23 beq 3f
24 // HWCAP_ARM_FPA
25 tst r1,#0x20
26 beq 2f
27 stc p2, cr4, [ip], #48
28#endif
292: tst r1,#0x40
30 beq 2f
31 .fpu vfp
32 vstmia ip!, {d8-d15}
33 .fpu softvfp
34 .eabi_attribute 10, 0
35 .eabi_attribute 27, 0
36#if __ARM_ARCH < 8
37 // HWCAP_ARM_IWMMXT
382: tst r1,#0x200
39 beq 3f
40 stcl p1, cr10, [ip], #8
41 stcl p1, cr11, [ip], #8
42 stcl p1, cr12, [ip], #8
43 stcl p1, cr13, [ip], #8
44 stcl p1, cr14, [ip], #8
45 stcl p1, cr15, [ip], #8
46#endif
472:
483: bx lr
49
50.hidden __hwcap
51.align 2
521: .word __hwcap-1b
lib/libc/wasi/libc-top-half/musl/src/setjmp/mips/longjmp.S deleted-34
...@@ -1,34 +0,0 @@
1.set noreorder
2
3.global _longjmp
4.global longjmp
5.type _longjmp,@function
6.type longjmp,@function
7_longjmp:
8longjmp:
9 move $2, $5
10 bne $2, $0, 1f
11 nop
12 addu $2, $2, 1
131:
14#ifndef __mips_soft_float
15 l.d $f20, 56($4)
16 l.d $f22, 64($4)
17 l.d $f24, 72($4)
18 l.d $f26, 80($4)
19 l.d $f28, 88($4)
20 l.d $f30, 96($4)
21#endif
22 lw $ra, 0($4)
23 lw $sp, 4($4)
24 lw $16, 8($4)
25 lw $17, 12($4)
26 lw $18, 16($4)
27 lw $19, 20($4)
28 lw $20, 24($4)
29 lw $21, 28($4)
30 lw $22, 32($4)
31 lw $23, 36($4)
32 lw $30, 40($4)
33 jr $ra
34 lw $28, 44($4)
lib/libc/wasi/libc-top-half/musl/src/setjmp/mips/setjmp.S deleted-33
...@@ -1,33 +0,0 @@
1.set noreorder
2
3.global __setjmp
4.global _setjmp
5.global setjmp
6.type __setjmp,@function
7.type _setjmp,@function
8.type setjmp,@function
9__setjmp:
10_setjmp:
11setjmp:
12 sw $ra, 0($4)
13 sw $sp, 4($4)
14 sw $16, 8($4)
15 sw $17, 12($4)
16 sw $18, 16($4)
17 sw $19, 20($4)
18 sw $20, 24($4)
19 sw $21, 28($4)
20 sw $22, 32($4)
21 sw $23, 36($4)
22 sw $30, 40($4)
23 sw $28, 44($4)
24#ifndef __mips_soft_float
25 s.d $f20, 56($4)
26 s.d $f22, 64($4)
27 s.d $f24, 72($4)
28 s.d $f26, 80($4)
29 s.d $f28, 88($4)
30 s.d $f30, 96($4)
31#endif
32 jr $ra
33 li $2, 0
lib/libc/wasi/libc-top-half/musl/src/setjmp/mips64/longjmp.S deleted-37
...@@ -1,37 +0,0 @@
1.set noreorder
2.global _longjmp
3.global longjmp
4.type _longjmp,@function
5.type longjmp,@function
6_longjmp:
7longjmp:
8 move $2, $5
9
10 bne $2, $0, 1f
11 nop
12 daddu $2, $2, 1
131:
14#ifndef __mips_soft_float
15 ldc1 $24, 96($4)
16 ldc1 $25, 104($4)
17 ldc1 $26, 112($4)
18 ldc1 $27, 120($4)
19 ldc1 $28, 128($4)
20 ldc1 $29, 136($4)
21 ldc1 $30, 144($4)
22 ldc1 $31, 152($4)
23#endif
24 ld $ra, 0($4)
25 ld $sp, 8($4)
26 ld $gp, 16($4)
27 ld $16, 24($4)
28 ld $17, 32($4)
29 ld $18, 40($4)
30 ld $19, 48($4)
31 ld $20, 56($4)
32 ld $21, 64($4)
33 ld $22, 72($4)
34 ld $23, 80($4)
35 ld $30, 88($4)
36 jr $ra
37 nop
lib/libc/wasi/libc-top-half/musl/src/setjmp/mips64/setjmp.S deleted-34
...@@ -1,34 +0,0 @@
1.set noreorder
2.global __setjmp
3.global _setjmp
4.global setjmp
5.type __setjmp,@function
6.type _setjmp,@function
7.type setjmp,@function
8__setjmp:
9_setjmp:
10setjmp:
11 sd $ra, 0($4)
12 sd $sp, 8($4)
13 sd $gp, 16($4)
14 sd $16, 24($4)
15 sd $17, 32($4)
16 sd $18, 40($4)
17 sd $19, 48($4)
18 sd $20, 56($4)
19 sd $21, 64($4)
20 sd $22, 72($4)
21 sd $23, 80($4)
22 sd $30, 88($4)
23#ifndef __mips_soft_float
24 sdc1 $24, 96($4)
25 sdc1 $25, 104($4)
26 sdc1 $26, 112($4)
27 sdc1 $27, 120($4)
28 sdc1 $28, 128($4)
29 sdc1 $29, 136($4)
30 sdc1 $30, 144($4)
31 sdc1 $31, 152($4)
32#endif
33 jr $ra
34 li $2, 0
lib/libc/wasi/libc-top-half/musl/src/setjmp/mipsn32/longjmp.S deleted-36
...@@ -1,36 +0,0 @@
1.set noreorder
2.global _longjmp
3.global longjmp
4.type _longjmp,@function
5.type longjmp,@function
6_longjmp:
7longjmp:
8 move $2, $5
9 bne $2, $0, 1f
10 nop
11 addu $2, $2, 1
121:
13#ifndef __mips_soft_float
14 ldc1 $24, 96($4)
15 ldc1 $25, 104($4)
16 ldc1 $26, 112($4)
17 ldc1 $27, 120($4)
18 ldc1 $28, 128($4)
19 ldc1 $29, 136($4)
20 ldc1 $30, 144($4)
21 ldc1 $31, 152($4)
22#endif
23 ld $ra, 0($4)
24 ld $sp, 8($4)
25 ld $gp, 16($4)
26 ld $16, 24($4)
27 ld $17, 32($4)
28 ld $18, 40($4)
29 ld $19, 48($4)
30 ld $20, 56($4)
31 ld $21, 64($4)
32 ld $22, 72($4)
33 ld $23, 80($4)
34 ld $30, 88($4)
35 jr $ra
36 nop
lib/libc/wasi/libc-top-half/musl/src/setjmp/mipsn32/setjmp.S deleted-34
...@@ -1,34 +0,0 @@
1.set noreorder
2.global __setjmp
3.global _setjmp
4.global setjmp
5.type __setjmp,@function
6.type _setjmp,@function
7.type setjmp,@function
8__setjmp:
9_setjmp:
10setjmp:
11 sd $ra, 0($4)
12 sd $sp, 8($4)
13 sd $gp, 16($4)
14 sd $16, 24($4)
15 sd $17, 32($4)
16 sd $18, 40($4)
17 sd $19, 48($4)
18 sd $20, 56($4)
19 sd $21, 64($4)
20 sd $22, 72($4)
21 sd $23, 80($4)
22 sd $30, 88($4)
23#ifndef __mips_soft_float
24 sdc1 $24, 96($4)
25 sdc1 $25, 104($4)
26 sdc1 $26, 112($4)
27 sdc1 $27, 120($4)
28 sdc1 $28, 128($4)
29 sdc1 $29, 136($4)
30 sdc1 $30, 144($4)
31 sdc1 $31, 152($4)
32#endif
33 jr $ra
34 li $2, 0
lib/libc/wasi/libc-top-half/musl/src/setjmp/powerpc/longjmp.S deleted-99
...@@ -1,99 +0,0 @@
1 .global _longjmp
2 .global longjmp
3 .type _longjmp,@function
4 .type longjmp,@function
5_longjmp:
6longjmp:
7 /*
8 * void longjmp(jmp_buf env, int val);
9 * put val into return register and restore the env saved in setjmp
10 * if val(r4) is 0, put 1 there.
11 */
12 /* 0) move old return address into r0 */
13 lwz 0, 0(3)
14 /* 1) put it into link reg */
15 mtlr 0
16 /* 2 ) restore stack ptr */
17 lwz 1, 4(3)
18 /* 3) restore control reg */
19 lwz 0, 8(3)
20 mtcr 0
21 /* 4) restore r14-r31 */
22 lwz 14, 12(3)
23 lwz 15, 16(3)
24 lwz 16, 20(3)
25 lwz 17, 24(3)
26 lwz 18, 28(3)
27 lwz 19, 32(3)
28 lwz 20, 36(3)
29 lwz 21, 40(3)
30 lwz 22, 44(3)
31 lwz 23, 48(3)
32 lwz 24, 52(3)
33 lwz 25, 56(3)
34 lwz 26, 60(3)
35 lwz 27, 64(3)
36 lwz 28, 68(3)
37 lwz 29, 72(3)
38 lwz 30, 76(3)
39 lwz 31, 80(3)
40#if defined(_SOFT_FLOAT) || defined(__NO_FPRS__)
41 mflr 0
42 bl 1f
43 .hidden __hwcap
44 .long __hwcap-.
451: mflr 4
46 lwz 5, 0(4)
47 lwzx 4, 4, 5
48 andis. 4, 4, 0x80
49 beq 1f
50 .long 0x11c35b01 /* evldd 14,88(3) */
51 .long 0x11e36301 /* ... */
52 .long 0x12036b01
53 .long 0x12237301
54 .long 0x12437b01
55 .long 0x12638301
56 .long 0x12838b01
57 .long 0x12a39301
58 .long 0x12c39b01
59 .long 0x12e3a301
60 .long 0x1303ab01
61 .long 0x1323b301
62 .long 0x1343bb01
63 .long 0x1363c301
64 .long 0x1383cb01
65 .long 0x13a3d301
66 .long 0x13c3db01
67 .long 0x13e3e301 /* evldd 31,224(3) */
68 .long 0x11a3eb01 /* evldd 13,232(3) */
691: mtlr 0
70#else
71 lfd 14,88(3)
72 lfd 15,96(3)
73 lfd 16,104(3)
74 lfd 17,112(3)
75 lfd 18,120(3)
76 lfd 19,128(3)
77 lfd 20,136(3)
78 lfd 21,144(3)
79 lfd 22,152(3)
80 lfd 23,160(3)
81 lfd 24,168(3)
82 lfd 25,176(3)
83 lfd 26,184(3)
84 lfd 27,192(3)
85 lfd 28,200(3)
86 lfd 29,208(3)
87 lfd 30,216(3)
88 lfd 31,224(3)
89#endif
90 /* 5) put val into return reg r3 */
91 mr 3, 4
92
93 /* 6) check if return value is 0, make it 1 in that case */
94 cmpwi cr7, 4, 0
95 bne cr7, 1f
96 li 3, 1
971:
98 blr
99
lib/libc/wasi/libc-top-half/musl/src/setjmp/powerpc/setjmp.S deleted-93
...@@ -1,93 +0,0 @@
1 .global ___setjmp
2 .hidden ___setjmp
3 .global __setjmp
4 .global _setjmp
5 .global setjmp
6 .type __setjmp,@function
7 .type _setjmp,@function
8 .type setjmp,@function
9___setjmp:
10__setjmp:
11_setjmp:
12setjmp:
13 /* 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg) */
14 mflr 0
15 stw 0, 0(3)
16 /* 1) store reg1 (SP) */
17 stw 1, 4(3)
18 /* 2) store cr */
19 mfcr 0
20 stw 0, 8(3)
21 /* 3) store r14-31 */
22 stw 14, 12(3)
23 stw 15, 16(3)
24 stw 16, 20(3)
25 stw 17, 24(3)
26 stw 18, 28(3)
27 stw 19, 32(3)
28 stw 20, 36(3)
29 stw 21, 40(3)
30 stw 22, 44(3)
31 stw 23, 48(3)
32 stw 24, 52(3)
33 stw 25, 56(3)
34 stw 26, 60(3)
35 stw 27, 64(3)
36 stw 28, 68(3)
37 stw 29, 72(3)
38 stw 30, 76(3)
39 stw 31, 80(3)
40#if defined(_SOFT_FLOAT) || defined(__NO_FPRS__)
41 mflr 0
42 bl 1f
43 .hidden __hwcap
44 .long __hwcap-.
451: mflr 4
46 lwz 5, 0(4)
47 lwzx 4, 4, 5
48 andis. 4, 4, 0x80
49 beq 1f
50 .long 0x11c35b21 /* evstdd 14,88(3) */
51 .long 0x11e36321 /* ... */
52 .long 0x12036b21
53 .long 0x12237321
54 .long 0x12437b21
55 .long 0x12638321
56 .long 0x12838b21
57 .long 0x12a39321
58 .long 0x12c39b21
59 .long 0x12e3a321
60 .long 0x1303ab21
61 .long 0x1323b321
62 .long 0x1343bb21
63 .long 0x1363c321
64 .long 0x1383cb21
65 .long 0x13a3d321
66 .long 0x13c3db21
67 .long 0x13e3e321 /* evstdd 31,224(3) */
68 .long 0x11a3eb21 /* evstdd 13,232(3) */
691: mtlr 0
70#else
71 stfd 14,88(3)
72 stfd 15,96(3)
73 stfd 16,104(3)
74 stfd 17,112(3)
75 stfd 18,120(3)
76 stfd 19,128(3)
77 stfd 20,136(3)
78 stfd 21,144(3)
79 stfd 22,152(3)
80 stfd 23,160(3)
81 stfd 24,168(3)
82 stfd 25,176(3)
83 stfd 26,184(3)
84 stfd 27,192(3)
85 stfd 28,200(3)
86 stfd 29,208(3)
87 stfd 30,216(3)
88 stfd 31,224(3)
89#endif
90 /* 4) set return value to 0 */
91 li 3, 0
92 /* 5) return */
93 blr
lib/libc/wasi/libc-top-half/musl/src/setjmp/riscv64/longjmp.S deleted-42
...@@ -1,42 +0,0 @@
1.global __longjmp
2.global _longjmp
3.global longjmp
4.type __longjmp, %function
5.type _longjmp, %function
6.type longjmp, %function
7__longjmp:
8_longjmp:
9longjmp:
10 ld s0, 0(a0)
11 ld s1, 8(a0)
12 ld s2, 16(a0)
13 ld s3, 24(a0)
14 ld s4, 32(a0)
15 ld s5, 40(a0)
16 ld s6, 48(a0)
17 ld s7, 56(a0)
18 ld s8, 64(a0)
19 ld s9, 72(a0)
20 ld s10, 80(a0)
21 ld s11, 88(a0)
22 ld sp, 96(a0)
23 ld ra, 104(a0)
24
25#ifndef __riscv_float_abi_soft
26 fld fs0, 112(a0)
27 fld fs1, 120(a0)
28 fld fs2, 128(a0)
29 fld fs3, 136(a0)
30 fld fs4, 144(a0)
31 fld fs5, 152(a0)
32 fld fs6, 160(a0)
33 fld fs7, 168(a0)
34 fld fs8, 176(a0)
35 fld fs9, 184(a0)
36 fld fs10, 192(a0)
37 fld fs11, 200(a0)
38#endif
39
40 seqz a0, a1
41 add a0, a0, a1
42 ret
lib/libc/wasi/libc-top-half/musl/src/setjmp/riscv64/setjmp.S deleted-41
...@@ -1,41 +0,0 @@
1.global __setjmp
2.global _setjmp
3.global setjmp
4.type __setjmp, %function
5.type _setjmp, %function
6.type setjmp, %function
7__setjmp:
8_setjmp:
9setjmp:
10 sd s0, 0(a0)
11 sd s1, 8(a0)
12 sd s2, 16(a0)
13 sd s3, 24(a0)
14 sd s4, 32(a0)
15 sd s5, 40(a0)
16 sd s6, 48(a0)
17 sd s7, 56(a0)
18 sd s8, 64(a0)
19 sd s9, 72(a0)
20 sd s10, 80(a0)
21 sd s11, 88(a0)
22 sd sp, 96(a0)
23 sd ra, 104(a0)
24
25#ifndef __riscv_float_abi_soft
26 fsd fs0, 112(a0)
27 fsd fs1, 120(a0)
28 fsd fs2, 128(a0)
29 fsd fs3, 136(a0)
30 fsd fs4, 144(a0)
31 fsd fs5, 152(a0)
32 fsd fs6, 160(a0)
33 fsd fs7, 168(a0)
34 fsd fs8, 176(a0)
35 fsd fs9, 184(a0)
36 fsd fs10, 192(a0)
37 fsd fs11, 200(a0)
38#endif
39
40 li a0, 0
41 ret
lib/libc/wasi/libc-top-half/musl/src/setjmp/sh/longjmp.S deleted-28
...@@ -1,28 +0,0 @@
1.global _longjmp
2.global longjmp
3.type _longjmp, @function
4.type longjmp, @function
5_longjmp:
6longjmp:
7 mov.l @r4+, r8
8 mov.l @r4+, r9
9 mov.l @r4+, r10
10 mov.l @r4+, r11
11 mov.l @r4+, r12
12 mov.l @r4+, r13
13 mov.l @r4+, r14
14 mov.l @r4+, r15
15 lds.l @r4+, pr
16#if __SH_FPU_ANY__ || __SH4__
17 fmov.s @r4+, fr12
18 fmov.s @r4+, fr13
19 fmov.s @r4+, fr14
20 fmov.s @r4+, fr15
21#endif
22
23 tst r5, r5
24 movt r0
25 add r5, r0
26
27 rts
28 nop
lib/libc/wasi/libc-top-half/musl/src/setjmp/sh/setjmp.S deleted-32
...@@ -1,32 +0,0 @@
1.global ___setjmp
2.hidden ___setjmp
3.global __setjmp
4.global _setjmp
5.global setjmp
6.type __setjmp, @function
7.type _setjmp, @function
8.type setjmp, @function
9___setjmp:
10__setjmp:
11_setjmp:
12setjmp:
13#if __SH_FPU_ANY__ || __SH4__
14 add #52, r4
15 fmov.s fr15, @-r4
16 fmov.s fr14, @-r4
17 fmov.s fr13, @-r4
18 fmov.s fr12, @-r4
19#else
20 add #36, r4
21#endif
22 sts.l pr, @-r4
23 mov.l r15, @-r4
24 mov.l r14, @-r4
25 mov.l r13, @-r4
26 mov.l r12, @-r4
27 mov.l r11, @-r4
28 mov.l r10, @-r4
29 mov.l r9, @-r4
30 mov.l r8, @-r4
31 rts
32 mov #0, r0
lib/libc/wasi/libc-top-half/musl/src/string/aarch64/memcpy.S deleted-186
...@@ -1,186 +0,0 @@
1/*
2 * memcpy - copy memory area
3 *
4 * Copyright (c) 2012-2020, Arm Limited.
5 * SPDX-License-Identifier: MIT
6 */
7
8/* Assumptions:
9 *
10 * ARMv8-a, AArch64, unaligned accesses.
11 *
12 */
13
14#define dstin x0
15#define src x1
16#define count x2
17#define dst x3
18#define srcend x4
19#define dstend x5
20#define A_l x6
21#define A_lw w6
22#define A_h x7
23#define B_l x8
24#define B_lw w8
25#define B_h x9
26#define C_l x10
27#define C_lw w10
28#define C_h x11
29#define D_l x12
30#define D_h x13
31#define E_l x14
32#define E_h x15
33#define F_l x16
34#define F_h x17
35#define G_l count
36#define G_h dst
37#define H_l src
38#define H_h srcend
39#define tmp1 x14
40
41/* This implementation of memcpy uses unaligned accesses and branchless
42 sequences to keep the code small, simple and improve performance.
43
44 Copies are split into 3 main cases: small copies of up to 32 bytes, medium
45 copies of up to 128 bytes, and large copies. The overhead of the overlap
46 check is negligible since it is only required for large copies.
47
48 Large copies use a software pipelined loop processing 64 bytes per iteration.
49 The destination pointer is 16-byte aligned to minimize unaligned accesses.
50 The loop tail is handled by always copying 64 bytes from the end.
51*/
52
53.global memcpy
54.type memcpy,%function
55memcpy:
56 add srcend, src, count
57 add dstend, dstin, count
58 cmp count, 128
59 b.hi .Lcopy_long
60 cmp count, 32
61 b.hi .Lcopy32_128
62
63 /* Small copies: 0..32 bytes. */
64 cmp count, 16
65 b.lo .Lcopy16
66 ldp A_l, A_h, [src]
67 ldp D_l, D_h, [srcend, -16]
68 stp A_l, A_h, [dstin]
69 stp D_l, D_h, [dstend, -16]
70 ret
71
72 /* Copy 8-15 bytes. */
73.Lcopy16:
74 tbz count, 3, .Lcopy8
75 ldr A_l, [src]
76 ldr A_h, [srcend, -8]
77 str A_l, [dstin]
78 str A_h, [dstend, -8]
79 ret
80
81 .p2align 3
82 /* Copy 4-7 bytes. */
83.Lcopy8:
84 tbz count, 2, .Lcopy4
85 ldr A_lw, [src]
86 ldr B_lw, [srcend, -4]
87 str A_lw, [dstin]
88 str B_lw, [dstend, -4]
89 ret
90
91 /* Copy 0..3 bytes using a branchless sequence. */
92.Lcopy4:
93 cbz count, .Lcopy0
94 lsr tmp1, count, 1
95 ldrb A_lw, [src]
96 ldrb C_lw, [srcend, -1]
97 ldrb B_lw, [src, tmp1]
98 strb A_lw, [dstin]
99 strb B_lw, [dstin, tmp1]
100 strb C_lw, [dstend, -1]
101.Lcopy0:
102 ret
103
104 .p2align 4
105 /* Medium copies: 33..128 bytes. */
106.Lcopy32_128:
107 ldp A_l, A_h, [src]
108 ldp B_l, B_h, [src, 16]
109 ldp C_l, C_h, [srcend, -32]
110 ldp D_l, D_h, [srcend, -16]
111 cmp count, 64
112 b.hi .Lcopy128
113 stp A_l, A_h, [dstin]
114 stp B_l, B_h, [dstin, 16]
115 stp C_l, C_h, [dstend, -32]
116 stp D_l, D_h, [dstend, -16]
117 ret
118
119 .p2align 4
120 /* Copy 65..128 bytes. */
121.Lcopy128:
122 ldp E_l, E_h, [src, 32]
123 ldp F_l, F_h, [src, 48]
124 cmp count, 96
125 b.ls .Lcopy96
126 ldp G_l, G_h, [srcend, -64]
127 ldp H_l, H_h, [srcend, -48]
128 stp G_l, G_h, [dstend, -64]
129 stp H_l, H_h, [dstend, -48]
130.Lcopy96:
131 stp A_l, A_h, [dstin]
132 stp B_l, B_h, [dstin, 16]
133 stp E_l, E_h, [dstin, 32]
134 stp F_l, F_h, [dstin, 48]
135 stp C_l, C_h, [dstend, -32]
136 stp D_l, D_h, [dstend, -16]
137 ret
138
139 .p2align 4
140 /* Copy more than 128 bytes. */
141.Lcopy_long:
142
143 /* Copy 16 bytes and then align dst to 16-byte alignment. */
144
145 ldp D_l, D_h, [src]
146 and tmp1, dstin, 15
147 bic dst, dstin, 15
148 sub src, src, tmp1
149 add count, count, tmp1 /* Count is now 16 too large. */
150 ldp A_l, A_h, [src, 16]
151 stp D_l, D_h, [dstin]
152 ldp B_l, B_h, [src, 32]
153 ldp C_l, C_h, [src, 48]
154 ldp D_l, D_h, [src, 64]!
155 subs count, count, 128 + 16 /* Test and readjust count. */
156 b.ls .Lcopy64_from_end
157
158.Lloop64:
159 stp A_l, A_h, [dst, 16]
160 ldp A_l, A_h, [src, 16]
161 stp B_l, B_h, [dst, 32]
162 ldp B_l, B_h, [src, 32]
163 stp C_l, C_h, [dst, 48]
164 ldp C_l, C_h, [src, 48]
165 stp D_l, D_h, [dst, 64]!
166 ldp D_l, D_h, [src, 64]!
167 subs count, count, 64
168 b.hi .Lloop64
169
170 /* Write the last iteration and copy 64 bytes from the end. */
171.Lcopy64_from_end:
172 ldp E_l, E_h, [srcend, -64]
173 stp A_l, A_h, [dst, 16]
174 ldp A_l, A_h, [srcend, -48]
175 stp B_l, B_h, [dst, 32]
176 ldp B_l, B_h, [srcend, -32]
177 stp C_l, C_h, [dst, 48]
178 ldp C_l, C_h, [srcend, -16]
179 stp D_l, D_h, [dst, 64]
180 stp E_l, E_h, [dstend, -64]
181 stp A_l, A_h, [dstend, -48]
182 stp B_l, B_h, [dstend, -32]
183 stp C_l, C_h, [dstend, -16]
184 ret
185
186.size memcpy,.-memcpy
lib/libc/wasi/libc-top-half/musl/src/string/aarch64/memset.S deleted-115
...@@ -1,115 +0,0 @@
1/*
2 * memset - fill memory with a constant byte
3 *
4 * Copyright (c) 2012-2020, Arm Limited.
5 * SPDX-License-Identifier: MIT
6 */
7
8/* Assumptions:
9 *
10 * ARMv8-a, AArch64, Advanced SIMD, unaligned accesses.
11 *
12 */
13
14#define dstin x0
15#define val x1
16#define valw w1
17#define count x2
18#define dst x3
19#define dstend x4
20#define zva_val x5
21
22.global memset
23.type memset,%function
24memset:
25
26 dup v0.16B, valw
27 add dstend, dstin, count
28
29 cmp count, 96
30 b.hi .Lset_long
31 cmp count, 16
32 b.hs .Lset_medium
33 mov val, v0.D[0]
34
35 /* Set 0..15 bytes. */
36 tbz count, 3, 1f
37 str val, [dstin]
38 str val, [dstend, -8]
39 ret
40 nop
411: tbz count, 2, 2f
42 str valw, [dstin]
43 str valw, [dstend, -4]
44 ret
452: cbz count, 3f
46 strb valw, [dstin]
47 tbz count, 1, 3f
48 strh valw, [dstend, -2]
493: ret
50
51 /* Set 17..96 bytes. */
52.Lset_medium:
53 str q0, [dstin]
54 tbnz count, 6, .Lset96
55 str q0, [dstend, -16]
56 tbz count, 5, 1f
57 str q0, [dstin, 16]
58 str q0, [dstend, -32]
591: ret
60
61 .p2align 4
62 /* Set 64..96 bytes. Write 64 bytes from the start and
63 32 bytes from the end. */
64.Lset96:
65 str q0, [dstin, 16]
66 stp q0, q0, [dstin, 32]
67 stp q0, q0, [dstend, -32]
68 ret
69
70 .p2align 4
71.Lset_long:
72 and valw, valw, 255
73 bic dst, dstin, 15
74 str q0, [dstin]
75 cmp count, 160
76 ccmp valw, 0, 0, hs
77 b.ne .Lno_zva
78
79#ifndef SKIP_ZVA_CHECK
80 mrs zva_val, dczid_el0
81 and zva_val, zva_val, 31
82 cmp zva_val, 4 /* ZVA size is 64 bytes. */
83 b.ne .Lno_zva
84#endif
85 str q0, [dst, 16]
86 stp q0, q0, [dst, 32]
87 bic dst, dst, 63
88 sub count, dstend, dst /* Count is now 64 too large. */
89 sub count, count, 128 /* Adjust count and bias for loop. */
90
91 .p2align 4
92.Lzva_loop:
93 add dst, dst, 64
94 dc zva, dst
95 subs count, count, 64
96 b.hi .Lzva_loop
97 stp q0, q0, [dstend, -64]
98 stp q0, q0, [dstend, -32]
99 ret
100
101.Lno_zva:
102 sub count, dstend, dst /* Count is 16 too large. */
103 sub dst, dst, 16 /* Dst is biased by -32. */
104 sub count, count, 64 + 16 /* Adjust count and bias for loop. */
105.Lno_zva_loop:
106 stp q0, q0, [dst, 32]
107 stp q0, q0, [dst, 64]!
108 subs count, count, 64
109 b.hi .Lno_zva_loop
110 stp q0, q0, [dstend, -64]
111 stp q0, q0, [dstend, -32]
112 ret
113
114.size memset,.-memset
115
lib/libc/wasi/libc-top-half/musl/src/string/arm/memcpy.S deleted-479
...@@ -1,479 +0,0 @@
1/*
2 * Copyright (C) 2008 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29
30/*
31 * Optimized memcpy() for ARM.
32 *
33 * note that memcpy() always returns the destination pointer,
34 * so we have to preserve R0.
35 */
36
37/*
38 * This file has been modified from the original for use in musl libc.
39 * The main changes are: addition of .type memcpy,%function to make the
40 * code safely callable from thumb mode, adjusting the return
41 * instructions to be compatible with pre-thumb ARM cpus, removal of
42 * prefetch code that is not compatible with older cpus and support for
43 * building as thumb 2 and big-endian.
44 */
45
46.syntax unified
47
48.global memcpy
49.type memcpy,%function
50memcpy:
51 /* The stack must always be 64-bits aligned to be compliant with the
52 * ARM ABI. Since we have to save R0, we might as well save R4
53 * which we can use for better pipelining of the reads below
54 */
55 .fnstart
56 .save {r0, r4, lr}
57 stmfd sp!, {r0, r4, lr}
58 /* Making room for r5-r11 which will be spilled later */
59 .pad #28
60 sub sp, sp, #28
61
62 /* it simplifies things to take care of len<4 early */
63 cmp r2, #4
64 blo copy_last_3_and_return
65
66 /* compute the offset to align the source
67 * offset = (4-(src&3))&3 = -src & 3
68 */
69 rsb r3, r1, #0
70 ands r3, r3, #3
71 beq src_aligned
72
73 /* align source to 32 bits. We need to insert 2 instructions between
74 * a ldr[b|h] and str[b|h] because byte and half-word instructions
75 * stall 2 cycles.
76 */
77 movs r12, r3, lsl #31
78 sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
79 ldrbmi r3, [r1], #1
80 ldrbcs r4, [r1], #1
81 ldrbcs r12,[r1], #1
82 strbmi r3, [r0], #1
83 strbcs r4, [r0], #1
84 strbcs r12,[r0], #1
85
86src_aligned:
87
88 /* see if src and dst are aligned together (congruent) */
89 eor r12, r0, r1
90 tst r12, #3
91 bne non_congruent
92
93 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
94 * frame. Don't update sp.
95 */
96 stmea sp, {r5-r11}
97
98 /* align the destination to a cache-line */
99 rsb r3, r0, #0
100 ands r3, r3, #0x1C
101 beq congruent_aligned32
102 cmp r3, r2
103 andhi r3, r2, #0x1C
104
105 /* conditionnaly copies 0 to 7 words (length in r3) */
106 movs r12, r3, lsl #28
107 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
108 ldmmi r1!, {r8, r9} /* 8 bytes */
109 stmcs r0!, {r4, r5, r6, r7}
110 stmmi r0!, {r8, r9}
111 tst r3, #0x4
112 ldrne r10,[r1], #4 /* 4 bytes */
113 strne r10,[r0], #4
114 sub r2, r2, r3
115
116congruent_aligned32:
117 /*
118 * here source is aligned to 32 bytes.
119 */
120
121cached_aligned32:
122 subs r2, r2, #32
123 blo less_than_32_left
124
125 /*
126 * We preload a cache-line up to 64 bytes ahead. On the 926, this will
127 * stall only until the requested world is fetched, but the linefill
128 * continues in the the background.
129 * While the linefill is going, we write our previous cache-line
130 * into the write-buffer (which should have some free space).
131 * When the linefill is done, the writebuffer will
132 * start dumping its content into memory
133 *
134 * While all this is going, we then load a full cache line into
135 * 8 registers, this cache line should be in the cache by now
136 * (or partly in the cache).
137 *
138 * This code should work well regardless of the source/dest alignment.
139 *
140 */
141
142 /* Align the preload register to a cache-line because the cpu does
143 * "critical word first" (the first word requested is loaded first).
144 */
145 @ bic r12, r1, #0x1F
146 @ add r12, r12, #64
147
1481: ldmia r1!, { r4-r11 }
149 subs r2, r2, #32
150
151 /*
152 * NOTE: if r12 is more than 64 ahead of r1, the following ldrhi
153 * for ARM9 preload will not be safely guarded by the preceding subs.
154 * When it is safely guarded the only possibility to have SIGSEGV here
155 * is because the caller overstates the length.
156 */
157 @ ldrhi r3, [r12], #32 /* cheap ARM9 preload */
158 stmia r0!, { r4-r11 }
159 bhs 1b
160
161 add r2, r2, #32
162
163less_than_32_left:
164 /*
165 * less than 32 bytes left at this point (length in r2)
166 */
167
168 /* skip all this if there is nothing to do, which should
169 * be a common case (if not executed the code below takes
170 * about 16 cycles)
171 */
172 tst r2, #0x1F
173 beq 1f
174
175 /* conditionnaly copies 0 to 31 bytes */
176 movs r12, r2, lsl #28
177 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
178 ldmmi r1!, {r8, r9} /* 8 bytes */
179 stmcs r0!, {r4, r5, r6, r7}
180 stmmi r0!, {r8, r9}
181 movs r12, r2, lsl #30
182 ldrcs r3, [r1], #4 /* 4 bytes */
183 ldrhmi r4, [r1], #2 /* 2 bytes */
184 strcs r3, [r0], #4
185 strhmi r4, [r0], #2
186 tst r2, #0x1
187 ldrbne r3, [r1] /* last byte */
188 strbne r3, [r0]
189
190 /* we're done! restore everything and return */
1911: ldmfd sp!, {r5-r11}
192 ldmfd sp!, {r0, r4, lr}
193 bx lr
194
195 /********************************************************************/
196
197non_congruent:
198 /*
199 * here source is aligned to 4 bytes
200 * but destination is not.
201 *
202 * in the code below r2 is the number of bytes read
203 * (the number of bytes written is always smaller, because we have
204 * partial words in the shift queue)
205 */
206 cmp r2, #4
207 blo copy_last_3_and_return
208
209 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
210 * frame. Don't update sp.
211 */
212 stmea sp, {r5-r11}
213
214 /* compute shifts needed to align src to dest */
215 rsb r5, r0, #0
216 and r5, r5, #3 /* r5 = # bytes in partial words */
217 mov r12, r5, lsl #3 /* r12 = right */
218 rsb lr, r12, #32 /* lr = left */
219
220 /* read the first word */
221 ldr r3, [r1], #4
222 sub r2, r2, #4
223
224 /* write a partial word (0 to 3 bytes), such that destination
225 * becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
226 */
227 movs r5, r5, lsl #31
228
229#if __ARMEB__
230 movmi r3, r3, ror #24
231 strbmi r3, [r0], #1
232 movcs r3, r3, ror #24
233 strbcs r3, [r0], #1
234 movcs r3, r3, ror #24
235 strbcs r3, [r0], #1
236#else
237 strbmi r3, [r0], #1
238 movmi r3, r3, lsr #8
239 strbcs r3, [r0], #1
240 movcs r3, r3, lsr #8
241 strbcs r3, [r0], #1
242 movcs r3, r3, lsr #8
243#endif
244
245 cmp r2, #4
246 blo partial_word_tail
247
248#if __ARMEB__
249 mov r3, r3, lsr r12
250 mov r3, r3, lsl r12
251#endif
252
253 /* Align destination to 32 bytes (cache line boundary) */
2541: tst r0, #0x1c
255 beq 2f
256 ldr r5, [r1], #4
257 sub r2, r2, #4
258#if __ARMEB__
259 mov r4, r5, lsr lr
260 orr r4, r4, r3
261 mov r3, r5, lsl r12
262#else
263 mov r4, r5, lsl lr
264 orr r4, r4, r3
265 mov r3, r5, lsr r12
266#endif
267 str r4, [r0], #4
268 cmp r2, #4
269 bhs 1b
270 blo partial_word_tail
271
272 /* copy 32 bytes at a time */
2732: subs r2, r2, #32
274 blo less_than_thirtytwo
275
276 /* Use immediate mode for the shifts, because there is an extra cycle
277 * for register shifts, which could account for up to 50% of
278 * performance hit.
279 */
280
281 cmp r12, #24
282 beq loop24
283 cmp r12, #8
284 beq loop8
285
286loop16:
287 ldr r12, [r1], #4
2881: mov r4, r12
289 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
290 subs r2, r2, #32
291 ldrhs r12, [r1], #4
292#if __ARMEB__
293 orr r3, r3, r4, lsr #16
294 mov r4, r4, lsl #16
295 orr r4, r4, r5, lsr #16
296 mov r5, r5, lsl #16
297 orr r5, r5, r6, lsr #16
298 mov r6, r6, lsl #16
299 orr r6, r6, r7, lsr #16
300 mov r7, r7, lsl #16
301 orr r7, r7, r8, lsr #16
302 mov r8, r8, lsl #16
303 orr r8, r8, r9, lsr #16
304 mov r9, r9, lsl #16
305 orr r9, r9, r10, lsr #16
306 mov r10, r10, lsl #16
307 orr r10, r10, r11, lsr #16
308 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
309 mov r3, r11, lsl #16
310#else
311 orr r3, r3, r4, lsl #16
312 mov r4, r4, lsr #16
313 orr r4, r4, r5, lsl #16
314 mov r5, r5, lsr #16
315 orr r5, r5, r6, lsl #16
316 mov r6, r6, lsr #16
317 orr r6, r6, r7, lsl #16
318 mov r7, r7, lsr #16
319 orr r7, r7, r8, lsl #16
320 mov r8, r8, lsr #16
321 orr r8, r8, r9, lsl #16
322 mov r9, r9, lsr #16
323 orr r9, r9, r10, lsl #16
324 mov r10, r10, lsr #16
325 orr r10, r10, r11, lsl #16
326 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
327 mov r3, r11, lsr #16
328#endif
329 bhs 1b
330 b less_than_thirtytwo
331
332loop8:
333 ldr r12, [r1], #4
3341: mov r4, r12
335 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
336 subs r2, r2, #32
337 ldrhs r12, [r1], #4
338#if __ARMEB__
339 orr r3, r3, r4, lsr #24
340 mov r4, r4, lsl #8
341 orr r4, r4, r5, lsr #24
342 mov r5, r5, lsl #8
343 orr r5, r5, r6, lsr #24
344 mov r6, r6, lsl #8
345 orr r6, r6, r7, lsr #24
346 mov r7, r7, lsl #8
347 orr r7, r7, r8, lsr #24
348 mov r8, r8, lsl #8
349 orr r8, r8, r9, lsr #24
350 mov r9, r9, lsl #8
351 orr r9, r9, r10, lsr #24
352 mov r10, r10, lsl #8
353 orr r10, r10, r11, lsr #24
354 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
355 mov r3, r11, lsl #8
356#else
357 orr r3, r3, r4, lsl #24
358 mov r4, r4, lsr #8
359 orr r4, r4, r5, lsl #24
360 mov r5, r5, lsr #8
361 orr r5, r5, r6, lsl #24
362 mov r6, r6, lsr #8
363 orr r6, r6, r7, lsl #24
364 mov r7, r7, lsr #8
365 orr r7, r7, r8, lsl #24
366 mov r8, r8, lsr #8
367 orr r8, r8, r9, lsl #24
368 mov r9, r9, lsr #8
369 orr r9, r9, r10, lsl #24
370 mov r10, r10, lsr #8
371 orr r10, r10, r11, lsl #24
372 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
373 mov r3, r11, lsr #8
374#endif
375 bhs 1b
376 b less_than_thirtytwo
377
378loop24:
379 ldr r12, [r1], #4
3801: mov r4, r12
381 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
382 subs r2, r2, #32
383 ldrhs r12, [r1], #4
384#if __ARMEB__
385 orr r3, r3, r4, lsr #8
386 mov r4, r4, lsl #24
387 orr r4, r4, r5, lsr #8
388 mov r5, r5, lsl #24
389 orr r5, r5, r6, lsr #8
390 mov r6, r6, lsl #24
391 orr r6, r6, r7, lsr #8
392 mov r7, r7, lsl #24
393 orr r7, r7, r8, lsr #8
394 mov r8, r8, lsl #24
395 orr r8, r8, r9, lsr #8
396 mov r9, r9, lsl #24
397 orr r9, r9, r10, lsr #8
398 mov r10, r10, lsl #24
399 orr r10, r10, r11, lsr #8
400 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
401 mov r3, r11, lsl #24
402#else
403 orr r3, r3, r4, lsl #8
404 mov r4, r4, lsr #24
405 orr r4, r4, r5, lsl #8
406 mov r5, r5, lsr #24
407 orr r5, r5, r6, lsl #8
408 mov r6, r6, lsr #24
409 orr r6, r6, r7, lsl #8
410 mov r7, r7, lsr #24
411 orr r7, r7, r8, lsl #8
412 mov r8, r8, lsr #24
413 orr r8, r8, r9, lsl #8
414 mov r9, r9, lsr #24
415 orr r9, r9, r10, lsl #8
416 mov r10, r10, lsr #24
417 orr r10, r10, r11, lsl #8
418 stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
419 mov r3, r11, lsr #24
420#endif
421 bhs 1b
422
423less_than_thirtytwo:
424 /* copy the last 0 to 31 bytes of the source */
425 rsb r12, lr, #32 /* we corrupted r12, recompute it */
426 add r2, r2, #32
427 cmp r2, #4
428 blo partial_word_tail
429
4301: ldr r5, [r1], #4
431 sub r2, r2, #4
432#if __ARMEB__
433 mov r4, r5, lsr lr
434 orr r4, r4, r3
435 mov r3, r5, lsl r12
436#else
437 mov r4, r5, lsl lr
438 orr r4, r4, r3
439 mov r3, r5, lsr r12
440#endif
441 str r4, [r0], #4
442 cmp r2, #4
443 bhs 1b
444
445partial_word_tail:
446 /* we have a partial word in the input buffer */
447 movs r5, lr, lsl #(31-3)
448#if __ARMEB__
449 movmi r3, r3, ror #24
450 strbmi r3, [r0], #1
451 movcs r3, r3, ror #24
452 strbcs r3, [r0], #1
453 movcs r3, r3, ror #24
454 strbcs r3, [r0], #1
455#else
456 strbmi r3, [r0], #1
457 movmi r3, r3, lsr #8
458 strbcs r3, [r0], #1
459 movcs r3, r3, lsr #8
460 strbcs r3, [r0], #1
461#endif
462
463 /* Refill spilled registers from the stack. Don't update sp. */
464 ldmfd sp, {r5-r11}
465
466copy_last_3_and_return:
467 movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
468 ldrbmi r2, [r1], #1
469 ldrbcs r3, [r1], #1
470 ldrbcs r12,[r1]
471 strbmi r2, [r0], #1
472 strbcs r3, [r0], #1
473 strbcs r12,[r0]
474
475 /* we're done! restore sp and spilled registers and return */
476 add sp, sp, #28
477 ldmfd sp!, {r0, r4, lr}
478 bx lr
479
lib/libc/wasi/libc-top-half/musl/src/string/memcpy.c deleted-128
...@@ -1,128 +0,0 @@
1#include <string.h>
2#include <stdint.h>
3#include <endian.h>
4
5void *memcpy(void *restrict dest, const void *restrict src, size_t n)
6{
7#if defined(__wasm_bulk_memory__)
8 if (n > BULK_MEMORY_THRESHOLD)
9 return __builtin_memcpy(dest, src, n);
10#endif
11 unsigned char *d = dest;
12 const unsigned char *s = src;
13
14#ifdef __GNUC__
15
16#if __BYTE_ORDER == __LITTLE_ENDIAN
17#define LS >>
18#define RS <<
19#else
20#define LS <<
21#define RS >>
22#endif
23
24 typedef uint32_t __attribute__((__may_alias__)) u32;
25 uint32_t w, x;
26
27 for (; (uintptr_t)s % 4 && n; n--) *d++ = *s++;
28
29 if ((uintptr_t)d % 4 == 0) {
30 for (; n>=16; s+=16, d+=16, n-=16) {
31 *(u32 *)(d+0) = *(u32 *)(s+0);
32 *(u32 *)(d+4) = *(u32 *)(s+4);
33 *(u32 *)(d+8) = *(u32 *)(s+8);
34 *(u32 *)(d+12) = *(u32 *)(s+12);
35 }
36 if (n&8) {
37 *(u32 *)(d+0) = *(u32 *)(s+0);
38 *(u32 *)(d+4) = *(u32 *)(s+4);
39 d += 8; s += 8;
40 }
41 if (n&4) {
42 *(u32 *)(d+0) = *(u32 *)(s+0);
43 d += 4; s += 4;
44 }
45 if (n&2) {
46 *d++ = *s++; *d++ = *s++;
47 }
48 if (n&1) {
49 *d = *s;
50 }
51 return dest;
52 }
53
54 if (n >= 32) switch ((uintptr_t)d % 4) {
55 case 1:
56 w = *(u32 *)s;
57 *d++ = *s++;
58 *d++ = *s++;
59 *d++ = *s++;
60 n -= 3;
61 for (; n>=17; s+=16, d+=16, n-=16) {
62 x = *(u32 *)(s+1);
63 *(u32 *)(d+0) = (w LS 24) | (x RS 8);
64 w = *(u32 *)(s+5);
65 *(u32 *)(d+4) = (x LS 24) | (w RS 8);
66 x = *(u32 *)(s+9);
67 *(u32 *)(d+8) = (w LS 24) | (x RS 8);
68 w = *(u32 *)(s+13);
69 *(u32 *)(d+12) = (x LS 24) | (w RS 8);
70 }
71 break;
72 case 2:
73 w = *(u32 *)s;
74 *d++ = *s++;
75 *d++ = *s++;
76 n -= 2;
77 for (; n>=18; s+=16, d+=16, n-=16) {
78 x = *(u32 *)(s+2);
79 *(u32 *)(d+0) = (w LS 16) | (x RS 16);
80 w = *(u32 *)(s+6);
81 *(u32 *)(d+4) = (x LS 16) | (w RS 16);
82 x = *(u32 *)(s+10);
83 *(u32 *)(d+8) = (w LS 16) | (x RS 16);
84 w = *(u32 *)(s+14);
85 *(u32 *)(d+12) = (x LS 16) | (w RS 16);
86 }
87 break;
88 case 3:
89 w = *(u32 *)s;
90 *d++ = *s++;
91 n -= 1;
92 for (; n>=19; s+=16, d+=16, n-=16) {
93 x = *(u32 *)(s+3);
94 *(u32 *)(d+0) = (w LS 8) | (x RS 24);
95 w = *(u32 *)(s+7);
96 *(u32 *)(d+4) = (x LS 8) | (w RS 24);
97 x = *(u32 *)(s+11);
98 *(u32 *)(d+8) = (w LS 8) | (x RS 24);
99 w = *(u32 *)(s+15);
100 *(u32 *)(d+12) = (x LS 8) | (w RS 24);
101 }
102 break;
103 }
104 if (n&16) {
105 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
106 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
107 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
108 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
109 }
110 if (n&8) {
111 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
112 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
113 }
114 if (n&4) {
115 *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++;
116 }
117 if (n&2) {
118 *d++ = *s++; *d++ = *s++;
119 }
120 if (n&1) {
121 *d = *s;
122 }
123 return dest;
124#endif
125
126 for (; n; n--) *d++ = *s++;
127 return dest;
128}
lib/libc/wasi/libc-top-half/musl/src/string/memmove.c deleted-46
...@@ -1,46 +0,0 @@
1#include <string.h>
2#include <stdint.h>
3
4#ifdef __GNUC__
5typedef __attribute__((__may_alias__)) size_t WT;
6#define WS (sizeof(WT))
7#endif
8
9void *memmove(void *dest, const void *src, size_t n)
10{
11#if defined(__wasm_bulk_memory__)
12 if (n > BULK_MEMORY_THRESHOLD)
13 return __builtin_memmove(dest, src, n);
14#endif
15 char *d = dest;
16 const char *s = src;
17
18 if (d==s) return d;
19 if ((uintptr_t)s-(uintptr_t)d-n <= -2*n) return memcpy(d, s, n);
20
21 if (d<s) {
22#ifdef __GNUC__
23 if ((uintptr_t)s % WS == (uintptr_t)d % WS) {
24 while ((uintptr_t)d % WS) {
25 if (!n--) return dest;
26 *d++ = *s++;
27 }
28 for (; n>=WS; n-=WS, d+=WS, s+=WS) *(WT *)d = *(WT *)s;
29 }
30#endif
31 for (; n; n--) *d++ = *s++;
32 } else {
33#ifdef __GNUC__
34 if ((uintptr_t)s % WS == (uintptr_t)d % WS) {
35 while ((uintptr_t)(d+n) % WS) {
36 if (!n--) return dest;
37 d[n] = s[n];
38 }
39 while (n>=WS) n-=WS, *(WT *)(d+n) = *(WT *)(s+n);
40 }
41#endif
42 while (n) n--, d[n] = s[n];
43 }
44
45 return dest;
46}
src/link/MachO/file.zig+6-14
...@@ -45,29 +45,21 @@ pub const File = union(enum) {...@@ -45,29 +45,21 @@ pub const File = union(enum) {
4545
46 /// Encodes symbol rank so that the following ordering applies:46 /// Encodes symbol rank so that the following ordering applies:
47 /// * strong in object47 /// * strong in object
48 /// * weak in object
49 /// * tentative in object
50 /// * strong in archive/dylib48 /// * strong in archive/dylib
49 /// * weak in object
51 /// * weak in archive/dylib50 /// * weak in archive/dylib
51 /// * tentative in object
52 /// * tentative in archive52 /// * tentative in archive
53 /// * unclaimed53 /// * unclaimed
54 /// Ties are broken by file priority.
54 pub fn getSymbolRank(file: File, args: struct {55 pub fn getSymbolRank(file: File, args: struct {
55 archive: bool = false,56 archive: bool = false,
56 weak: bool = false,57 weak: bool = false,
57 tentative: bool = false,58 tentative: bool = false,
58 }) u32 {59 }) u32 {
59 if (file != .dylib and !args.archive) {60 const archive_or_dylib = @as(u32, @intFromBool(file == .dylib or args.archive)) << 29;
60 const base: u32 = blk: {61 const strength: u32 = if (args.tentative) 0b10 << 30 else if (args.weak) 0b01 << 30 else 0b00 << 30;
61 if (args.tentative) break :blk 3;62 return strength | archive_or_dylib | file.getIndex();
62 break :blk if (args.weak) 2 else 1;
63 };
64 return (base << 16) + file.getIndex();
65 }
66 const base: u32 = blk: {
67 if (args.tentative) break :blk 3;
68 break :blk if (args.weak) 2 else 1;
69 };
70 return base + (file.getIndex() << 24);
71 }63 }
7264
73 pub fn getAtom(file: File, atom_index: Atom.Index) ?*Atom {65 pub fn getAtom(file: File, atom_index: Atom.Index) ?*Atom {
src/musl.zig-9
...@@ -1899,25 +1899,18 @@ const src_files = [_][]const u8{...@@ -1899,25 +1899,18 @@ const src_files = [_][]const u8{
1899 "musl/src/stdlib/strtol.c",1899 "musl/src/stdlib/strtol.c",
1900 "musl/src/stdlib/wcstod.c",1900 "musl/src/stdlib/wcstod.c",
1901 "musl/src/stdlib/wcstol.c",1901 "musl/src/stdlib/wcstol.c",
1902 "musl/src/string/aarch64/memcpy.S",
1903 "musl/src/string/aarch64/memset.S",1902 "musl/src/string/aarch64/memset.S",
1904 "musl/src/string/arm/__aeabi_memcpy.s",
1905 "musl/src/string/arm/__aeabi_memset.s",1903 "musl/src/string/arm/__aeabi_memset.s",
1906 "musl/src/string/arm/memcpy.S",
1907 "musl/src/string/bcmp.c",1904 "musl/src/string/bcmp.c",
1908 "musl/src/string/bcopy.c",1905 "musl/src/string/bcopy.c",
1909 "musl/src/string/bzero.c",1906 "musl/src/string/bzero.c",
1910 "musl/src/string/explicit_bzero.c",1907 "musl/src/string/explicit_bzero.c",
1911 "musl/src/string/i386/memcpy.s",
1912 "musl/src/string/i386/memmove.s",
1913 "musl/src/string/i386/memset.s",1908 "musl/src/string/i386/memset.s",
1914 "musl/src/string/index.c",1909 "musl/src/string/index.c",
1915 "musl/src/string/memccpy.c",1910 "musl/src/string/memccpy.c",
1916 "musl/src/string/memchr.c",1911 "musl/src/string/memchr.c",
1917 "musl/src/string/memcmp.c",1912 "musl/src/string/memcmp.c",
1918 "musl/src/string/memcpy.c",
1919 "musl/src/string/memmem.c",1913 "musl/src/string/memmem.c",
1920 "musl/src/string/memmove.c",
1921 "musl/src/string/mempcpy.c",1914 "musl/src/string/mempcpy.c",
1922 "musl/src/string/memrchr.c",1915 "musl/src/string/memrchr.c",
1923 "musl/src/string/memset.c",1916 "musl/src/string/memset.c",
...@@ -1981,8 +1974,6 @@ const src_files = [_][]const u8{...@@ -1981,8 +1974,6 @@ const src_files = [_][]const u8{
1981 "musl/src/string/wmemcpy.c",1974 "musl/src/string/wmemcpy.c",
1982 "musl/src/string/wmemmove.c",1975 "musl/src/string/wmemmove.c",
1983 "musl/src/string/wmemset.c",1976 "musl/src/string/wmemset.c",
1984 "musl/src/string/x86_64/memcpy.s",
1985 "musl/src/string/x86_64/memmove.s",
1986 "musl/src/string/x86_64/memset.s",1977 "musl/src/string/x86_64/memset.s",
1987 "musl/src/temp/mkdtemp.c",1978 "musl/src/temp/mkdtemp.c",
1988 "musl/src/temp/mkostemp.c",1979 "musl/src/temp/mkostemp.c",
src/wasi_libc.zig-2
...@@ -694,9 +694,7 @@ const libc_top_half_src_files = [_][]const u8{...@@ -694,9 +694,7 @@ const libc_top_half_src_files = [_][]const u8{
694 "wasi/libc-top-half/musl/src/string/memccpy.c",694 "wasi/libc-top-half/musl/src/string/memccpy.c",
695 "wasi/libc-top-half/musl/src/string/memchr.c",695 "wasi/libc-top-half/musl/src/string/memchr.c",
696 "wasi/libc-top-half/musl/src/string/memcmp.c",696 "wasi/libc-top-half/musl/src/string/memcmp.c",
697 "wasi/libc-top-half/musl/src/string/memcpy.c",
698 "wasi/libc-top-half/musl/src/string/memmem.c",697 "wasi/libc-top-half/musl/src/string/memmem.c",
699 "wasi/libc-top-half/musl/src/string/memmove.c",
700 "wasi/libc-top-half/musl/src/string/mempcpy.c",698 "wasi/libc-top-half/musl/src/string/mempcpy.c",
701 "wasi/libc-top-half/musl/src/string/memrchr.c",699 "wasi/libc-top-half/musl/src/string/memrchr.c",
702 "wasi/libc-top-half/musl/src/string/memset.c",700 "wasi/libc-top-half/musl/src/string/memset.c",