| ... | @@ -471,6 +471,7 @@ pub const Instruction = union(enum) { | ... | @@ -471,6 +471,7 @@ pub const Instruction = union(enum) { |
| 471 | // TODO: Need to define an enum for `cond` values | 471 | // TODO: Need to define an enum for `cond` values |
| 472 | // This is kinda challenging since the cond values have different meanings | 472 | // This is kinda challenging since the cond values have different meanings |
| 473 | // depending on whether it's operating on integer or FP CCR. | 473 | // depending on whether it's operating on integer or FP CCR. |
| | 474 | pub const Condition = u4; |
| 474 | | 475 | |
| 475 | pub fn toU32(self: Instruction) u32 { | 476 | pub fn toU32(self: Instruction) u32 { |
| 476 | return @bitCast(u32, self); | 477 | return @bitCast(u32, self); |
| ... | @@ -556,4 +557,109 @@ pub const Instruction = union(enum) { | ... | @@ -556,4 +557,109 @@ pub const Instruction = union(enum) { |
| 556 | }, | 557 | }, |
| 557 | }; | 558 | }; |
| 558 | } | 559 | } |
| | 560 | |
| | 561 | fn format4a(rd: Register, op3: u6, rs1: Register, cc: CCR, rs2: Register) Instruction { |
| | 562 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| | 563 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| | 564 | return Instruction{ |
| | 565 | .format4a = .{ |
| | 566 | .rd = rd.enc(), |
| | 567 | .op3 = op3, |
| | 568 | .rs1 = rs1.enc(), |
| | 569 | .cc1 = ccr_cc1, |
| | 570 | .cc0 = ccr_cc0, |
| | 571 | .rs2 = rs2.enc(), |
| | 572 | }, |
| | 573 | }; |
| | 574 | } |
| | 575 | |
| | 576 | fn format4b(rd: Register, op3: u6, rs1: Register, cc: CCR, simm11: u11) Instruction { |
| | 577 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| | 578 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| | 579 | return Instruction{ |
| | 580 | .format4b = .{ |
| | 581 | .rd = rd.enc(), |
| | 582 | .op3 = op3, |
| | 583 | .rs1 = rs1.enc(), |
| | 584 | .cc1 = ccr_cc1, |
| | 585 | .cc0 = ccr_cc0, |
| | 586 | .simm11 = simm11, |
| | 587 | }, |
| | 588 | }; |
| | 589 | } |
| | 590 | |
| | 591 | fn format4c(rd: Register, op3: u6, cc: CCR, cond: Condition, rs2: Register) Instruction { |
| | 592 | const ccr_cc2 = @truncate(u1, @enumToInt(cc) >> 2); |
| | 593 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| | 594 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| | 595 | return Instruction{ |
| | 596 | .format4c = .{ |
| | 597 | .rd = rd.enc(), |
| | 598 | .op3 = op3, |
| | 599 | .cc2 = ccr_cc2, |
| | 600 | .cond = cond, |
| | 601 | .cc1 = ccr_cc1, |
| | 602 | .cc0 = ccr_cc0, |
| | 603 | .rs2 = rs2.enc(), |
| | 604 | }, |
| | 605 | }; |
| | 606 | } |
| | 607 | |
| | 608 | fn format4d(rd: Register, op3: u6, cc: CCR, cond: Condition, simm11: u11) Instruction { |
| | 609 | const ccr_cc2 = @truncate(u1, @enumToInt(cc) >> 2); |
| | 610 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| | 611 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| | 612 | return Instruction{ |
| | 613 | .format4d = .{ |
| | 614 | .rd = rd.enc(), |
| | 615 | .op3 = op3, |
| | 616 | .cc2 = ccr_cc2, |
| | 617 | .cond = cond, |
| | 618 | .cc1 = ccr_cc1, |
| | 619 | .cc0 = ccr_cc0, |
| | 620 | .simm11 = simm11, |
| | 621 | }, |
| | 622 | }; |
| | 623 | } |
| | 624 | |
| | 625 | fn format4e(rd: Register, op3: u6, rs1: Register, cc: CCR, sw_trap: u7) Instruction { |
| | 626 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| | 627 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| | 628 | return Instruction{ |
| | 629 | .format4e = .{ |
| | 630 | .rd = rd.enc(), |
| | 631 | .op3 = op3, |
| | 632 | .rs1 = rs1.enc(), |
| | 633 | .cc1 = ccr_cc1, |
| | 634 | .cc0 = ccr_cc0, |
| | 635 | .sw_trap = sw_trap, |
| | 636 | }, |
| | 637 | }; |
| | 638 | } |
| | 639 | |
| | 640 | fn format4f(rd: Register, op3: u6, rs1: Register, rcond: RCondition, opf_low: u5, rs2: Register) Instruction { |
| | 641 | return Instruction{ |
| | 642 | .format4f = .{ |
| | 643 | .rd = rd.enc(), |
| | 644 | .op3 = op3, |
| | 645 | .rs1 = rs1.enc(), |
| | 646 | .rcond = @enumToInt(rcond), |
| | 647 | .opf_low = opf_low, |
| | 648 | .rs2 = rs2.enc(), |
| | 649 | }, |
| | 650 | }; |
| | 651 | } |
| | 652 | |
| | 653 | fn format4g(rd: Register, op3: u6, cond: Condition, opf_cc: u3, opf_low: u6, rs2: Register) Instruction { |
| | 654 | return Instruction{ |
| | 655 | .format4g = .{ |
| | 656 | .rd = rd.enc(), |
| | 657 | .op3 = op3, |
| | 658 | .cond = cond, |
| | 659 | .opf_cc = opf_cc, |
| | 660 | .opf_low = opf_low, |
| | 661 | .rs2 = rs2.enc(), |
| | 662 | }, |
| | 663 | }; |
| | 664 | } |
| 559 | }; | 665 | }; |