| author | |
| committer | |
| log | f654e16d06460a5f44fd8089538a41fc1936ea0b |
| tree | a109a6072c72dcfc0fdbd806573bd223d4d49842 |
| parent | cdcb34cdf42fa3eb7a399106ccd57efc87643032 |
1 files changed, 3 insertions(+), 1 deletions(-)
lib/std/simd.zig+3-1| ... | ... | @@ -23,7 +23,9 @@ pub fn suggestVectorSizeForCpu(comptime T: type, cpu: std.Target.Cpu) ?usize { |
| 23 | 23 | const element_bit_size = std.math.max(8, std.math.ceilPowerOfTwo(T, @bitSizeOf(T))); |
| 24 | 24 | return @divExact(vector_bit_size, element_bit_size); |
| 25 | 25 | }, |
| 26 | else => @compileError("No vector sizes for this CPU architecture have yet been recommended"), | |
| 26 | else => { | |
| 27 | return null; | |
| 28 | }, | |
| 27 | 29 | } |
| 28 | 30 | } |
| 29 | 31 |