| ... | @@ -1407,28 +1407,6 @@ test "store vector with memset" { | ... | @@ -1407,28 +1407,6 @@ test "store vector with memset" { |
| 1407 | if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO | 1407 | if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO |
| 1408 | if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; | 1408 | if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; |
| 1409 | | 1409 | |
| 1410 | if (builtin.zig_backend == .stage2_llvm) { | | |
| 1411 | // LLVM 16 ERROR: "Converting bits to bytes lost precision" | | |
| 1412 | // https://github.com/ziglang/zig/issues/16177 | | |
| 1413 | switch (builtin.target.cpu.arch) { | | |
| 1414 | .arm, | | |
| 1415 | .armeb, | | |
| 1416 | .thumb, | | |
| 1417 | .thumbeb, | | |
| 1418 | => if (builtin.target.floatAbi() == .soft) return error.SkipZigTest, | | |
| 1419 | .wasm32, | | |
| 1420 | .mips, | | |
| 1421 | .mipsel, | | |
| 1422 | .mips64, | | |
| 1423 | .mips64el, | | |
| 1424 | .riscv64, | | |
| 1425 | .powerpc, | | |
| 1426 | .powerpc64, | | |
| 1427 | => return error.SkipZigTest, | | |
| 1428 | else => {}, | | |
| 1429 | } | | |
| 1430 | } | | |
| 1431 | | | |
| 1432 | var a: [5]@Vector(2, i1) = undefined; | 1410 | var a: [5]@Vector(2, i1) = undefined; |
| 1433 | var b: [5]@Vector(2, u2) = undefined; | 1411 | var b: [5]@Vector(2, u2) = undefined; |
| 1434 | var c: [5]@Vector(2, i4) = undefined; | 1412 | var c: [5]@Vector(2, i4) = undefined; |