| ... | @@ -417,7 +417,7 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { | ... | @@ -417,7 +417,7 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { |
| 417 | const rules = try context.computeRules(gpa, dwarf, unwind.vmaddr_slide, encoding.value.arm64.dwarf); | 417 | const rules = try context.computeRules(gpa, dwarf, unwind.vmaddr_slide, encoding.value.arm64.dwarf); |
| 418 | return context.next(gpa, &rules); | 418 | return context.next(gpa, &rules); |
| 419 | }, | 419 | }, |
| 420 | .FRAME => ip: { | 420 | .FRAME, .FRAME_PAUTH_LR => ip: { |
| 421 | const frame = encoding.value.arm64.frame; | 421 | const frame = encoding.value.arm64.frame; |
| 422 | | 422 | |
| 423 | const fp = (try dwarfRegNative(&context.cpu_state, fp_reg_num)).*; | 423 | const fp = (try dwarfRegNative(&context.cpu_state, fp_reg_num)).*; |
| ... | @@ -426,10 +426,10 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { | ... | @@ -426,10 +426,10 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { |
| 426 | var reg_addr = fp - @sizeOf(usize); | 426 | var reg_addr = fp - @sizeOf(usize); |
| 427 | inline for (@typeInfo(@TypeOf(frame.x_reg_pairs)).@"struct".field_names, 0..) |field_name, i| { | 427 | inline for (@typeInfo(@TypeOf(frame.x_reg_pairs)).@"struct".field_names, 0..) |field_name, i| { |
| 428 | if (@field(frame.x_reg_pairs, field_name) != 0) { | 428 | if (@field(frame.x_reg_pairs, field_name) != 0) { |
| 429 | (try dwarfRegNative(&context.cpu_state, 19 + i)).* = @as(*const usize, @ptrFromInt(reg_addr)).*; | 429 | (try dwarfRegNative(&context.cpu_state, 19 + i * 2)).* = @as(*const usize, @ptrFromInt(reg_addr)).*; |
| 430 | reg_addr += @sizeOf(usize); | 430 | reg_addr -= @sizeOf(usize); |
| 431 | (try dwarfRegNative(&context.cpu_state, 20 + i)).* = @as(*const usize, @ptrFromInt(reg_addr)).*; | 431 | (try dwarfRegNative(&context.cpu_state, 20 + i * 2)).* = @as(*const usize, @ptrFromInt(reg_addr)).*; |
| 432 | reg_addr += @sizeOf(usize); | 432 | reg_addr -= @sizeOf(usize); |
| 433 | } | 433 | } |
| 434 | } | 434 | } |
| 435 | | 435 | |
| ... | @@ -437,7 +437,7 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { | ... | @@ -437,7 +437,7 @@ fn unwindFrameInner(si: *SelfInfo, io: Io, context: *UnwindContext) !usize { |
| 437 | // vector registers in the AArch64 `cpu_context` anyway, so there's no reason to | 437 | // vector registers in the AArch64 `cpu_context` anyway, so there's no reason to |
| 438 | // fail a legitimate unwind just because we're asked to restore the registers here. | 438 | // fail a legitimate unwind just because we're asked to restore the registers here. |
| 439 | // If some weird/broken unwind info tells us to read them later, we will fail then. | 439 | // If some weird/broken unwind info tells us to read them later, we will fail then. |
| 440 | reg_addr += 16 * @as(usize, @popCount(@as(u4, @bitCast(frame.d_reg_pairs)))); | 440 | reg_addr -= 16 * @as(usize, @popCount(@as(u4, @bitCast(frame.d_reg_pairs)))); |
| 441 | | 441 | |
| 442 | const new_ip = @as(*const usize, @ptrFromInt(ip_ptr)).*; | 442 | const new_ip = @as(*const usize, @ptrFromInt(ip_ptr)).*; |
| 443 | const new_fp = @as(*const usize, @ptrFromInt(fp)).*; | 443 | const new_fp = @as(*const usize, @ptrFromInt(fp)).*; |