| author | |
| committer | |
| log | f96321be90394c47225c41c8b760fb403be09e88 |
| tree | b8805fbce5e95d471cbb369a881d2e191532e733 |
| parent | a51e88c3b108acfa1ea1823ed31d78870e662fc0 |
| signature |
Targeting v9 on sparc32 doesn't by itself imply "v8+" mode (64-bit instructions
in 32-bit code).1 files changed, 1 insertions(+), 1 deletions(-)
lib/std/zig/system.zig+1-1| ... | ... | @@ -109,7 +109,7 @@ pub fn getExternalExecutor( |
| 109 | 109 | .riscv64 => Executor{ .qemu = "qemu-riscv64" }, |
| 110 | 110 | .s390x => Executor{ .qemu = "qemu-s390x" }, |
| 111 | 111 | .sparc => Executor{ |
| 112 | .qemu = if (candidate.cpu.has(.sparc, .v9)) | |
| 112 | .qemu = if (candidate.cpu.has(.sparc, .v8plus)) | |
| 113 | 113 | "qemu-sparc32plus" |
| 114 | 114 | else |
| 115 | 115 | "qemu-sparc", |