| 1 | /* ===-------- ia32intrin.h ---------------------------------------------------=== |
| 2 | * |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | * See https://llvm.org/LICENSE.txt for license information. |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | * |
| 7 | *===-----------------------------------------------------------------------=== |
| 8 | */ |
| 9 | |
| 10 | #ifndef __X86INTRIN_H |
| 11 | #error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead." |
| 12 | #endif |
| 13 | |
| 14 | #ifndef __IA32INTRIN_H |
| 15 | #define __IA32INTRIN_H |
| 16 | |
| 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) |
| 19 | #define __DEFAULT_FN_ATTRS_CRC32 __attribute__((__always_inline__, __nodebug__, __target__("crc32"))) |
| 20 | |
| 21 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 22 | #define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__)) constexpr |
| 23 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| 24 | #else |
| 25 | #define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__)) |
| 26 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS |
| 27 | #endif |
| 28 | |
| 29 | /// Finds the first set bit starting from the least significant bit. The result |
| 30 | /// is undefined if the input is 0. |
| 31 | /// |
| 32 | /// \headerfile <x86intrin.h> |
| 33 | /// |
| 34 | /// This intrinsic corresponds to the \c BSF instruction or the |
| 35 | /// \c TZCNT instruction. |
| 36 | /// |
| 37 | /// \param __A |
| 38 | /// A 32-bit integer operand. |
| 39 | /// \returns A 32-bit integer containing the bit number. |
| 40 | /// \see _bit_scan_forward |
| 41 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 42 | __bsfd(int __A) { |
| 43 | return __builtin_ctz((unsigned int)__A); |
| 44 | } |
| 45 | |
| 46 | /// Finds the first set bit starting from the most significant bit. The result |
| 47 | /// is undefined if the input is 0. |
| 48 | /// |
| 49 | /// \headerfile <x86intrin.h> |
| 50 | /// |
| 51 | /// This intrinsic corresponds to the \c BSR instruction or the |
| 52 | /// \c LZCNT instruction and an \c XOR. |
| 53 | /// |
| 54 | /// \param __A |
| 55 | /// A 32-bit integer operand. |
| 56 | /// \returns A 32-bit integer containing the bit number. |
| 57 | /// \see _bit_scan_reverse |
| 58 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 59 | __bsrd(int __A) { |
| 60 | return 31 - __builtin_clz((unsigned int)__A); |
| 61 | } |
| 62 | |
| 63 | /// Swaps the bytes in the input, converting little endian to big endian or |
| 64 | /// vice versa. |
| 65 | /// |
| 66 | /// \headerfile <x86intrin.h> |
| 67 | /// |
| 68 | /// This intrinsic corresponds to the \c BSWAP instruction. |
| 69 | /// |
| 70 | /// \param __A |
| 71 | /// A 32-bit integer operand. |
| 72 | /// \returns A 32-bit integer containing the swapped bytes. |
| 73 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 74 | __bswapd(int __A) { |
| 75 | return (int)__builtin_bswap32((unsigned int)__A); |
| 76 | } |
| 77 | |
| 78 | /// Swaps the bytes in the input, converting little endian to big endian or |
| 79 | /// vice versa. |
| 80 | /// |
| 81 | /// \headerfile <x86intrin.h> |
| 82 | /// |
| 83 | /// This intrinsic corresponds to the \c BSWAP instruction. |
| 84 | /// |
| 85 | /// \param __A |
| 86 | /// A 32-bit integer operand. |
| 87 | /// \returns A 32-bit integer containing the swapped bytes. |
| 88 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 89 | _bswap(int __A) { |
| 90 | return (int)__builtin_bswap32((unsigned int)__A); |
| 91 | } |
| 92 | |
| 93 | /// Finds the first set bit starting from the least significant bit. The result |
| 94 | /// is undefined if the input is 0. |
| 95 | /// |
| 96 | /// \headerfile <x86intrin.h> |
| 97 | /// |
| 98 | /// \code |
| 99 | /// int _bit_scan_forward(int A); |
| 100 | /// \endcode |
| 101 | /// |
| 102 | /// This intrinsic corresponds to the \c BSF instruction or the |
| 103 | /// \c TZCNT instruction. |
| 104 | /// |
| 105 | /// \param A |
| 106 | /// A 32-bit integer operand. |
| 107 | /// \returns A 32-bit integer containing the bit number. |
| 108 | /// \see __bsfd |
| 109 | #define _bit_scan_forward(A) __bsfd((A)) |
| 110 | |
| 111 | /// Finds the first set bit starting from the most significant bit. The result |
| 112 | /// is undefined if the input is 0. |
| 113 | /// |
| 114 | /// \headerfile <x86intrin.h> |
| 115 | /// |
| 116 | /// \code |
| 117 | /// int _bit_scan_reverse(int A); |
| 118 | /// \endcode |
| 119 | /// |
| 120 | /// This intrinsic corresponds to the \c BSR instruction or the |
| 121 | /// \c LZCNT instruction and an \c XOR. |
| 122 | /// |
| 123 | /// \param A |
| 124 | /// A 32-bit integer operand. |
| 125 | /// \returns A 32-bit integer containing the bit number. |
| 126 | /// \see __bsrd |
| 127 | #define _bit_scan_reverse(A) __bsrd((A)) |
| 128 | |
| 129 | #ifdef __x86_64__ |
| 130 | /// Finds the first set bit starting from the least significant bit. The result |
| 131 | /// is undefined if the input is 0. |
| 132 | /// |
| 133 | /// \headerfile <x86intrin.h> |
| 134 | /// |
| 135 | /// This intrinsic corresponds to the \c BSF instruction or the |
| 136 | /// \c TZCNT instruction. |
| 137 | /// |
| 138 | /// \param __A |
| 139 | /// A 64-bit integer operand. |
| 140 | /// \returns A 32-bit integer containing the bit number. |
| 141 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 142 | __bsfq(long long __A) { |
| 143 | return (long long)__builtin_ctzll((unsigned long long)__A); |
| 144 | } |
| 145 | |
| 146 | /// Finds the first set bit starting from the most significant bit. The result |
| 147 | /// is undefined if input is 0. |
| 148 | /// |
| 149 | /// \headerfile <x86intrin.h> |
| 150 | /// |
| 151 | /// This intrinsic corresponds to the \c BSR instruction or the |
| 152 | /// \c LZCNT instruction and an \c XOR. |
| 153 | /// |
| 154 | /// \param __A |
| 155 | /// A 64-bit integer operand. |
| 156 | /// \returns A 32-bit integer containing the bit number. |
| 157 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 158 | __bsrq(long long __A) { |
| 159 | return 63 - __builtin_clzll((unsigned long long)__A); |
| 160 | } |
| 161 | |
| 162 | /// Swaps the bytes in the input, converting little endian to big endian or |
| 163 | /// vice versa. |
| 164 | /// |
| 165 | /// \headerfile <x86intrin.h> |
| 166 | /// |
| 167 | /// This intrinsic corresponds to the \c BSWAP instruction. |
| 168 | /// |
| 169 | /// \param __A |
| 170 | /// A 64-bit integer operand. |
| 171 | /// \returns A 64-bit integer containing the swapped bytes. |
| 172 | /// \see _bswap64 |
| 173 | static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR |
| 174 | __bswapq(long long __A) { |
| 175 | return (long long)__builtin_bswap64((unsigned long long)__A); |
| 176 | } |
| 177 | |
| 178 | /// Swaps the bytes in the input, converting little endian to big endian or |
| 179 | /// vice versa. |
| 180 | /// |
| 181 | /// \headerfile <x86intrin.h> |
| 182 | /// |
| 183 | /// \code |
| 184 | /// long long _bswap64(long long A); |
| 185 | /// \endcode |
| 186 | /// |
| 187 | /// This intrinsic corresponds to the \c BSWAP instruction. |
| 188 | /// |
| 189 | /// \param A |
| 190 | /// A 64-bit integer operand. |
| 191 | /// \returns A 64-bit integer containing the swapped bytes. |
| 192 | /// \see __bswapq |
| 193 | #define _bswap64(A) __bswapq((A)) |
| 194 | #endif /* __x86_64__ */ |
| 195 | |
| 196 | /// Counts the number of bits in the source operand having a value of 1. |
| 197 | /// |
| 198 | /// \headerfile <x86intrin.h> |
| 199 | /// |
| 200 | /// This intrinsic corresponds to the \c POPCNT instruction or a |
| 201 | /// sequence of arithmetic and logic operations to calculate it. |
| 202 | /// |
| 203 | /// \param __A |
| 204 | /// An unsigned 32-bit integer operand. |
| 205 | /// \returns A 32-bit integer containing the number of bits with value 1 in the |
| 206 | /// source operand. |
| 207 | /// \see _popcnt32 |
| 208 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 209 | __popcntd(unsigned int __A) |
| 210 | { |
| 211 | return __builtin_popcount(__A); |
| 212 | } |
| 213 | |
| 214 | /// Counts the number of bits in the source operand having a value of 1. |
| 215 | /// |
| 216 | /// \headerfile <x86intrin.h> |
| 217 | /// |
| 218 | /// \code |
| 219 | /// int _popcnt32(int A); |
| 220 | /// \endcode |
| 221 | /// |
| 222 | /// This intrinsic corresponds to the \c POPCNT instruction or a |
| 223 | /// sequence of arithmetic and logic operations to calculate it. |
| 224 | /// |
| 225 | /// \param A |
| 226 | /// An unsigned 32-bit integer operand. |
| 227 | /// \returns A 32-bit integer containing the number of bits with value 1 in the |
| 228 | /// source operand. |
| 229 | /// \see __popcntd |
| 230 | #define _popcnt32(A) __popcntd((A)) |
| 231 | |
| 232 | #ifdef __x86_64__ |
| 233 | /// Counts the number of bits in the source operand having a value of 1. |
| 234 | /// |
| 235 | /// \headerfile <x86intrin.h> |
| 236 | /// |
| 237 | /// This intrinsic corresponds to the \c POPCNT instruction or a |
| 238 | /// sequence of arithmetic and logic operations to calculate it. |
| 239 | /// |
| 240 | /// \param __A |
| 241 | /// An unsigned 64-bit integer operand. |
| 242 | /// \returns A 64-bit integer containing the number of bits with value 1 in the |
| 243 | /// source operand. |
| 244 | /// \see _popcnt64 |
| 245 | static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR |
| 246 | __popcntq(unsigned long long __A) |
| 247 | { |
| 248 | return __builtin_popcountll(__A); |
| 249 | } |
| 250 | |
| 251 | /// Counts the number of bits in the source operand having a value of 1. |
| 252 | /// |
| 253 | /// \headerfile <x86intrin.h> |
| 254 | /// |
| 255 | /// \code |
| 256 | /// long long _popcnt64(unsigned long long A); |
| 257 | /// \endcode |
| 258 | /// |
| 259 | /// This intrinsic corresponds to the \c POPCNT instruction or a |
| 260 | /// sequence of arithmetic and logic operations to calculate it. |
| 261 | /// |
| 262 | /// \param A |
| 263 | /// An unsigned 64-bit integer operand. |
| 264 | /// \returns A 64-bit integer containing the number of bits with value 1 in the |
| 265 | /// source operand. |
| 266 | /// \see __popcntq |
| 267 | #define _popcnt64(A) __popcntq((A)) |
| 268 | #endif /* __x86_64__ */ |
| 269 | |
| 270 | #ifdef __x86_64__ |
| 271 | /// Returns the program status-and-control \c RFLAGS register with the \c VM |
| 272 | /// and \c RF flags cleared. |
| 273 | /// |
| 274 | /// \headerfile <x86intrin.h> |
| 275 | /// |
| 276 | /// This intrinsic corresponds to the \c PUSHFQ + \c POP instruction sequence. |
| 277 | /// |
| 278 | /// \returns The 64-bit value of the RFLAGS register. |
| 279 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS |
| 280 | __readeflags(void) |
| 281 | { |
| 282 | return __builtin_ia32_readeflags_u64(); |
| 283 | } |
| 284 | |
| 285 | /// Writes the specified value to the program status-and-control \c RFLAGS |
| 286 | /// register. Reserved bits are not affected. |
| 287 | /// |
| 288 | /// \headerfile <x86intrin.h> |
| 289 | /// |
| 290 | /// This intrinsic corresponds to the \c PUSH + \c POPFQ instruction sequence. |
| 291 | /// |
| 292 | /// \param __f |
| 293 | /// The 64-bit value to write to \c RFLAGS. |
| 294 | static __inline__ void __DEFAULT_FN_ATTRS |
| 295 | __writeeflags(unsigned long long __f) |
| 296 | { |
| 297 | __builtin_ia32_writeeflags_u64(__f); |
| 298 | } |
| 299 | |
| 300 | #else /* !__x86_64__ */ |
| 301 | /// Returns the program status-and-control \c EFLAGS register with the \c VM |
| 302 | /// and \c RF flags cleared. |
| 303 | /// |
| 304 | /// \headerfile <x86intrin.h> |
| 305 | /// |
| 306 | /// This intrinsic corresponds to the \c PUSHFD + \c POP instruction sequence. |
| 307 | /// |
| 308 | /// \returns The 32-bit value of the EFLAGS register. |
| 309 | static __inline__ unsigned int __DEFAULT_FN_ATTRS |
| 310 | __readeflags(void) |
| 311 | { |
| 312 | return __builtin_ia32_readeflags_u32(); |
| 313 | } |
| 314 | |
| 315 | /// Writes the specified value to the program status-and-control \c EFLAGS |
| 316 | /// register. Reserved bits are not affected. |
| 317 | /// |
| 318 | /// \headerfile <x86intrin.h> |
| 319 | /// |
| 320 | /// This intrinsic corresponds to the \c PUSH + \c POPFD instruction sequence. |
| 321 | /// |
| 322 | /// \param __f |
| 323 | /// The 32-bit value to write to \c EFLAGS. |
| 324 | static __inline__ void __DEFAULT_FN_ATTRS |
| 325 | __writeeflags(unsigned int __f) |
| 326 | { |
| 327 | __builtin_ia32_writeeflags_u32(__f); |
| 328 | } |
| 329 | #endif /* !__x86_64__ */ |
| 330 | |
| 331 | /// Casts a 32-bit float value to a 32-bit unsigned integer value. |
| 332 | /// |
| 333 | /// \headerfile <x86intrin.h> |
| 334 | /// |
| 335 | /// This intrinsic corresponds to the \c VMOVD / \c MOVD instruction in x86_64, |
| 336 | /// and corresponds to the \c VMOVL / \c MOVL instruction in ia32. |
| 337 | /// |
| 338 | /// \param __A |
| 339 | /// A 32-bit float value. |
| 340 | /// \returns A 32-bit unsigned integer containing the converted value. |
| 341 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CAST |
| 342 | _castf32_u32(float __A) { |
| 343 | return __builtin_bit_cast(unsigned int, __A); |
| 344 | } |
| 345 | |
| 346 | /// Casts a 64-bit float value to a 64-bit unsigned integer value. |
| 347 | /// |
| 348 | /// \headerfile <x86intrin.h> |
| 349 | /// |
| 350 | /// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, |
| 351 | /// and corresponds to the \c VMOVL / \c MOVL instruction in ia32. |
| 352 | /// |
| 353 | /// \param __A |
| 354 | /// A 64-bit float value. |
| 355 | /// \returns A 64-bit unsigned integer containing the converted value. |
| 356 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CAST |
| 357 | _castf64_u64(double __A) { |
| 358 | return __builtin_bit_cast(unsigned long long, __A); |
| 359 | } |
| 360 | |
| 361 | /// Casts a 32-bit unsigned integer value to a 32-bit float value. |
| 362 | /// |
| 363 | /// \headerfile <x86intrin.h> |
| 364 | /// |
| 365 | /// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, |
| 366 | /// and corresponds to the \c FLDS instruction in ia32. |
| 367 | /// |
| 368 | /// \param __A |
| 369 | /// A 32-bit unsigned integer value. |
| 370 | /// \returns A 32-bit float value containing the converted value. |
| 371 | static __inline__ float __DEFAULT_FN_ATTRS_CAST |
| 372 | _castu32_f32(unsigned int __A) { |
| 373 | return __builtin_bit_cast(float, __A); |
| 374 | } |
| 375 | |
| 376 | /// Casts a 64-bit unsigned integer value to a 64-bit float value. |
| 377 | /// |
| 378 | /// \headerfile <x86intrin.h> |
| 379 | /// |
| 380 | /// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, |
| 381 | /// and corresponds to the \c FLDL instruction in ia32. |
| 382 | /// |
| 383 | /// \param __A |
| 384 | /// A 64-bit unsigned integer value. |
| 385 | /// \returns A 64-bit float value containing the converted value. |
| 386 | static __inline__ double __DEFAULT_FN_ATTRS_CAST |
| 387 | _castu64_f64(unsigned long long __A) { |
| 388 | return __builtin_bit_cast(double, __A); |
| 389 | } |
| 390 | |
| 391 | /// Adds the unsigned integer operand to the CRC-32C checksum of the |
| 392 | /// unsigned char operand. |
| 393 | /// |
| 394 | /// \headerfile <x86intrin.h> |
| 395 | /// |
| 396 | /// This intrinsic corresponds to the \c CRC32B instruction. |
| 397 | /// |
| 398 | /// \param __C |
| 399 | /// An unsigned integer operand to add to the CRC-32C checksum of operand |
| 400 | /// \a __D. |
| 401 | /// \param __D |
| 402 | /// An unsigned 8-bit integer operand used to compute the CRC-32C checksum. |
| 403 | /// \returns The result of adding operand \a __C to the CRC-32C checksum of |
| 404 | /// operand \a __D. |
| 405 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 |
| 406 | __crc32b(unsigned int __C, unsigned char __D) |
| 407 | { |
| 408 | return __builtin_ia32_crc32qi(__C, __D); |
| 409 | } |
| 410 | |
| 411 | /// Adds the unsigned integer operand to the CRC-32C checksum of the |
| 412 | /// unsigned short operand. |
| 413 | /// |
| 414 | /// \headerfile <x86intrin.h> |
| 415 | /// |
| 416 | /// This intrinsic corresponds to the \c CRC32W instruction. |
| 417 | /// |
| 418 | /// \param __C |
| 419 | /// An unsigned integer operand to add to the CRC-32C checksum of operand |
| 420 | /// \a __D. |
| 421 | /// \param __D |
| 422 | /// An unsigned 16-bit integer operand used to compute the CRC-32C checksum. |
| 423 | /// \returns The result of adding operand \a __C to the CRC-32C checksum of |
| 424 | /// operand \a __D. |
| 425 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 |
| 426 | __crc32w(unsigned int __C, unsigned short __D) |
| 427 | { |
| 428 | return __builtin_ia32_crc32hi(__C, __D); |
| 429 | } |
| 430 | |
| 431 | /// Adds the unsigned integer operand to the CRC-32C checksum of the |
| 432 | /// second unsigned integer operand. |
| 433 | /// |
| 434 | /// \headerfile <x86intrin.h> |
| 435 | /// |
| 436 | /// This intrinsic corresponds to the \c CRC32D instruction. |
| 437 | /// |
| 438 | /// \param __C |
| 439 | /// An unsigned integer operand to add to the CRC-32C checksum of operand |
| 440 | /// \a __D. |
| 441 | /// \param __D |
| 442 | /// An unsigned 32-bit integer operand used to compute the CRC-32C checksum. |
| 443 | /// \returns The result of adding operand \a __C to the CRC-32C checksum of |
| 444 | /// operand \a __D. |
| 445 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 |
| 446 | __crc32d(unsigned int __C, unsigned int __D) |
| 447 | { |
| 448 | return __builtin_ia32_crc32si(__C, __D); |
| 449 | } |
| 450 | |
| 451 | #ifdef __x86_64__ |
| 452 | /// Adds the unsigned integer operand to the CRC-32C checksum of the |
| 453 | /// unsigned 64-bit integer operand. |
| 454 | /// |
| 455 | /// \headerfile <x86intrin.h> |
| 456 | /// |
| 457 | /// This intrinsic corresponds to the \c CRC32Q instruction. |
| 458 | /// |
| 459 | /// \param __C |
| 460 | /// An unsigned integer operand to add to the CRC-32C checksum of operand |
| 461 | /// \a __D. |
| 462 | /// \param __D |
| 463 | /// An unsigned 64-bit integer operand used to compute the CRC-32C checksum. |
| 464 | /// \returns The result of adding operand \a __C to the CRC-32C checksum of |
| 465 | /// operand \a __D. |
| 466 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CRC32 |
| 467 | __crc32q(unsigned long long __C, unsigned long long __D) |
| 468 | { |
| 469 | return __builtin_ia32_crc32di(__C, __D); |
| 470 | } |
| 471 | #endif /* __x86_64__ */ |
| 472 | |
| 473 | /// Reads the specified performance-monitoring counter. Refer to your |
| 474 | /// processor's documentation to determine which performance counters are |
| 475 | /// supported. |
| 476 | /// |
| 477 | /// \headerfile <x86intrin.h> |
| 478 | /// |
| 479 | /// This intrinsic corresponds to the \c RDPMC instruction. |
| 480 | /// |
| 481 | /// \param __A |
| 482 | /// The performance counter to read. |
| 483 | /// \returns The 64-bit value read from the performance counter. |
| 484 | /// \see _rdpmc |
| 485 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS |
| 486 | __rdpmc(int __A) { |
| 487 | return __builtin_ia32_rdpmc(__A); |
| 488 | } |
| 489 | |
| 490 | /// Reads the processor's time-stamp counter and the \c IA32_TSC_AUX MSR |
| 491 | /// \c (0xc0000103). |
| 492 | /// |
| 493 | /// \headerfile <x86intrin.h> |
| 494 | /// |
| 495 | /// This intrinsic corresponds to the \c RDTSCP instruction. |
| 496 | /// |
| 497 | /// \param __A |
| 498 | /// The address of where to store the 32-bit \c IA32_TSC_AUX value. |
| 499 | /// \returns The 64-bit value of the time-stamp counter. |
| 500 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS |
| 501 | __rdtscp(unsigned int *__A) { |
| 502 | return __builtin_ia32_rdtscp(__A); |
| 503 | } |
| 504 | |
| 505 | /// Reads the processor's time-stamp counter. |
| 506 | /// |
| 507 | /// \headerfile <x86intrin.h> |
| 508 | /// |
| 509 | /// \code |
| 510 | /// unsigned long long _rdtsc(); |
| 511 | /// \endcode |
| 512 | /// |
| 513 | /// This intrinsic corresponds to the \c RDTSC instruction. |
| 514 | /// |
| 515 | /// \returns The 64-bit value of the time-stamp counter. |
| 516 | #define _rdtsc() __rdtsc() |
| 517 | |
| 518 | /// Reads the specified performance monitoring counter. Refer to your |
| 519 | /// processor's documentation to determine which performance counters are |
| 520 | /// supported. |
| 521 | /// |
| 522 | /// \headerfile <x86intrin.h> |
| 523 | /// |
| 524 | /// \code |
| 525 | /// unsigned long long _rdpmc(int A); |
| 526 | /// \endcode |
| 527 | /// |
| 528 | /// This intrinsic corresponds to the \c RDPMC instruction. |
| 529 | /// |
| 530 | /// \param A |
| 531 | /// The performance counter to read. |
| 532 | /// \returns The 64-bit value read from the performance counter. |
| 533 | /// \see __rdpmc |
| 534 | #define _rdpmc(A) __rdpmc(A) |
| 535 | |
| 536 | static __inline__ void __DEFAULT_FN_ATTRS |
| 537 | _wbinvd(void) { |
| 538 | __builtin_ia32_wbinvd(); |
| 539 | } |
| 540 | |
| 541 | /// Rotates an 8-bit value to the left by the specified number of bits. |
| 542 | /// This operation is undefined if the number of bits exceeds the size of |
| 543 | /// the value. |
| 544 | /// |
| 545 | /// \headerfile <x86intrin.h> |
| 546 | /// |
| 547 | /// This intrinsic corresponds to the \c ROL instruction. |
| 548 | /// |
| 549 | /// \param __X |
| 550 | /// The unsigned 8-bit value to be rotated. |
| 551 | /// \param __C |
| 552 | /// The number of bits to rotate the value. |
| 553 | /// \returns The rotated value. |
| 554 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR |
| 555 | __rolb(unsigned char __X, int __C) { |
| 556 | return __builtin_rotateleft8(__X, __C); |
| 557 | } |
| 558 | |
| 559 | /// Rotates an 8-bit value to the right by the specified number of bits. |
| 560 | /// This operation is undefined if the number of bits exceeds the size of |
| 561 | /// the value. |
| 562 | /// |
| 563 | /// \headerfile <x86intrin.h> |
| 564 | /// |
| 565 | /// This intrinsic corresponds to the \c ROR instruction. |
| 566 | /// |
| 567 | /// \param __X |
| 568 | /// The unsigned 8-bit value to be rotated. |
| 569 | /// \param __C |
| 570 | /// The number of bits to rotate the value. |
| 571 | /// \returns The rotated value. |
| 572 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR |
| 573 | __rorb(unsigned char __X, int __C) { |
| 574 | return __builtin_rotateright8(__X, __C); |
| 575 | } |
| 576 | |
| 577 | /// Rotates a 16-bit value to the left by the specified number of bits. |
| 578 | /// This operation is undefined if the number of bits exceeds the size of |
| 579 | /// the value. |
| 580 | /// |
| 581 | /// \headerfile <x86intrin.h> |
| 582 | /// |
| 583 | /// This intrinsic corresponds to the \c ROL instruction. |
| 584 | /// |
| 585 | /// \param __X |
| 586 | /// The unsigned 16-bit value to be rotated. |
| 587 | /// \param __C |
| 588 | /// The number of bits to rotate the value. |
| 589 | /// \returns The rotated value. |
| 590 | /// \see _rotwl |
| 591 | static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR |
| 592 | __rolw(unsigned short __X, int __C) { |
| 593 | return __builtin_rotateleft16(__X, __C); |
| 594 | } |
| 595 | |
| 596 | /// Rotates a 16-bit value to the right by the specified number of bits. |
| 597 | /// This operation is undefined if the number of bits exceeds the size of |
| 598 | /// the value. |
| 599 | /// |
| 600 | /// \headerfile <x86intrin.h> |
| 601 | /// |
| 602 | /// This intrinsic corresponds to the \c ROR instruction. |
| 603 | /// |
| 604 | /// \param __X |
| 605 | /// The unsigned 16-bit value to be rotated. |
| 606 | /// \param __C |
| 607 | /// The number of bits to rotate the value. |
| 608 | /// \returns The rotated value. |
| 609 | /// \see _rotwr |
| 610 | static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR |
| 611 | __rorw(unsigned short __X, int __C) { |
| 612 | return __builtin_rotateright16(__X, __C); |
| 613 | } |
| 614 | |
| 615 | /// Rotates a 32-bit value to the left by the specified number of bits. |
| 616 | /// This operation is undefined if the number of bits exceeds the size of |
| 617 | /// the value. |
| 618 | /// |
| 619 | /// \headerfile <x86intrin.h> |
| 620 | /// |
| 621 | /// This intrinsic corresponds to the \c ROL instruction. |
| 622 | /// |
| 623 | /// \param __X |
| 624 | /// The unsigned 32-bit value to be rotated. |
| 625 | /// \param __C |
| 626 | /// The number of bits to rotate the value. |
| 627 | /// \returns The rotated value. |
| 628 | /// \see _rotl |
| 629 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 630 | __rold(unsigned int __X, int __C) { |
| 631 | return __builtin_rotateleft32(__X, (unsigned int)__C); |
| 632 | } |
| 633 | |
| 634 | /// Rotates a 32-bit value to the right by the specified number of bits. |
| 635 | /// This operation is undefined if the number of bits exceeds the size of |
| 636 | /// the value. |
| 637 | /// |
| 638 | /// \headerfile <x86intrin.h> |
| 639 | /// |
| 640 | /// This intrinsic corresponds to the \c ROR instruction. |
| 641 | /// |
| 642 | /// \param __X |
| 643 | /// The unsigned 32-bit value to be rotated. |
| 644 | /// \param __C |
| 645 | /// The number of bits to rotate the value. |
| 646 | /// \returns The rotated value. |
| 647 | /// \see _rotr |
| 648 | static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR |
| 649 | __rord(unsigned int __X, int __C) { |
| 650 | return __builtin_rotateright32(__X, (unsigned int)__C); |
| 651 | } |
| 652 | |
| 653 | #ifdef __x86_64__ |
| 654 | /// Rotates a 64-bit value to the left by the specified number of bits. |
| 655 | /// This operation is undefined if the number of bits exceeds the size of |
| 656 | /// the value. |
| 657 | /// |
| 658 | /// \headerfile <x86intrin.h> |
| 659 | /// |
| 660 | /// This intrinsic corresponds to the \c ROL instruction. |
| 661 | /// |
| 662 | /// \param __X |
| 663 | /// The unsigned 64-bit value to be rotated. |
| 664 | /// \param __C |
| 665 | /// The number of bits to rotate the value. |
| 666 | /// \returns The rotated value. |
| 667 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR |
| 668 | __rolq(unsigned long long __X, int __C) { |
| 669 | return __builtin_rotateleft64(__X, (unsigned long long)__C); |
| 670 | } |
| 671 | |
| 672 | /// Rotates a 64-bit value to the right by the specified number of bits. |
| 673 | /// This operation is undefined if the number of bits exceeds the size of |
| 674 | /// the value. |
| 675 | /// |
| 676 | /// \headerfile <x86intrin.h> |
| 677 | /// |
| 678 | /// This intrinsic corresponds to the \c ROR instruction. |
| 679 | /// |
| 680 | /// \param __X |
| 681 | /// The unsigned 64-bit value to be rotated. |
| 682 | /// \param __C |
| 683 | /// The number of bits to rotate the value. |
| 684 | /// \returns The rotated value. |
| 685 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR |
| 686 | __rorq(unsigned long long __X, int __C) { |
| 687 | return __builtin_rotateright64(__X, (unsigned long long)__C); |
| 688 | } |
| 689 | #endif /* __x86_64__ */ |
| 690 | |
| 691 | #ifndef _MSC_VER |
| 692 | /* These are already provided as builtins for MSVC. */ |
| 693 | /* Select the correct function based on the size of long. */ |
| 694 | #ifdef __LP64__ |
| 695 | /// Rotates a 64-bit value to the left by the specified number of bits. |
| 696 | /// This operation is undefined if the number of bits exceeds the size of |
| 697 | /// the value. |
| 698 | /// |
| 699 | /// \headerfile <x86intrin.h> |
| 700 | /// |
| 701 | /// \code |
| 702 | /// unsigned long long _lrotl(unsigned long long a, int b); |
| 703 | /// \endcode |
| 704 | /// |
| 705 | /// This intrinsic corresponds to the \c ROL instruction. |
| 706 | /// |
| 707 | /// \param a |
| 708 | /// The unsigned 64-bit value to be rotated. |
| 709 | /// \param b |
| 710 | /// The number of bits to rotate the value. |
| 711 | /// \returns The rotated value. |
| 712 | /// \see __rolq |
| 713 | #define _lrotl(a,b) __rolq((a), (b)) |
| 714 | |
| 715 | /// Rotates a 64-bit value to the right by the specified number of bits. |
| 716 | /// This operation is undefined if the number of bits exceeds the size of |
| 717 | /// the value. |
| 718 | /// |
| 719 | /// \headerfile <x86intrin.h> |
| 720 | /// |
| 721 | /// \code |
| 722 | /// unsigned long long _lrotr(unsigned long long a, int b); |
| 723 | /// \endcode |
| 724 | /// |
| 725 | /// This intrinsic corresponds to the \c ROR instruction. |
| 726 | /// |
| 727 | /// \param a |
| 728 | /// The unsigned 64-bit value to be rotated. |
| 729 | /// \param b |
| 730 | /// The number of bits to rotate the value. |
| 731 | /// \returns The rotated value. |
| 732 | /// \see __rorq |
| 733 | #define _lrotr(a,b) __rorq((a), (b)) |
| 734 | #else // __LP64__ |
| 735 | /// Rotates a 32-bit value to the left by the specified number of bits. |
| 736 | /// This operation is undefined if the number of bits exceeds the size of |
| 737 | /// the value. |
| 738 | /// |
| 739 | /// \headerfile <x86intrin.h> |
| 740 | /// |
| 741 | /// \code |
| 742 | /// unsigned int _lrotl(unsigned int a, int b); |
| 743 | /// \endcode |
| 744 | /// |
| 745 | /// This intrinsic corresponds to the \c ROL instruction. |
| 746 | /// |
| 747 | /// \param a |
| 748 | /// The unsigned 32-bit value to be rotated. |
| 749 | /// \param b |
| 750 | /// The number of bits to rotate the value. |
| 751 | /// \returns The rotated value. |
| 752 | /// \see __rold |
| 753 | #define _lrotl(a,b) __rold((a), (b)) |
| 754 | |
| 755 | /// Rotates a 32-bit value to the right by the specified number of bits. |
| 756 | /// This operation is undefined if the number of bits exceeds the size of |
| 757 | /// the value. |
| 758 | /// |
| 759 | /// \headerfile <x86intrin.h> |
| 760 | /// |
| 761 | /// \code |
| 762 | /// unsigned int _lrotr(unsigned int a, int b); |
| 763 | /// \endcode |
| 764 | /// |
| 765 | /// This intrinsic corresponds to the \c ROR instruction. |
| 766 | /// |
| 767 | /// \param a |
| 768 | /// The unsigned 32-bit value to be rotated. |
| 769 | /// \param b |
| 770 | /// The number of bits to rotate the value. |
| 771 | /// \returns The rotated value. |
| 772 | /// \see __rord |
| 773 | #define _lrotr(a,b) __rord((a), (b)) |
| 774 | #endif // __LP64__ |
| 775 | |
| 776 | /// Rotates a 32-bit value to the left by the specified number of bits. |
| 777 | /// This operation is undefined if the number of bits exceeds the size of |
| 778 | /// the value. |
| 779 | /// |
| 780 | /// \headerfile <x86intrin.h> |
| 781 | /// |
| 782 | /// \code |
| 783 | /// unsigned int _rotl(unsigned int a, int b); |
| 784 | /// \endcode |
| 785 | /// |
| 786 | /// This intrinsic corresponds to the \c ROL instruction. |
| 787 | /// |
| 788 | /// \param a |
| 789 | /// The unsigned 32-bit value to be rotated. |
| 790 | /// \param b |
| 791 | /// The number of bits to rotate the value. |
| 792 | /// \returns The rotated value. |
| 793 | /// \see __rold |
| 794 | #define _rotl(a,b) __rold((a), (b)) |
| 795 | |
| 796 | /// Rotates a 32-bit value to the right by the specified number of bits. |
| 797 | /// This operation is undefined if the number of bits exceeds the size of |
| 798 | /// the value. |
| 799 | /// |
| 800 | /// \headerfile <x86intrin.h> |
| 801 | /// |
| 802 | /// \code |
| 803 | /// unsigned int _rotr(unsigned int a, int b); |
| 804 | /// \endcode |
| 805 | /// |
| 806 | /// This intrinsic corresponds to the \c ROR instruction. |
| 807 | /// |
| 808 | /// \param a |
| 809 | /// The unsigned 32-bit value to be rotated. |
| 810 | /// \param b |
| 811 | /// The number of bits to rotate the value. |
| 812 | /// \returns The rotated value. |
| 813 | /// \see __rord |
| 814 | #define _rotr(a,b) __rord((a), (b)) |
| 815 | #endif // _MSC_VER |
| 816 | |
| 817 | /* These are not builtins so need to be provided in all modes. */ |
| 818 | /// Rotates a 16-bit value to the left by the specified number of bits. |
| 819 | /// This operation is undefined if the number of bits exceeds the size of |
| 820 | /// the value. |
| 821 | /// |
| 822 | /// \headerfile <x86intrin.h> |
| 823 | /// |
| 824 | /// \code |
| 825 | /// unsigned short _rotwl(unsigned short a, int b); |
| 826 | /// \endcode |
| 827 | /// |
| 828 | /// This intrinsic corresponds to the \c ROL instruction. |
| 829 | /// |
| 830 | /// \param a |
| 831 | /// The unsigned 16-bit value to be rotated. |
| 832 | /// \param b |
| 833 | /// The number of bits to rotate the value. |
| 834 | /// \returns The rotated value. |
| 835 | /// \see __rolw |
| 836 | #define _rotwl(a,b) __rolw((a), (b)) |
| 837 | |
| 838 | /// Rotates a 16-bit value to the right by the specified number of bits. |
| 839 | /// This operation is undefined if the number of bits exceeds the size of |
| 840 | /// the value. |
| 841 | /// |
| 842 | /// \headerfile <x86intrin.h> |
| 843 | /// |
| 844 | /// \code |
| 845 | /// unsigned short _rotwr(unsigned short a, int b); |
| 846 | /// \endcode |
| 847 | /// |
| 848 | /// This intrinsic corresponds to the \c ROR instruction. |
| 849 | /// |
| 850 | /// \param a |
| 851 | /// The unsigned 16-bit value to be rotated. |
| 852 | /// \param b |
| 853 | /// The number of bits to rotate the value. |
| 854 | /// \returns The rotated value. |
| 855 | /// \see __rorw |
| 856 | #define _rotwr(a,b) __rorw((a), (b)) |
| 857 | |
| 858 | #undef __DEFAULT_FN_ATTRS |
| 859 | #undef __DEFAULT_FN_ATTRS_CAST |
| 860 | #undef __DEFAULT_FN_ATTRS_CRC32 |
| 861 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR |
| 862 | |
| 863 | #endif /* __IA32INTRIN_H */ |