| 1 | /*===--------------- x86gprintrin.h - X86 GPR intrinsics ------------------=== |
| 2 | * |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | * See https://llvm.org/LICENSE.txt for license information. |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | * |
| 7 | *===-----------------------------------------------------------------------=== |
| 8 | */ |
| 9 | |
| 10 | #ifndef __X86GPRINTRIN_H |
| 11 | #define __X86GPRINTRIN_H |
| 12 | |
| 13 | #include <hresetintrin.h> |
| 14 | |
| 15 | #include <uintrintrin.h> |
| 16 | |
| 17 | #include <usermsrintrin.h> |
| 18 | |
| 19 | #include <crc32intrin.h> |
| 20 | |
| 21 | #include <prfchiintrin.h> |
| 22 | |
| 23 | #include <raointintrin.h> |
| 24 | |
| 25 | #include <cmpccxaddintrin.h> |
| 26 | |
| 27 | #if defined(__i386__) |
| 28 | #define __SAVE_GPRBX "mov {%%ebx, %%eax |eax, ebx};" |
| 29 | #define __RESTORE_GPRBX "mov {%%eax, %%ebx |ebx, eax};" |
| 30 | #define __TMPGPR "eax" |
| 31 | #else |
| 32 | // When in 64-bit target, the 32-bit operands generate a 32-bit result, |
| 33 | // zero-extended to a 64-bit result in the destination general-purpose, |
| 34 | // It means "mov x %ebx" will clobber the higher 32 bits of rbx, so we |
| 35 | // should preserve the 64-bit register rbx. |
| 36 | #define __SAVE_GPRBX "mov {%%rbx, %%rax |rax, rbx};" |
| 37 | #define __RESTORE_GPRBX "mov {%%rax, %%rbx |rbx, rax};" |
| 38 | #define __TMPGPR "rax" |
| 39 | #endif |
| 40 | |
| 41 | #define __SSC_MARK(__Tag) \ |
| 42 | __asm__ __volatile__( __SAVE_GPRBX \ |
| 43 | "mov {%0, %%ebx|ebx, %0}; " \ |
| 44 | ".byte 0x64, 0x67, 0x90; " \ |
| 45 | __RESTORE_GPRBX \ |
| 46 | ::"i"(__Tag) \ |
| 47 | : __TMPGPR ); |
| 48 | |
| 49 | #endif /* __X86GPRINTRIN_H */ |