| 1 | /* Copyright (C) 1996-2026 Free Software Foundation, Inc. |
| 2 | |
| 3 | This file is part of the GNU C Library. |
| 4 | |
| 5 | The GNU C Library is free software; you can redistribute it and/or |
| 6 | modify it under the terms of the GNU Lesser General Public License as |
| 7 | published by the Free Software Foundation; either version 2.1 of the |
| 8 | License, or (at your option) any later version. |
| 9 | |
| 10 | The GNU C Library is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | Lesser General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU Lesser General Public |
| 16 | License along with the GNU C Library; if not, see |
| 17 | <https://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #ifndef _AARCH64_FPU_CONTROL_H |
| 20 | #define _AARCH64_FPU_CONTROL_H |
| 21 | |
| 22 | #include <features.h> |
| 23 | #include <sys/types.h> |
| 24 | |
| 25 | /* Macros for accessing the FPCR and FPSR. */ |
| 26 | |
| 27 | #if __GNUC_PREREQ (6,0) |
| 28 | # define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ()) |
| 29 | # define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr) |
| 30 | # define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ()) |
| 31 | # define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr) |
| 32 | #else |
| 33 | # define _FPU_GETCW(fpcr)					\ |
| 34 | ({ 								\ |
| 35 | __uint64_t __fpcr;						\ |
| 36 | __asm__ __volatile__ ("mrs	%0, fpcr" : "=r" (__fpcr));	\ |
| 37 | fpcr = __fpcr;						\ |
| 38 | }) |
| 39 | |
| 40 | # define _FPU_SETCW(fpcr)					\ |
| 41 | ({								\ |
| 42 | __uint64_t __fpcr = fpcr;					\ |
| 43 | __asm__ __volatile__ ("msr	fpcr, %0" : : "r" (__fpcr)); \ |
| 44 | }) |
| 45 | |
| 46 | # define _FPU_GETFPSR(fpsr)					\ |
| 47 | ({								\ |
| 48 | __uint64_t __fpsr;						\ |
| 49 | __asm__ __volatile__ ("mrs	%0, fpsr" : "=r" (__fpsr));	\ |
| 50 | fpsr = __fpsr;						\ |
| 51 | }) |
| 52 | |
| 53 | # define _FPU_SETFPSR(fpsr)					\ |
| 54 | ({								\ |
| 55 | __uint64_t __fpsr = fpsr;					\ |
| 56 | __asm__ __volatile__ ("msr	fpsr, %0" : : "r" (__fpsr)); \ |
| 57 | }) |
| 58 | #endif |
| 59 | |
| 60 | /* Reserved bits should be preserved when modifying register |
| 61 | contents. These two masks indicate which bits in each of FPCR and |
| 62 | FPSR should not be changed. */ |
| 63 | |
| 64 | #define _FPU_RESERVED		0xfe0fe0f8 |
| 65 | #define _FPU_FPSR_RESERVED	0x0fffffe0 |
| 66 | |
| 67 | #define _FPU_DEFAULT		0x00000000 |
| 68 | #define _FPU_FPSR_DEFAULT	0x00000000 |
| 69 | |
| 70 | /* Layout of FPCR and FPSR: |
| 71 | |
| 72 | | | | | | | | | |
| 73 | 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 |
| 74 | s s s s s s s s s s s |
| 75 | c c c c c c c c c c c c |
| 76 | N Z C V Q A D F R R S S S L L L I U U I U O D I I U U I U O D I |
| 77 | C H N Z M M T T B E E E D N N X F F Z O D N N X F F Z O |
| 78 | P O O R R Z N N N E K K E E E E E C K K C C C C C |
| 79 | D D I I P |
| 80 | E E D D |
| 81 | E E |
| 82 | */ |
| 83 | |
| 84 | #define _FPU_FPCR_RM_MASK 0xc00000 |
| 85 | |
| 86 | #define _FPU_FPCR_MASK_IXE 0x1000 |
| 87 | #define _FPU_FPCR_MASK_UFE 0x0800 |
| 88 | #define _FPU_FPCR_MASK_OFE 0x0400 |
| 89 | #define _FPU_FPCR_MASK_DZE 0x0200 |
| 90 | #define _FPU_FPCR_MASK_IOE 0x0100 |
| 91 | |
| 92 | #define _FPU_FPCR_IEEE \ |
| 93 | (_FPU_DEFAULT | _FPU_FPCR_MASK_IXE	 \ |
| 94 | | _FPU_FPCR_MASK_UFE | _FPU_FPCR_MASK_OFE \ |
| 95 | | _FPU_FPCR_MASK_DZE | _FPU_FPCR_MASK_IOE) |
| 96 | |
| 97 | #define _FPU_FPSR_IEEE 0 |
| 98 | |
| 99 | typedef unsigned int fpu_control_t; |
| 100 | typedef unsigned int fpu_fpsr_t; |
| 101 | |
| 102 | /* Default control word set at startup. */ |
| 103 | extern fpu_control_t __fpu_control; |
| 104 | |
| 105 | #endif |