1/* $OpenBSD: pci_machdep.h,v 1.13 2025/01/23 11:24:34 kettenis Exp $ */
2
3/*
4 * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29typedef struct machine_pci_chipset *pci_chipset_tag_t;
30typedef uint64_t pcitag_t;
31
32#define PCITAG_NODE(x) ((x) >> 32)
33#define PCITAG_OFFSET(x) ((x) & 0xffffffff)
34
35/* Supported interrupt types. */
36#define PCI_NONE 0
37#define PCI_INTX 1
38#define PCI_MSI 2
39#define PCI_MSIX 3
40
41typedef struct {
42 pci_chipset_tag_t ih_pc;
43 pcitag_t ih_tag;
44 int ih_intrpin;
45 int ih_type;
46 bus_dma_tag_t ih_dmat;
47} pci_intr_handle_t;
48
49struct pci_attach_args;
50
51/*
52 * Machine-specific PCI structure and type definitions.
53 * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
54 */
55struct machine_pci_chipset {
56 void *pc_conf_v;
57 void (*pc_attach_hook)(struct device *,
58 struct device *, struct pcibus_attach_args *);
59 int (*pc_bus_maxdevs)(void *, int);
60 pcitag_t (*pc_make_tag)(void *, int, int, int);
61 void (*pc_decompose_tag)(void *, pcitag_t, int *,
62 int *, int *);
63 int (*pc_conf_size)(void *, pcitag_t);
64 pcireg_t (*pc_conf_read)(void *, pcitag_t, int);
65 void (*pc_conf_write)(void *, pcitag_t, int, pcireg_t);
66 int (*pc_probe_device_hook)(void *, struct pci_attach_args *);
67
68 void *pc_intr_v;
69 int (*pc_intr_map)(struct pci_attach_args *,
70 pci_intr_handle_t *);
71 int (*pc_intr_map_msi)(struct pci_attach_args *,
72 pci_intr_handle_t *);
73 int (*pc_intr_map_msivec)(struct pci_attach_args *,
74 int, pci_intr_handle_t *);
75 int (*pc_intr_map_msix)(struct pci_attach_args *,
76 int, pci_intr_handle_t *);
77 const char *(*pc_intr_string)(void *, pci_intr_handle_t);
78 void *(*pc_intr_establish)(void *, pci_intr_handle_t,
79 int, struct cpu_info *, int (*)(void *), void *,
80 char *);
81 void (*pc_intr_disestablish)(void *, void *);
82};
83
84/*
85 * Functions provided to machine-independent PCI code.
86 */
87#define pci_attach_hook(p, s, pba) \
88 (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
89#define pci_bus_maxdevs(c, b) \
90 (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
91#define pci_make_tag(c, b, d, f) \
92 (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
93#define pci_decompose_tag(c, t, bp, dp, fp) \
94 (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
95#define pci_conf_size(c, t) \
96 (*(c)->pc_conf_size)((c)->pc_conf_v, (t))
97#define pci_conf_read(c, t, r) \
98 (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
99#define pci_conf_write(c, t, r, v) \
100 (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
101#define pci_probe_device_hook(c, a) \
102 (*(c)->pc_probe_device_hook)((c)->pc_conf_v, (a))
103#define pci_intr_map(c, ihp) \
104 (*(c)->pa_pc->pc_intr_map)((c), (ihp))
105#define pci_intr_map_msi(c, ihp) \
106 (*(c)->pa_pc->pc_intr_map_msi)((c), (ihp))
107#define pci_intr_map_msivec(c, vec, ihp) \
108 (*(c)->pa_pc->pc_intr_map_msivec)((c), (vec), (ihp))
109#define pci_intr_map_msix(c, vec, ihp) \
110 (*(c)->pa_pc->pc_intr_map_msix)((c), (vec), (ihp))
111#define pci_intr_string(c, ih) \
112 (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
113#define pci_intr_establish(c, ih, l, h, a, nm) \
114 (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), NULL, (h), (a),\
115 (nm))
116#define pci_intr_establish_cpu(c, ih, l, ci, h, a, nm) \
117 (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (ci), (h), (a),\
118 (nm))
119#define pci_intr_disestablish(c, iv) \
120 (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
121
122#define pci_min_powerstate(c, t) (PCI_PMCSR_STATE_D3)
123#define pci_set_powerstate_md(c, t, s, p)
124
125#define pci_dev_postattach(a, b)
126
127void pci_mcfg_init(bus_space_tag_t, bus_addr_t, int, int, int);
128pci_chipset_tag_t pci_lookup_segment(int, int);
129
130int pci_intr_enable_msivec(struct pci_attach_args *, int);
131
132void pci_msi_enable(pci_chipset_tag_t, pcitag_t, bus_addr_t, uint32_t);
133void pci_msix_enable(pci_chipset_tag_t, pcitag_t, bus_space_tag_t,
134 int, bus_addr_t, uint32_t);
135int _pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *);
136int _pci_intr_map_msivec(struct pci_attach_args *, int,
137 pci_intr_handle_t *);
138int _pci_intr_map_msix(struct pci_attach_args *, int, pci_intr_handle_t *);
139
140#define __HAVE_PCI_MSIX
141
142int pci_msix_table_map(pci_chipset_tag_t, pcitag_t,
143 bus_space_tag_t, bus_space_handle_t *);
144void pci_msix_table_unmap(pci_chipset_tag_t, pcitag_t,
145 bus_space_tag_t, bus_space_handle_t);