| 1 | /*- |
| 2 | * Copyright (c) 1996-1997 John D. Polstra. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * 1. Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * 2. Redistributions in binary form must reproduce the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer in the |
| 12 | * documentation and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 24 | * SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | #ifndef	_MACHINE_ELF_H_ |
| 28 | #define	_MACHINE_ELF_H_ |
| 29 | |
| 30 | /* |
| 31 | * ELF definitions for the AArch64 architecture. |
| 32 | */ |
| 33 | |
| 34 | #ifdef _KERNEL |
| 35 | # define __HAVE_CPU_HWCAP |
| 36 | # define __HAVE_CPU_HWCAP2 |
| 37 | extern unsigned long	hwcap, hwcap2; |
| 38 | #endif /* _KERNEL */ |
| 39 | |
| 40 | /* HWCAP */ |
| 41 | #define	HWCAP_FP		0x00000001 |
| 42 | #define	HWCAP_ASIMD		0x00000002 |
| 43 | #define	HWCAP_EVTSTRM		0x00000004 |
| 44 | #define	HWCAP_AES		0x00000008 |
| 45 | #define	HWCAP_PMULL		0x00000010 |
| 46 | #define	HWCAP_SHA1		0x00000020 |
| 47 | #define	HWCAP_SHA2		0x00000040 |
| 48 | #define	HWCAP_CRC32		0x00000080 |
| 49 | #define	HWCAP_ATOMICS		0x00000100 |
| 50 | #define	HWCAP_FPHP		0x00000200 |
| 51 | #define	HWCAP_ASIMDHP		0x00000400 |
| 52 | #define	HWCAP_CPUID		0x00000800 |
| 53 | #define	HWCAP_ASIMDRDM		0x00001000 |
| 54 | #define	HWCAP_JSCVT		0x00002000 |
| 55 | #define	HWCAP_FCMA		0x00004000 |
| 56 | #define	HWCAP_LRCPC		0x00008000 |
| 57 | #define	HWCAP_DCPOP		0x00010000 |
| 58 | #define	HWCAP_SHA3		0x00020000 |
| 59 | #define	HWCAP_SM3		0x00040000 |
| 60 | #define	HWCAP_SM4		0x00080000 |
| 61 | #define	HWCAP_ASIMDDP		0x00100000 |
| 62 | #define	HWCAP_SHA512		0x00200000 |
| 63 | #define	HWCAP_SVE		0x00400000 |
| 64 | #define	HWCAP_ASIMDFHM		0x00800000 |
| 65 | #define	HWCAP_DIT		0x01000000 |
| 66 | #define	HWCAP_USCAT		0x02000000 |
| 67 | #define	HWCAP_ILRCPC		0x04000000 |
| 68 | #define	HWCAP_FLAGM		0x08000000 |
| 69 | #define	HWCAP_SSBS		0x10000000 |
| 70 | #define	HWCAP_SB		0x20000000 |
| 71 | #define	HWCAP_PACA		0x40000000 |
| 72 | #define	HWCAP_PACG		0x80000000 |
| 73 | |
| 74 | /* HWCAP2 */ |
| 75 | #define	HWCAP2_DCPODP		0x0000000000000001ul |
| 76 | #define	HWCAP2_SVE2		0x0000000000000002ul |
| 77 | #define	HWCAP2_SVEAES		0x0000000000000004ul |
| 78 | #define	HWCAP2_SVEPMULL		0x0000000000000008ul |
| 79 | #define	HWCAP2_SVEBITPERM	0x0000000000000010ul |
| 80 | #define	HWCAP2_SVESHA3		0x0000000000000020ul |
| 81 | #define	HWCAP2_SVESM4		0x0000000000000040ul |
| 82 | #define	HWCAP2_FLAGM2		0x0000000000000080ul |
| 83 | #define	HWCAP2_FRINT		0x0000000000000100ul |
| 84 | #define	HWCAP2_SVEI8MM		0x0000000000000200ul |
| 85 | #define	HWCAP2_SVEF32MM		0x0000000000000400ul |
| 86 | #define	HWCAP2_SVEF64MM		0x0000000000000800ul |
| 87 | #define	HWCAP2_SVEBF16		0x0000000000001000ul |
| 88 | #define	HWCAP2_I8MM		0x0000000000002000ul |
| 89 | #define	HWCAP2_BF16		0x0000000000004000ul |
| 90 | #define	HWCAP2_DGH		0x0000000000008000ul |
| 91 | #define	HWCAP2_RNG		0x0000000000010000ul |
| 92 | #define	HWCAP2_BTI		0x0000000000020000ul |
| 93 | #define	HWCAP2_MTE		0x0000000000040000ul |
| 94 | #define	HWCAP2_ECV		0x0000000000080000ul |
| 95 | #define	HWCAP2_AFP		0x0000000000100000ul |
| 96 | #define	HWCAP2_RPRES		0x0000000000200000ul |
| 97 | #define	HWCAP2_MTE3		0x0000000000400000ul |
| 98 | #define	HWCAP2_SME		0x0000000000800000ul |
| 99 | #define	HWCAP2_SME_I16I64	0x0000000001000000ul |
| 100 | #define	HWCAP2_SME_F64F64	0x0000000002000000ul |
| 101 | #define	HWCAP2_SME_I8I32	0x0000000004000000ul |
| 102 | #define	HWCAP2_SME_F16F32	0x0000000008000000ul |
| 103 | #define	HWCAP2_SME_B16F32	0x0000000010000000ul |
| 104 | #define	HWCAP2_SME_F32F32	0x0000000020000000ul |
| 105 | #define	HWCAP2_SME_FA64		0x0000000040000000ul |
| 106 | #define	HWCAP2_WFXT		0x0000000080000000ul |
| 107 | #define	HWCAP2_EBF16		0x0000000100000000ul |
| 108 | #define	HWCAP2_SVE_EBF16	0x0000000200000000ul |
| 109 | #define	HWCAP2_CSSC		0x0000000400000000ul |
| 110 | #define	HWCAP2_RPRFM		0x0000000800000000ul |
| 111 | #define	HWCAP2_SVE2P1		0x0000001000000000ul |
| 112 | #define	HWCAP2_SME2		0x0000002000000000ul |
| 113 | #define	HWCAP2_SME2P1		0x0000004000000000ul |
| 114 | #define	HWCAP2_SME_I16I32	0x0000008000000000ul |
| 115 | #define	HWCAP2_SME_BI32I32	0x0000010000000000ul |
| 116 | #define	HWCAP2_SME_B16B16	0x0000020000000000ul |
| 117 | #define	HWCAP2_SME_F16F16	0x0000040000000000ul |
| 118 | #define	HWCAP2_MOPS		0x0000080000000000ul |
| 119 | #define	HWCAP2_HBC		0x0000100000000000ul |
| 120 | |
| 121 | #endif /* !_MACHINE_ELF_H_ */ |