1/*
2 * Copyright (c) 2000-2020 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58/*
59 * File: thread_status.h
60 * Author: Avadis Tevanian, Jr.
61 * Date: 1985
62 *
63 * This file contains the structure definitions for the thread
64 * state as applied to I386 processors.
65 */
66
67#ifndef _MACH_I386_THREAD_STATUS_H_
68#define _MACH_I386_THREAD_STATUS_H_
69
70#if defined (__i386__) || defined (__x86_64__)
71
72#include <mach/machine/_structs.h>
73#include <mach/machine/thread_state.h>
74#include <mach/message.h>
75#include <mach/i386/fp_reg.h>
76#include <i386/eflags.h>
77
78
79/*
80 * the i386_xxxx form is kept for legacy purposes since these types
81 * are externally known... eventually they should be deprecated.
82 * our internal implementation has moved to the following naming convention
83 *
84 * x86_xxxx32 names are used to deal with 32 bit states
85 * x86_xxxx64 names are used to deal with 64 bit states
86 * x86_xxxx names are used to deal with either 32 or 64 bit states
87 * via a self-describing mechanism
88 */
89
90/*
91 * these are the legacy names which should be deprecated in the future
92 * they are externally known which is the only reason we don't just get
93 * rid of them
94 */
95#define i386_THREAD_STATE 1
96#define i386_FLOAT_STATE 2
97#define i386_EXCEPTION_STATE 3
98
99/*
100 * THREAD_STATE_FLAVOR_LIST 0
101 * these are the supported flavors
102 */
103#define x86_THREAD_STATE32 1
104#define x86_FLOAT_STATE32 2
105#define x86_EXCEPTION_STATE32 3
106#define x86_THREAD_STATE64 4
107#define x86_FLOAT_STATE64 5
108#define x86_EXCEPTION_STATE64 6
109#define x86_THREAD_STATE 7
110#define x86_FLOAT_STATE 8
111#define x86_EXCEPTION_STATE 9
112#define x86_DEBUG_STATE32 10
113#define x86_DEBUG_STATE64 11
114#define x86_DEBUG_STATE 12
115#define THREAD_STATE_NONE 13
116/* 14 and 15 are used for the internal x86_SAVED_STATE flavours */
117/* Arrange for flavors to take sequential values, 32-bit, 64-bit, non-specific */
118#define x86_AVX_STATE32 16
119#define x86_AVX_STATE64 (x86_AVX_STATE32 + 1)
120#define x86_AVX_STATE (x86_AVX_STATE32 + 2)
121#define x86_AVX512_STATE32 19
122#define x86_AVX512_STATE64 (x86_AVX512_STATE32 + 1)
123#define x86_AVX512_STATE (x86_AVX512_STATE32 + 2)
124#define x86_PAGEIN_STATE 22
125#define x86_THREAD_FULL_STATE64 23
126#define x86_INSTRUCTION_STATE 24
127#define x86_LAST_BRANCH_STATE 25
128#define THREAD_STATE_FLAVORS 26 /* This must be updated to 1 more than the highest numerical state flavor */
129
130/*
131 * Largest state on this machine:
132 * (be sure mach/machine/thread_state.h matches!)
133 */
134#define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
135
136#define FLAVOR_MODIFIES_CORE_CPU_REGISTERS(x) \
137((x == x86_THREAD_STATE) || \
138 (x == x86_THREAD_STATE32) || \
139 (x == x86_THREAD_STATE64) || \
140 (x == x86_THREAD_FULL_STATE64))
141
142/*
143 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
144 * an exception flavor will return if that is a defined flavor for that
145 * platform. The macro must be manually updated to include all of the valid
146 * exception flavors as defined above.
147 */
148#define VALID_THREAD_STATE_FLAVOR(x) \
149 ((x == x86_THREAD_STATE32) || \
150 (x == x86_FLOAT_STATE32) || \
151 (x == x86_EXCEPTION_STATE32) || \
152 (x == x86_DEBUG_STATE32) || \
153 (x == x86_THREAD_STATE64) || \
154 (x == x86_THREAD_FULL_STATE64) || \
155 (x == x86_FLOAT_STATE64) || \
156 (x == x86_EXCEPTION_STATE64) || \
157 (x == x86_DEBUG_STATE64) || \
158 (x == x86_THREAD_STATE) || \
159 (x == x86_FLOAT_STATE) || \
160 (x == x86_EXCEPTION_STATE) || \
161 (x == x86_DEBUG_STATE) || \
162 (x == x86_AVX_STATE32) || \
163 (x == x86_AVX_STATE64) || \
164 (x == x86_AVX_STATE) || \
165 (x == x86_AVX512_STATE32) || \
166 (x == x86_AVX512_STATE64) || \
167 (x == x86_AVX512_STATE) || \
168 (x == x86_PAGEIN_STATE) || \
169 (x == x86_INSTRUCTION_STATE) || \
170 (x == x86_LAST_BRANCH_STATE) || \
171 (x == THREAD_STATE_NONE))
172
173struct x86_state_hdr {
174 uint32_t flavor;
175 uint32_t count;
176};
177typedef struct x86_state_hdr x86_state_hdr_t;
178
179/*
180 * Default segment register values.
181 */
182
183#define USER_CODE_SELECTOR 0x0017
184#define USER_DATA_SELECTOR 0x001f
185#define KERN_CODE_SELECTOR 0x0008
186#define KERN_DATA_SELECTOR 0x0010
187
188/*
189 * to be deprecated in the future
190 */
191typedef _STRUCT_X86_THREAD_STATE32 i386_thread_state_t;
192#define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
193 ( sizeof (i386_thread_state_t) / sizeof (int) ))
194
195typedef _STRUCT_X86_THREAD_STATE32 x86_thread_state32_t;
196#define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
197 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
198
199/*
200 * to be deprecated in the future
201 */
202typedef _STRUCT_X86_FLOAT_STATE32 i386_float_state_t;
203#define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
204 (sizeof(i386_float_state_t)/sizeof(unsigned int)))
205
206typedef _STRUCT_X86_FLOAT_STATE32 x86_float_state32_t;
207#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
208 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
209
210typedef _STRUCT_X86_AVX_STATE32 x86_avx_state32_t;
211#define x86_AVX_STATE32_COUNT ((mach_msg_type_number_t) \
212 (sizeof(x86_avx_state32_t)/sizeof(unsigned int)))
213
214typedef _STRUCT_X86_AVX512_STATE32 x86_avx512_state32_t;
215#define x86_AVX512_STATE32_COUNT ((mach_msg_type_number_t) \
216 (sizeof(x86_avx512_state32_t)/sizeof(unsigned int)))
217
218/*
219 * to be deprecated in the future
220 */
221typedef _STRUCT_X86_EXCEPTION_STATE32 i386_exception_state_t;
222#define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
223 ( sizeof (i386_exception_state_t) / sizeof (int) ))
224
225typedef _STRUCT_X86_EXCEPTION_STATE32 x86_exception_state32_t;
226#define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
227 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
228
229#define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT
230
231typedef _STRUCT_X86_DEBUG_STATE32 x86_debug_state32_t;
232#define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
233 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
234
235#define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
236
237typedef _STRUCT_X86_THREAD_STATE64 x86_thread_state64_t;
238#define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
239 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
240
241typedef _STRUCT_X86_THREAD_FULL_STATE64 x86_thread_full_state64_t;
242#define x86_THREAD_FULL_STATE64_COUNT ((mach_msg_type_number_t) \
243 ( sizeof (x86_thread_full_state64_t) / sizeof (int) ))
244
245typedef _STRUCT_X86_FLOAT_STATE64 x86_float_state64_t;
246#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
247 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
248
249typedef _STRUCT_X86_AVX_STATE64 x86_avx_state64_t;
250#define x86_AVX_STATE64_COUNT ((mach_msg_type_number_t) \
251 (sizeof(x86_avx_state64_t)/sizeof(unsigned int)))
252
253typedef _STRUCT_X86_AVX512_STATE64 x86_avx512_state64_t;
254#define x86_AVX512_STATE64_COUNT ((mach_msg_type_number_t) \
255 (sizeof(x86_avx512_state64_t)/sizeof(unsigned int)))
256
257typedef _STRUCT_X86_EXCEPTION_STATE64 x86_exception_state64_t;
258#define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
259 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
260
261#define X86_EXCEPTION_STATE64_COUNT x86_EXCEPTION_STATE64_COUNT
262
263typedef _STRUCT_X86_DEBUG_STATE64 x86_debug_state64_t;
264#define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
265 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
266
267#define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
268
269typedef _STRUCT_X86_PAGEIN_STATE x86_pagein_state_t;
270#define x86_PAGEIN_STATE_COUNT \
271 ((mach_msg_type_number_t)(sizeof(x86_pagein_state_t) / sizeof(int)))
272
273#define X86_PAGEIN_STATE_COUNT x86_PAGEIN_STATE_COUNT
274
275typedef _STRUCT_X86_INSTRUCTION_STATE x86_instruction_state_t;
276#define x86_INSTRUCTION_STATE_COUNT \
277 ((mach_msg_type_number_t)(sizeof(x86_instruction_state_t) / sizeof(int)))
278
279#define X86_INSTRUCTION_STATE_COUNT x86_INSTRUCTION_STATE_COUNT
280
281typedef _STRUCT_LAST_BRANCH_STATE last_branch_state_t;
282#define x86_LAST_BRANCH_STATE_COUNT \
283 ((mach_msg_type_number_t)(sizeof(last_branch_state_t) / sizeof(int)))
284
285#define X86_LAST_BRANCH_STATE_COUNT x86_LAST_BRANCH_STATE_COUNT
286
287
288/*
289 * Combined thread, float and exception states
290 */
291struct x86_thread_state {
292 x86_state_hdr_t tsh;
293 union {
294 x86_thread_state32_t ts32;
295 x86_thread_state64_t ts64;
296 } uts;
297};
298
299struct x86_float_state {
300 x86_state_hdr_t fsh;
301 union {
302 x86_float_state32_t fs32;
303 x86_float_state64_t fs64;
304 } ufs;
305};
306
307struct x86_exception_state {
308 x86_state_hdr_t esh;
309 union {
310 x86_exception_state32_t es32;
311 x86_exception_state64_t es64;
312 } ues;
313};
314
315struct x86_debug_state {
316 x86_state_hdr_t dsh;
317 union {
318 x86_debug_state32_t ds32;
319 x86_debug_state64_t ds64;
320 } uds;
321};
322
323struct x86_avx_state {
324 x86_state_hdr_t ash;
325 union {
326 x86_avx_state32_t as32;
327 x86_avx_state64_t as64;
328 } ufs;
329};
330
331struct x86_avx512_state {
332 x86_state_hdr_t ash;
333 union {
334 x86_avx512_state32_t as32;
335 x86_avx512_state64_t as64;
336 } ufs;
337};
338
339typedef struct x86_thread_state x86_thread_state_t;
340#define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
341 ( sizeof (x86_thread_state_t) / sizeof (int) ))
342
343typedef struct x86_float_state x86_float_state_t;
344#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
345 (sizeof(x86_float_state_t)/sizeof(unsigned int)))
346
347typedef struct x86_exception_state x86_exception_state_t;
348#define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
349 (sizeof(x86_exception_state_t)/sizeof(unsigned int)))
350
351typedef struct x86_debug_state x86_debug_state_t;
352#define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
353 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
354
355typedef struct x86_avx_state x86_avx_state_t;
356#define x86_AVX_STATE_COUNT ((mach_msg_type_number_t) \
357 (sizeof(x86_avx_state_t)/sizeof(unsigned int)))
358
359typedef struct x86_avx512_state x86_avx512_state_t;
360#define x86_AVX512_STATE_COUNT ((mach_msg_type_number_t) \
361 (sizeof(x86_avx512_state_t)/sizeof(unsigned int)))
362
363/*
364 * Machine-independent way for servers and Mach's exception mechanism to
365 * choose the most efficient state flavor for exception RPC's:
366 */
367#define MACHINE_THREAD_STATE x86_THREAD_STATE
368#define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT
369
370
371#endif /* defined (__i386__) || defined (__x86_64__) */
372
373#endif /* _MACH_I386_THREAD_STATUS_H_ */