| 1 | /* |
| 2 | * Copyright (c) 2007-2016 Apple, Inc. All rights reserved. |
| 3 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. |
| 4 | * |
| 5 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
| 6 | * |
| 7 | * This file contains Original Code and/or Modifications of Original Code |
| 8 | * as defined in and that are subject to the Apple Public Source License |
| 9 | * Version 2.0 (the 'License'). You may not use this file except in |
| 10 | * compliance with the License. The rights granted to you under the License |
| 11 | * may not be used to create, or enable the creation or redistribution of, |
| 12 | * unlawful or unlicensed copies of an Apple operating system, or to |
| 13 | * circumvent, violate, or enable the circumvention or violation of, any |
| 14 | * terms of an Apple operating system software license agreement. |
| 15 | * |
| 16 | * Please obtain a copy of the License at |
| 17 | * http://www.opensource.apple.com/apsl/ and read it before using this file. |
| 18 | * |
| 19 | * The Original Code and all software distributed under the License are |
| 20 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER |
| 21 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
| 22 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, |
| 23 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
| 24 | * Please see the License for the specific language governing rights and |
| 25 | * limitations under the License. |
| 26 | * |
| 27 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ |
| 28 | */ |
| 29 | /* |
| 30 | * Mach Operating System |
| 31 | * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University |
| 32 | * All Rights Reserved. |
| 33 | * |
| 34 | * Permission to use, copy, modify and distribute this software and its |
| 35 | * documentation is hereby granted, provided that both the copyright |
| 36 | * notice and this permission notice appear in all copies of the |
| 37 | * software, derivative works or modified versions, and any portions |
| 38 | * thereof, and that both notices appear in supporting documentation. |
| 39 | * |
| 40 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" |
| 41 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR |
| 42 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. |
| 43 | * |
| 44 | * Carnegie Mellon requests users of this software to return to |
| 45 | * |
| 46 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU |
| 47 | * School of Computer Science |
| 48 | * Carnegie Mellon University |
| 49 | * Pittsburgh PA 15213-3890 |
| 50 | * |
| 51 | * any improvements or extensions that they make and grant Carnegie Mellon |
| 52 | * the rights to redistribute these changes. |
| 53 | */ |
| 54 | /*	File:	machine.h |
| 55 | *	Author:	Avadis Tevanian, Jr. |
| 56 | *	Date:	1986 |
| 57 | * |
| 58 | *	Machine independent machine abstraction. |
| 59 | */ |
| 60 | |
| 61 | #ifndef _MACH_MACHINE_H_ |
| 62 | #define _MACH_MACHINE_H_ |
| 63 | |
| 64 | #ifndef __ASSEMBLER__ |
| 65 | |
| 66 | #include <stdint.h> |
| 67 | #include <mach/machine/vm_types.h> |
| 68 | #include <mach/boolean.h> |
| 69 | |
| 70 | typedef integer_t cpu_type_t; |
| 71 | typedef integer_t cpu_subtype_t; |
| 72 | typedef integer_t cpu_threadtype_t; |
| 73 | |
| 74 | #define CPU_STATE_MAX 4 |
| 75 | |
| 76 | #define CPU_STATE_USER 0 |
| 77 | #define CPU_STATE_SYSTEM 1 |
| 78 | #define CPU_STATE_IDLE 2 |
| 79 | #define CPU_STATE_NICE 3 |
| 80 | |
| 81 | |
| 82 | |
| 83 | /* |
| 84 | * Capability bits used in the definition of cpu_type. |
| 85 | */ |
| 86 | #define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */ |
| 87 | #define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */ |
| 88 | #define CPU_ARCH_ABI64_32 0x02000000 /* ABI for 64-bit hardware with 32-bit types; LP32 */ |
| 89 | |
| 90 | /* |
| 91 | *	Machine types known by all. |
| 92 | */ |
| 93 | |
| 94 | #define CPU_TYPE_ANY ((cpu_type_t) -1) |
| 95 | |
| 96 | #define CPU_TYPE_VAX ((cpu_type_t) 1) |
| 97 | /* skip				((cpu_type_t) 2)	*/ |
| 98 | /* skip				((cpu_type_t) 3)	*/ |
| 99 | /* skip				((cpu_type_t) 4)	*/ |
| 100 | /* skip				((cpu_type_t) 5)	*/ |
| 101 | #define CPU_TYPE_MC680x0 ((cpu_type_t) 6) |
| 102 | #define CPU_TYPE_X86 ((cpu_type_t) 7) |
| 103 | #define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */ |
| 104 | #define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64) |
| 105 | |
| 106 | /* skip CPU_TYPE_MIPS		((cpu_type_t) 8)	*/ |
| 107 | /* skip ((cpu_type_t) 9)	*/ |
| 108 | #define CPU_TYPE_MC98000 ((cpu_type_t) 10) |
| 109 | #define CPU_TYPE_HPPA ((cpu_type_t) 11) |
| 110 | #define CPU_TYPE_ARM ((cpu_type_t) 12) |
| 111 | #define CPU_TYPE_ARM64 (CPU_TYPE_ARM | CPU_ARCH_ABI64) |
| 112 | #define CPU_TYPE_ARM64_32 (CPU_TYPE_ARM | CPU_ARCH_ABI64_32) |
| 113 | #define CPU_TYPE_MC88000 ((cpu_type_t) 13) |
| 114 | #define CPU_TYPE_SPARC ((cpu_type_t) 14) |
| 115 | #define CPU_TYPE_I860 ((cpu_type_t) 15) |
| 116 | /* skip	CPU_TYPE_ALPHA		((cpu_type_t) 16)	*/ |
| 117 | /* skip				((cpu_type_t) 17)	*/ |
| 118 | #define CPU_TYPE_POWERPC ((cpu_type_t) 18) |
| 119 | #define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | CPU_ARCH_ABI64) |
| 120 | /* skip				((cpu_type_t) 19)	*/ |
| 121 | /* skip				((cpu_type_t) 20) */ |
| 122 | /* skip				((cpu_type_t) 21) */ |
| 123 | /* skip				((cpu_type_t) 22) */ |
| 124 | /* skip				((cpu_type_t) 23) */ |
| 125 | /* skip				((cpu_type_t) 24) */ |
| 126 | |
| 127 | /* |
| 128 | *	Machine subtypes (these are defined here, instead of in a machine |
| 129 | *	dependent directory, so that any program can get all definitions |
| 130 | *	regardless of where is it compiled). |
| 131 | */ |
| 132 | |
| 133 | /* |
| 134 | * Capability bits used in the definition of cpu_subtype. |
| 135 | */ |
| 136 | #define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */ |
| 137 | #define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */ |
| 138 | #define CPU_SUBTYPE_PTRAUTH_ABI 0x80000000 /* pointer authentication with versioned ABI */ |
| 139 | |
| 140 | /* |
| 141 | * When selecting a slice, ANY will pick the slice with the best |
| 142 | * grading for the selected cpu_type_t, unlike the "ALL" subtypes, |
| 143 | * which are the slices that can run on any hardware for that cpu type. |
| 144 | */ |
| 145 | #define CPU_SUBTYPE_ANY ((cpu_subtype_t) -1) |
| 146 | |
| 147 | /* |
| 148 | *	Object files that are hand-crafted to run on any |
| 149 | *	implementation of an architecture are tagged with |
| 150 | *	CPU_SUBTYPE_MULTIPLE. This functions essentially the same as |
| 151 | *	the "ALL" subtype of an architecture except that it allows us |
| 152 | *	to easily find object files that may need to be modified |
| 153 | *	whenever a new implementation of an architecture comes out. |
| 154 | * |
| 155 | *	It is the responsibility of the implementor to make sure the |
| 156 | *	software handles unsupported implementations elegantly. |
| 157 | */ |
| 158 | #define CPU_SUBTYPE_MULTIPLE ((cpu_subtype_t) -1) |
| 159 | #define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0) |
| 160 | #define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1) |
| 161 | |
| 162 | /* |
| 163 | * Machine threadtypes. |
| 164 | * This is none - not defined - for most machine types/subtypes. |
| 165 | */ |
| 166 | #define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0) |
| 167 | |
| 168 | /* |
| 169 | *	VAX subtypes (these do *not* necessary conform to the actual cpu |
| 170 | *	ID assigned by DEC available via the SID register). |
| 171 | */ |
| 172 | |
| 173 | #define CPU_SUBTYPE_VAX_ALL ((cpu_subtype_t) 0) |
| 174 | #define CPU_SUBTYPE_VAX780 ((cpu_subtype_t) 1) |
| 175 | #define CPU_SUBTYPE_VAX785 ((cpu_subtype_t) 2) |
| 176 | #define CPU_SUBTYPE_VAX750 ((cpu_subtype_t) 3) |
| 177 | #define CPU_SUBTYPE_VAX730 ((cpu_subtype_t) 4) |
| 178 | #define CPU_SUBTYPE_UVAXI ((cpu_subtype_t) 5) |
| 179 | #define CPU_SUBTYPE_UVAXII ((cpu_subtype_t) 6) |
| 180 | #define CPU_SUBTYPE_VAX8200 ((cpu_subtype_t) 7) |
| 181 | #define CPU_SUBTYPE_VAX8500 ((cpu_subtype_t) 8) |
| 182 | #define CPU_SUBTYPE_VAX8600 ((cpu_subtype_t) 9) |
| 183 | #define CPU_SUBTYPE_VAX8650 ((cpu_subtype_t) 10) |
| 184 | #define CPU_SUBTYPE_VAX8800 ((cpu_subtype_t) 11) |
| 185 | #define CPU_SUBTYPE_UVAXIII ((cpu_subtype_t) 12) |
| 186 | |
| 187 | /* |
| 188 | * 680x0 subtypes |
| 189 | * |
| 190 | * The subtype definitions here are unusual for historical reasons. |
| 191 | * NeXT used to consider 68030 code as generic 68000 code. For |
| 192 | * backwards compatability: |
| 193 | * |
| 194 | *	CPU_SUBTYPE_MC68030 symbol has been preserved for source code |
| 195 | *	compatability. |
| 196 | * |
| 197 | *	CPU_SUBTYPE_MC680x0_ALL has been defined to be the same |
| 198 | *	subtype as CPU_SUBTYPE_MC68030 for binary comatability. |
| 199 | * |
| 200 | *	CPU_SUBTYPE_MC68030_ONLY has been added to allow new object |
| 201 | *	files to be tagged as containing 68030-specific instructions. |
| 202 | */ |
| 203 | |
| 204 | #define CPU_SUBTYPE_MC680x0_ALL ((cpu_subtype_t) 1) |
| 205 | #define CPU_SUBTYPE_MC68030 ((cpu_subtype_t) 1) /* compat */ |
| 206 | #define CPU_SUBTYPE_MC68040 ((cpu_subtype_t) 2) |
| 207 | #define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3) |
| 208 | |
| 209 | /* |
| 210 | *	I386 subtypes |
| 211 | */ |
| 212 | |
| 213 | #define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4)) |
| 214 | |
| 215 | #define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0) |
| 216 | #define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0) |
| 217 | #define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0) |
| 218 | #define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128 |
| 219 | #define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0) |
| 220 | #define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0) |
| 221 | #define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1) |
| 222 | #define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3) |
| 223 | #define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5) |
| 224 | #define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6) |
| 225 | #define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7) |
| 226 | #define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0) |
| 227 | #define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1) |
| 228 | #define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2) |
| 229 | #define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0) |
| 230 | #define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0) |
| 231 | #define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1) |
| 232 | #define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0) |
| 233 | #define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1) |
| 234 | #define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0) |
| 235 | #define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1) |
| 236 | |
| 237 | #define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15) |
| 238 | #define CPU_SUBTYPE_INTEL_FAMILY_MAX 15 |
| 239 | |
| 240 | #define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4) |
| 241 | #define CPU_SUBTYPE_INTEL_MODEL_ALL 0 |
| 242 | |
| 243 | /* |
| 244 | *	X86 subtypes. |
| 245 | */ |
| 246 | |
| 247 | #define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3) |
| 248 | #define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3) |
| 249 | #define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4) |
| 250 | #define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t)8) /* Haswell feature subset */ |
| 251 | |
| 252 | |
| 253 | #define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1) |
| 254 | |
| 255 | /* |
| 256 | *	Mips subtypes. |
| 257 | */ |
| 258 | |
| 259 | #define CPU_SUBTYPE_MIPS_ALL ((cpu_subtype_t) 0) |
| 260 | #define CPU_SUBTYPE_MIPS_R2300 ((cpu_subtype_t) 1) |
| 261 | #define CPU_SUBTYPE_MIPS_R2600 ((cpu_subtype_t) 2) |
| 262 | #define CPU_SUBTYPE_MIPS_R2800 ((cpu_subtype_t) 3) |
| 263 | #define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4) /* pmax */ |
| 264 | #define CPU_SUBTYPE_MIPS_R2000 ((cpu_subtype_t) 5) |
| 265 | #define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6) /* 3max */ |
| 266 | #define CPU_SUBTYPE_MIPS_R3000 ((cpu_subtype_t) 7) |
| 267 | |
| 268 | /* |
| 269 | *	MC98000 (PowerPC) subtypes |
| 270 | */ |
| 271 | #define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0) |
| 272 | #define CPU_SUBTYPE_MC98601 ((cpu_subtype_t) 1) |
| 273 | |
| 274 | /* |
| 275 | *	HPPA subtypes for Hewlett-Packard HP-PA family of |
| 276 | *	risc processors. Port by NeXT to 700 series. |
| 277 | */ |
| 278 | |
| 279 | #define CPU_SUBTYPE_HPPA_ALL ((cpu_subtype_t) 0) |
| 280 | #define CPU_SUBTYPE_HPPA_7100 ((cpu_subtype_t) 0) /* compat */ |
| 281 | #define CPU_SUBTYPE_HPPA_7100LC ((cpu_subtype_t) 1) |
| 282 | |
| 283 | /* |
| 284 | *	MC88000 subtypes. |
| 285 | */ |
| 286 | #define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0) |
| 287 | #define CPU_SUBTYPE_MC88100 ((cpu_subtype_t) 1) |
| 288 | #define CPU_SUBTYPE_MC88110 ((cpu_subtype_t) 2) |
| 289 | |
| 290 | /* |
| 291 | *	SPARC subtypes |
| 292 | */ |
| 293 | #define CPU_SUBTYPE_SPARC_ALL ((cpu_subtype_t) 0) |
| 294 | |
| 295 | /* |
| 296 | *	I860 subtypes |
| 297 | */ |
| 298 | #define CPU_SUBTYPE_I860_ALL ((cpu_subtype_t) 0) |
| 299 | #define CPU_SUBTYPE_I860_860 ((cpu_subtype_t) 1) |
| 300 | |
| 301 | /* |
| 302 | *	PowerPC subtypes |
| 303 | */ |
| 304 | #define CPU_SUBTYPE_POWERPC_ALL ((cpu_subtype_t) 0) |
| 305 | #define CPU_SUBTYPE_POWERPC_601 ((cpu_subtype_t) 1) |
| 306 | #define CPU_SUBTYPE_POWERPC_602 ((cpu_subtype_t) 2) |
| 307 | #define CPU_SUBTYPE_POWERPC_603 ((cpu_subtype_t) 3) |
| 308 | #define CPU_SUBTYPE_POWERPC_603e ((cpu_subtype_t) 4) |
| 309 | #define CPU_SUBTYPE_POWERPC_603ev ((cpu_subtype_t) 5) |
| 310 | #define CPU_SUBTYPE_POWERPC_604 ((cpu_subtype_t) 6) |
| 311 | #define CPU_SUBTYPE_POWERPC_604e ((cpu_subtype_t) 7) |
| 312 | #define CPU_SUBTYPE_POWERPC_620 ((cpu_subtype_t) 8) |
| 313 | #define CPU_SUBTYPE_POWERPC_750 ((cpu_subtype_t) 9) |
| 314 | #define CPU_SUBTYPE_POWERPC_7400 ((cpu_subtype_t) 10) |
| 315 | #define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11) |
| 316 | #define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100) |
| 317 | |
| 318 | /* |
| 319 | *	ARM subtypes |
| 320 | */ |
| 321 | #define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0) |
| 322 | #define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5) |
| 323 | #define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6) |
| 324 | #define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7) |
| 325 | #define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8) |
| 326 | #define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9) /* ARMv7-A and ARMv7-R */ |
| 327 | #define CPU_SUBTYPE_ARM_V7F ((cpu_subtype_t) 10) /* Cortex A9 */ |
| 328 | #define CPU_SUBTYPE_ARM_V7S ((cpu_subtype_t) 11) /* Swift */ |
| 329 | #define CPU_SUBTYPE_ARM_V7K ((cpu_subtype_t) 12) |
| 330 | #define CPU_SUBTYPE_ARM_V8 ((cpu_subtype_t) 13) |
| 331 | #define CPU_SUBTYPE_ARM_V6M ((cpu_subtype_t) 14) /* Not meant to be run under xnu */ |
| 332 | #define CPU_SUBTYPE_ARM_V7M ((cpu_subtype_t) 15) /* Not meant to be run under xnu */ |
| 333 | #define CPU_SUBTYPE_ARM_V7EM ((cpu_subtype_t) 16) /* Not meant to be run under xnu */ |
| 334 | #define CPU_SUBTYPE_ARM_V8M ((cpu_subtype_t) 17) /* Not meant to be run under xnu */ |
| 335 | #define CPU_SUBTYPE_ARM_V8M_MAIN CPU_SUBTYPE_ARM_V8M /* Not meant to be run under xnu */ |
| 336 | #define CPU_SUBTYPE_ARM_V8M_BASE ((cpu_subtype_t) 18) /* Not meant to be run under xnu */ |
| 337 | #define CPU_SUBTYPE_ARM_V8_1M_MAIN ((cpu_subtype_t) 19) /* Not meant to be run under xnu */ |
| 338 | |
| 339 | /* |
| 340 | * ARM64 subtypes |
| 341 | */ |
| 342 | #define CPU_SUBTYPE_ARM64_ALL ((cpu_subtype_t) 0) |
| 343 | #define CPU_SUBTYPE_ARM64_V8 ((cpu_subtype_t) 1) |
| 344 | #define CPU_SUBTYPE_ARM64E ((cpu_subtype_t) 2) |
| 345 | |
| 346 | /* CPU subtype feature flags for ptrauth on arm64e platforms */ |
| 347 | #define CPU_SUBTYPE_ARM64_PTR_AUTH_MASK 0x0f000000 |
| 348 | #define CPU_SUBTYPE_ARM64_PTR_AUTH_VERSION(x) (((x) & CPU_SUBTYPE_ARM64_PTR_AUTH_MASK) >> 24) |
| 349 | |
| 350 | /* |
| 351 | * ARM64_32 subtypes |
| 352 | */ |
| 353 | #define CPU_SUBTYPE_ARM64_32_ALL ((cpu_subtype_t) 0) |
| 354 | #define CPU_SUBTYPE_ARM64_32_V8 ((cpu_subtype_t) 1) |
| 355 | |
| 356 | |
| 357 | #endif /* !__ASSEMBLER__ */ |
| 358 | |
| 359 | /* |
| 360 | *	CPU families (sysctl hw.cpufamily) |
| 361 | * |
| 362 | * These are meant to identify the CPU's marketing name - an |
| 363 | * application can map these to (possibly) localized strings. |
| 364 | * NB: the encodings of the CPU families are intentionally arbitrary. |
| 365 | * There is no ordering, and you should never try to deduce whether |
| 366 | * or not some feature is available based on the family. |
| 367 | * Use feature flags (eg, hw.optional.altivec) to test for optional |
| 368 | * functionality. |
| 369 | */ |
| 370 | #define CPUFAMILY_UNKNOWN 0 |
| 371 | #define CPUFAMILY_POWERPC_G3 0xcee41549 |
| 372 | #define CPUFAMILY_POWERPC_G4 0x77c184ae |
| 373 | #define CPUFAMILY_POWERPC_G5 0xed76d8aa |
| 374 | #define CPUFAMILY_INTEL_6_13 0xaa33392b |
| 375 | #define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc |
| 376 | #define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2 |
| 377 | #define CPUFAMILY_INTEL_WESTMERE 0x573b5eec |
| 378 | #define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c |
| 379 | #define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835 |
| 380 | #define CPUFAMILY_INTEL_HASWELL 0x10b282dc |
| 381 | #define CPUFAMILY_INTEL_BROADWELL 0x582ed09c |
| 382 | #define CPUFAMILY_INTEL_SKYLAKE 0x37fc219f |
| 383 | #define CPUFAMILY_INTEL_KABYLAKE 0x0f817246 |
| 384 | #define CPUFAMILY_INTEL_ICELAKE 0x38435547 |
| 385 | #define CPUFAMILY_INTEL_COMETLAKE 0x1cf8a03e |
| 386 | #define CPUFAMILY_ARM_9 0xe73283ae |
| 387 | #define CPUFAMILY_ARM_11 0x8ff620d8 |
| 388 | #define CPUFAMILY_ARM_XSCALE 0x53b005f5 |
| 389 | #define CPUFAMILY_ARM_12 0xbd1b0ae9 |
| 390 | #define CPUFAMILY_ARM_13 0x0cc90e64 |
| 391 | #define CPUFAMILY_ARM_14 0x96077ef1 |
| 392 | #define CPUFAMILY_ARM_15 0xa8511bca |
| 393 | #define CPUFAMILY_ARM_SWIFT 0x1e2d6381 |
| 394 | #define CPUFAMILY_ARM_CYCLONE 0x37a09642 |
| 395 | #define CPUFAMILY_ARM_TYPHOON 0x2c91a47e |
| 396 | #define CPUFAMILY_ARM_TWISTER 0x92fb37c8 |
| 397 | #define CPUFAMILY_ARM_HURRICANE 0x67ceee93 |
| 398 | #define CPUFAMILY_ARM_MONSOON_MISTRAL 0xe81e7ef6 |
| 399 | #define CPUFAMILY_ARM_VORTEX_TEMPEST 0x07d34b9f |
| 400 | #define CPUFAMILY_ARM_LIGHTNING_THUNDER 0x462504d2 |
| 401 | #define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1b588bb3 |
| 402 | #define CPUFAMILY_ARM_BLIZZARD_AVALANCHE 0xda33d83d |
| 403 | #define CPUFAMILY_ARM_EVEREST_SAWTOOTH 0x8765edea |
| 404 | #define CPUFAMILY_ARM_IBIZA 0xfa33415e |
| 405 | #define CPUFAMILY_ARM_PALMA 0x72015832 |
| 406 | #define CPUFAMILY_ARM_COLL 0x2876f5b5 |
| 407 | #define CPUFAMILY_ARM_LOBOS 0x5f4dea93 |
| 408 | #define CPUFAMILY_ARM_DONAN 0x6f5129ac |
| 409 | #define CPUFAMILY_ARM_BRAVA 0x17d5b93a |
| 410 | #define CPUFAMILY_ARM_TAHITI 0x75d4acb9 |
| 411 | #define CPUFAMILY_ARM_TUPAI 0x204526d0 |
| 412 | #define CPUFAMILY_ARM_HIDRA 0x1d5a87e8 |
| 413 | #define CPUFAMILY_ARM_SOTRA 0xf76c5b1a |
| 414 | #define CPUFAMILY_ARM_THERA 0xab345f09 |
| 415 | #define CPUFAMILY_ARM_TILOS 0x01d7a72b |
| 416 | |
| 417 | /* Described in rdar://64125549 */ |
| 418 | #define CPUSUBFAMILY_UNKNOWN 0 |
| 419 | #define CPUSUBFAMILY_ARM_HP 1 |
| 420 | #define CPUSUBFAMILY_ARM_HG 2 |
| 421 | #define CPUSUBFAMILY_ARM_M 3 |
| 422 | #define CPUSUBFAMILY_ARM_HS 4 |
| 423 | #define CPUSUBFAMILY_ARM_HC_HD 5 |
| 424 | #define CPUSUBFAMILY_ARM_HA 6 |
| 425 | |
| 426 | /* The following synonyms are deprecated: */ |
| 427 | #define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN |
| 428 | #define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM |
| 429 | |
| 430 | |
| 431 | #endif /* _MACH_MACHINE_H_ */ |