| 1 | /*! @header |
| 2 | * The interfaces declared in this header provide logical and bitwise |
| 3 | * operations on vectors. Some of these function operate elementwise, |
| 4 | * and some produce a scalar result that depends on all lanes of the input. |
| 5 | * |
| 6 | * For functions returning a boolean value, the return type in C and |
| 7 | * Objective-C is _Bool; for C++ it is bool. |
| 8 | * |
| 9 | * Function Result |
| 10 | * ------------------------------------------------------------------ |
| 11 | * simd_all(comparison) True if and only if the comparison is true |
| 12 | * in every vector lane. e.g.: |
| 13 | * |
| 14 | * if (simd_all(x == 0.0f)) { |
| 15 | * // executed if every lane of x |
| 16 | * // contains zero. |
| 17 | * } |
| 18 | * |
| 19 | * The precise function of simd_all is to |
| 20 | * return the high-order bit of the result |
| 21 | * of a horizontal bitwise AND of all vector |
| 22 | * lanes. |
| 23 | * |
| 24 | * simd_any(comparison) True if and only if the comparison is true |
| 25 | * in at least one vector lane. e.g.: |
| 26 | * |
| 27 | * if (simd_any(x < 0.0f)) { |
| 28 | * // executed if any lane of x |
| 29 | * // contains a negative value. |
| 30 | * } |
| 31 | * |
| 32 | * The precise function of simd_all is to |
| 33 | * return the high-order bit of the result |
| 34 | * of a horizontal bitwise OR of all vector |
| 35 | * lanes. |
| 36 | * |
| 37 | * simd_select(x,y,mask) For each lane in the result, selects the |
| 38 | * corresponding element of x if the high- |
| 39 | * order bit of the corresponding element of |
| 40 | * mask is 0, and the corresponding element |
| 41 | * of y otherwise. |
| 42 | * |
| 43 | * simd_bitselect(x,y,mask) For each bit in the result, selects the |
| 44 | * corresponding bit of x if the corresponding |
| 45 | * bit of mask is clear, and the corresponding |
| 46 | * of y otherwise. |
| 47 | * |
| 48 | * In C++, these functions are available under the simd:: namespace: |
| 49 | * |
| 50 | * C++ Function Equivalent C Function |
| 51 | * -------------------------------------------------------------------- |
| 52 | * simd::all(comparison) simd_all(comparison) |
| 53 | * simd::any(comparison) simd_any(comparison) |
| 54 | * simd::select(x,y,mask) simd_select(x,y,mask) |
| 55 | * simd::bitselect(x,y,mask) simd_bitselect(x,y,mask) |
| 56 | * |
| 57 | * @copyright 2014-2017 Apple, Inc. All rights reserved. |
| 58 | * @unsorted */ |
| 59 | |
| 60 | #ifndef SIMD_LOGIC_HEADER |
| 61 | #define SIMD_LOGIC_HEADER |
| 62 | |
| 63 | #include <simd/base.h> |
| 64 | #if SIMD_COMPILER_HAS_REQUIRED_FEATURES |
| 65 | #include <simd/vector_make.h> |
| 66 | #include <stdint.h> |
| 67 | |
| 68 | #ifdef __cplusplus |
| 69 | extern "C" { |
| 70 | #endif |
| 71 | |
| 72 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 73 | * vector is set. */ |
| 74 | static inline SIMD_CFUNC simd_bool simd_any(simd_char2 x); |
| 75 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 76 | * vector is set. */ |
| 77 | static inline SIMD_CFUNC simd_bool simd_any(simd_char3 x); |
| 78 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 79 | * vector is set. */ |
| 80 | static inline SIMD_CFUNC simd_bool simd_any(simd_char4 x); |
| 81 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 82 | * vector is set. */ |
| 83 | static inline SIMD_CFUNC simd_bool simd_any(simd_char8 x); |
| 84 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 85 | * vector is set. */ |
| 86 | static inline SIMD_CFUNC simd_bool simd_any(simd_char16 x); |
| 87 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 88 | * vector is set. */ |
| 89 | static inline SIMD_CFUNC simd_bool simd_any(simd_char32 x); |
| 90 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 91 | * vector is set. */ |
| 92 | static inline SIMD_CFUNC simd_bool simd_any(simd_char64 x); |
| 93 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 94 | * vector is set. */ |
| 95 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar2 x); |
| 96 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 97 | * vector is set. */ |
| 98 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar3 x); |
| 99 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 100 | * vector is set. */ |
| 101 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar4 x); |
| 102 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 103 | * vector is set. */ |
| 104 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar8 x); |
| 105 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 106 | * vector is set. */ |
| 107 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar16 x); |
| 108 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 109 | * vector is set. */ |
| 110 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar32 x); |
| 111 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 112 | * vector is set. */ |
| 113 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar64 x); |
| 114 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 115 | * vector is set. */ |
| 116 | static inline SIMD_CFUNC simd_bool simd_any(simd_short2 x); |
| 117 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 118 | * vector is set. */ |
| 119 | static inline SIMD_CFUNC simd_bool simd_any(simd_short3 x); |
| 120 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 121 | * vector is set. */ |
| 122 | static inline SIMD_CFUNC simd_bool simd_any(simd_short4 x); |
| 123 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 124 | * vector is set. */ |
| 125 | static inline SIMD_CFUNC simd_bool simd_any(simd_short8 x); |
| 126 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 127 | * vector is set. */ |
| 128 | static inline SIMD_CFUNC simd_bool simd_any(simd_short16 x); |
| 129 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 130 | * vector is set. */ |
| 131 | static inline SIMD_CFUNC simd_bool simd_any(simd_short32 x); |
| 132 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 133 | * vector is set. */ |
| 134 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort2 x); |
| 135 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 136 | * vector is set. */ |
| 137 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort3 x); |
| 138 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 139 | * vector is set. */ |
| 140 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort4 x); |
| 141 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 142 | * vector is set. */ |
| 143 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort8 x); |
| 144 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 145 | * vector is set. */ |
| 146 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort16 x); |
| 147 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 148 | * vector is set. */ |
| 149 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort32 x); |
| 150 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 151 | * vector is set. */ |
| 152 | static inline SIMD_CFUNC simd_bool simd_any(simd_int2 x); |
| 153 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 154 | * vector is set. */ |
| 155 | static inline SIMD_CFUNC simd_bool simd_any(simd_int3 x); |
| 156 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 157 | * vector is set. */ |
| 158 | static inline SIMD_CFUNC simd_bool simd_any(simd_int4 x); |
| 159 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 160 | * vector is set. */ |
| 161 | static inline SIMD_CFUNC simd_bool simd_any(simd_int8 x); |
| 162 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 163 | * vector is set. */ |
| 164 | static inline SIMD_CFUNC simd_bool simd_any(simd_int16 x); |
| 165 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 166 | * vector is set. */ |
| 167 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint2 x); |
| 168 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 169 | * vector is set. */ |
| 170 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint3 x); |
| 171 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 172 | * vector is set. */ |
| 173 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint4 x); |
| 174 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 175 | * vector is set. */ |
| 176 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint8 x); |
| 177 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 178 | * vector is set. */ |
| 179 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint16 x); |
| 180 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 181 | * vector is set. */ |
| 182 | static inline SIMD_CFUNC simd_bool simd_any(simd_long2 x); |
| 183 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 184 | * vector is set. */ |
| 185 | static inline SIMD_CFUNC simd_bool simd_any(simd_long3 x); |
| 186 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 187 | * vector is set. */ |
| 188 | static inline SIMD_CFUNC simd_bool simd_any(simd_long4 x); |
| 189 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 190 | * vector is set. */ |
| 191 | static inline SIMD_CFUNC simd_bool simd_any(simd_long8 x); |
| 192 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 193 | * vector is set. */ |
| 194 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong2 x); |
| 195 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 196 | * vector is set. */ |
| 197 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong3 x); |
| 198 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 199 | * vector is set. */ |
| 200 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong4 x); |
| 201 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 202 | * vector is set. */ |
| 203 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong8 x); |
| 204 | /*! @abstract True if and only if the high-order bit of any lane of the |
| 205 | * vector is set. |
| 206 | * @discussion Deprecated. Use simd_any instead. */ |
| 207 | #define vector_any simd_any |
| 208 | |
| 209 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 210 | * vector is set. */ |
| 211 | static inline SIMD_CFUNC simd_bool simd_all(simd_char2 x); |
| 212 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 213 | * vector is set. */ |
| 214 | static inline SIMD_CFUNC simd_bool simd_all(simd_char3 x); |
| 215 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 216 | * vector is set. */ |
| 217 | static inline SIMD_CFUNC simd_bool simd_all(simd_char4 x); |
| 218 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 219 | * vector is set. */ |
| 220 | static inline SIMD_CFUNC simd_bool simd_all(simd_char8 x); |
| 221 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 222 | * vector is set. */ |
| 223 | static inline SIMD_CFUNC simd_bool simd_all(simd_char16 x); |
| 224 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 225 | * vector is set. */ |
| 226 | static inline SIMD_CFUNC simd_bool simd_all(simd_char32 x); |
| 227 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 228 | * vector is set. */ |
| 229 | static inline SIMD_CFUNC simd_bool simd_all(simd_char64 x); |
| 230 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 231 | * vector is set. */ |
| 232 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar2 x); |
| 233 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 234 | * vector is set. */ |
| 235 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar3 x); |
| 236 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 237 | * vector is set. */ |
| 238 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar4 x); |
| 239 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 240 | * vector is set. */ |
| 241 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar8 x); |
| 242 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 243 | * vector is set. */ |
| 244 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar16 x); |
| 245 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 246 | * vector is set. */ |
| 247 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar32 x); |
| 248 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 249 | * vector is set. */ |
| 250 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar64 x); |
| 251 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 252 | * vector is set. */ |
| 253 | static inline SIMD_CFUNC simd_bool simd_all(simd_short2 x); |
| 254 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 255 | * vector is set. */ |
| 256 | static inline SIMD_CFUNC simd_bool simd_all(simd_short3 x); |
| 257 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 258 | * vector is set. */ |
| 259 | static inline SIMD_CFUNC simd_bool simd_all(simd_short4 x); |
| 260 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 261 | * vector is set. */ |
| 262 | static inline SIMD_CFUNC simd_bool simd_all(simd_short8 x); |
| 263 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 264 | * vector is set. */ |
| 265 | static inline SIMD_CFUNC simd_bool simd_all(simd_short16 x); |
| 266 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 267 | * vector is set. */ |
| 268 | static inline SIMD_CFUNC simd_bool simd_all(simd_short32 x); |
| 269 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 270 | * vector is set. */ |
| 271 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort2 x); |
| 272 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 273 | * vector is set. */ |
| 274 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort3 x); |
| 275 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 276 | * vector is set. */ |
| 277 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort4 x); |
| 278 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 279 | * vector is set. */ |
| 280 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort8 x); |
| 281 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 282 | * vector is set. */ |
| 283 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort16 x); |
| 284 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 285 | * vector is set. */ |
| 286 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort32 x); |
| 287 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 288 | * vector is set. */ |
| 289 | static inline SIMD_CFUNC simd_bool simd_all(simd_int2 x); |
| 290 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 291 | * vector is set. */ |
| 292 | static inline SIMD_CFUNC simd_bool simd_all(simd_int3 x); |
| 293 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 294 | * vector is set. */ |
| 295 | static inline SIMD_CFUNC simd_bool simd_all(simd_int4 x); |
| 296 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 297 | * vector is set. */ |
| 298 | static inline SIMD_CFUNC simd_bool simd_all(simd_int8 x); |
| 299 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 300 | * vector is set. */ |
| 301 | static inline SIMD_CFUNC simd_bool simd_all(simd_int16 x); |
| 302 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 303 | * vector is set. */ |
| 304 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint2 x); |
| 305 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 306 | * vector is set. */ |
| 307 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint3 x); |
| 308 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 309 | * vector is set. */ |
| 310 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint4 x); |
| 311 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 312 | * vector is set. */ |
| 313 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint8 x); |
| 314 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 315 | * vector is set. */ |
| 316 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint16 x); |
| 317 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 318 | * vector is set. */ |
| 319 | static inline SIMD_CFUNC simd_bool simd_all(simd_long2 x); |
| 320 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 321 | * vector is set. */ |
| 322 | static inline SIMD_CFUNC simd_bool simd_all(simd_long3 x); |
| 323 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 324 | * vector is set. */ |
| 325 | static inline SIMD_CFUNC simd_bool simd_all(simd_long4 x); |
| 326 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 327 | * vector is set. */ |
| 328 | static inline SIMD_CFUNC simd_bool simd_all(simd_long8 x); |
| 329 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 330 | * vector is set. */ |
| 331 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong2 x); |
| 332 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 333 | * vector is set. */ |
| 334 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong3 x); |
| 335 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 336 | * vector is set. */ |
| 337 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong4 x); |
| 338 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 339 | * vector is set. */ |
| 340 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong8 x); |
| 341 | /*! @abstract True if and only if the high-order bit of every lane of the |
| 342 | * vector is set. |
| 343 | * @discussion Deprecated. Use simd_all instead. */ |
| 344 | #define vector_all simd_all |
| 345 | |
| 346 | /*! @abstract For each lane in the result, selects the corresponding element |
| 347 | * of x or y according to whether the high-order bit of the corresponding |
| 348 | * lane of mask is 0 or 1, respectively. */ |
| 349 | static inline SIMD_CFUNC simd_half2 simd_select(simd_half2 x, simd_half2 y, simd_short2 mask); |
| 350 | /*! @abstract For each lane in the result, selects the corresponding element |
| 351 | * of x or y according to whether the high-order bit of the corresponding |
| 352 | * lane of mask is 0 or 1, respectively. */ |
| 353 | static inline SIMD_CFUNC simd_half3 simd_select(simd_half3 x, simd_half3 y, simd_short3 mask); |
| 354 | /*! @abstract For each lane in the result, selects the corresponding element |
| 355 | * of x or y according to whether the high-order bit of the corresponding |
| 356 | * lane of mask is 0 or 1, respectively. */ |
| 357 | static inline SIMD_CFUNC simd_half4 simd_select(simd_half4 x, simd_half4 y, simd_short4 mask); |
| 358 | /*! @abstract For each lane in the result, selects the corresponding element |
| 359 | * of x or y according to whether the high-order bit of the corresponding |
| 360 | * lane of mask is 0 or 1, respectively. */ |
| 361 | static inline SIMD_CFUNC simd_half8 simd_select(simd_half8 x, simd_half8 y, simd_short8 mask); |
| 362 | /*! @abstract For each lane in the result, selects the corresponding element |
| 363 | * of x or y according to whether the high-order bit of the corresponding |
| 364 | * lane of mask is 0 or 1, respectively. */ |
| 365 | static inline SIMD_CFUNC simd_half16 simd_select(simd_half16 x, simd_half16 y, simd_short16 mask); |
| 366 | /*! @abstract For each lane in the result, selects the corresponding element |
| 367 | * of x or y according to whether the high-order bit of the corresponding |
| 368 | * lane of mask is 0 or 1, respectively. */ |
| 369 | static inline SIMD_CFUNC simd_half32 simd_select(simd_half32 x, simd_half32 y, simd_short32 mask); |
| 370 | /*! @abstract For each lane in the result, selects the corresponding element |
| 371 | * of x or y according to whether the high-order bit of the corresponding |
| 372 | * lane of mask is 0 or 1, respectively. */ |
| 373 | static inline SIMD_CFUNC simd_float2 simd_select(simd_float2 x, simd_float2 y, simd_int2 mask); |
| 374 | /*! @abstract For each lane in the result, selects the corresponding element |
| 375 | * of x or y according to whether the high-order bit of the corresponding |
| 376 | * lane of mask is 0 or 1, respectively. */ |
| 377 | static inline SIMD_CFUNC simd_float3 simd_select(simd_float3 x, simd_float3 y, simd_int3 mask); |
| 378 | /*! @abstract For each lane in the result, selects the corresponding element |
| 379 | * of x or y according to whether the high-order bit of the corresponding |
| 380 | * lane of mask is 0 or 1, respectively. */ |
| 381 | static inline SIMD_CFUNC simd_float4 simd_select(simd_float4 x, simd_float4 y, simd_int4 mask); |
| 382 | /*! @abstract For each lane in the result, selects the corresponding element |
| 383 | * of x or y according to whether the high-order bit of the corresponding |
| 384 | * lane of mask is 0 or 1, respectively. */ |
| 385 | static inline SIMD_CFUNC simd_float8 simd_select(simd_float8 x, simd_float8 y, simd_int8 mask); |
| 386 | /*! @abstract For each lane in the result, selects the corresponding element |
| 387 | * of x or y according to whether the high-order bit of the corresponding |
| 388 | * lane of mask is 0 or 1, respectively. */ |
| 389 | static inline SIMD_CFUNC simd_float16 simd_select(simd_float16 x, simd_float16 y, simd_int16 mask); |
| 390 | /*! @abstract For each lane in the result, selects the corresponding element |
| 391 | * of x or y according to whether the high-order bit of the corresponding |
| 392 | * lane of mask is 0 or 1, respectively. */ |
| 393 | static inline SIMD_CFUNC simd_double2 simd_select(simd_double2 x, simd_double2 y, simd_long2 mask); |
| 394 | /*! @abstract For each lane in the result, selects the corresponding element |
| 395 | * of x or y according to whether the high-order bit of the corresponding |
| 396 | * lane of mask is 0 or 1, respectively. */ |
| 397 | static inline SIMD_CFUNC simd_double3 simd_select(simd_double3 x, simd_double3 y, simd_long3 mask); |
| 398 | /*! @abstract For each lane in the result, selects the corresponding element |
| 399 | * of x or y according to whether the high-order bit of the corresponding |
| 400 | * lane of mask is 0 or 1, respectively. */ |
| 401 | static inline SIMD_CFUNC simd_double4 simd_select(simd_double4 x, simd_double4 y, simd_long4 mask); |
| 402 | /*! @abstract For each lane in the result, selects the corresponding element |
| 403 | * of x or y according to whether the high-order bit of the corresponding |
| 404 | * lane of mask is 0 or 1, respectively. */ |
| 405 | static inline SIMD_CFUNC simd_double8 simd_select(simd_double8 x, simd_double8 y, simd_long8 mask); |
| 406 | /*! @abstract For each lane in the result, selects the corresponding element |
| 407 | * of x or y according to whether the high-order bit of the corresponding |
| 408 | * lane of mask is 0 or 1, respectively. |
| 409 | * @discussion Deprecated. Use simd_select instead. */ |
| 410 | #define vector_select simd_select |
| 411 | |
| 412 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 413 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 414 | * respectively. */ |
| 415 | static inline SIMD_CFUNC simd_char2 simd_bitselect(simd_char2 x, simd_char2 y, simd_char2 mask); |
| 416 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 417 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 418 | * respectively. */ |
| 419 | static inline SIMD_CFUNC simd_char3 simd_bitselect(simd_char3 x, simd_char3 y, simd_char3 mask); |
| 420 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 421 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 422 | * respectively. */ |
| 423 | static inline SIMD_CFUNC simd_char4 simd_bitselect(simd_char4 x, simd_char4 y, simd_char4 mask); |
| 424 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 425 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 426 | * respectively. */ |
| 427 | static inline SIMD_CFUNC simd_char8 simd_bitselect(simd_char8 x, simd_char8 y, simd_char8 mask); |
| 428 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 429 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 430 | * respectively. */ |
| 431 | static inline SIMD_CFUNC simd_char16 simd_bitselect(simd_char16 x, simd_char16 y, simd_char16 mask); |
| 432 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 433 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 434 | * respectively. */ |
| 435 | static inline SIMD_CFUNC simd_char32 simd_bitselect(simd_char32 x, simd_char32 y, simd_char32 mask); |
| 436 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 437 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 438 | * respectively. */ |
| 439 | static inline SIMD_CFUNC simd_char64 simd_bitselect(simd_char64 x, simd_char64 y, simd_char64 mask); |
| 440 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 441 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 442 | * respectively. */ |
| 443 | static inline SIMD_CFUNC simd_uchar2 simd_bitselect(simd_uchar2 x, simd_uchar2 y, simd_char2 mask); |
| 444 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 445 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 446 | * respectively. */ |
| 447 | static inline SIMD_CFUNC simd_uchar3 simd_bitselect(simd_uchar3 x, simd_uchar3 y, simd_char3 mask); |
| 448 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 449 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 450 | * respectively. */ |
| 451 | static inline SIMD_CFUNC simd_uchar4 simd_bitselect(simd_uchar4 x, simd_uchar4 y, simd_char4 mask); |
| 452 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 453 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 454 | * respectively. */ |
| 455 | static inline SIMD_CFUNC simd_uchar8 simd_bitselect(simd_uchar8 x, simd_uchar8 y, simd_char8 mask); |
| 456 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 457 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 458 | * respectively. */ |
| 459 | static inline SIMD_CFUNC simd_uchar16 simd_bitselect(simd_uchar16 x, simd_uchar16 y, simd_char16 mask); |
| 460 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 461 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 462 | * respectively. */ |
| 463 | static inline SIMD_CFUNC simd_uchar32 simd_bitselect(simd_uchar32 x, simd_uchar32 y, simd_char32 mask); |
| 464 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 465 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 466 | * respectively. */ |
| 467 | static inline SIMD_CFUNC simd_uchar64 simd_bitselect(simd_uchar64 x, simd_uchar64 y, simd_char64 mask); |
| 468 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 469 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 470 | * respectively. */ |
| 471 | static inline SIMD_CFUNC simd_short2 simd_bitselect(simd_short2 x, simd_short2 y, simd_short2 mask); |
| 472 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 473 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 474 | * respectively. */ |
| 475 | static inline SIMD_CFUNC simd_short3 simd_bitselect(simd_short3 x, simd_short3 y, simd_short3 mask); |
| 476 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 477 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 478 | * respectively. */ |
| 479 | static inline SIMD_CFUNC simd_short4 simd_bitselect(simd_short4 x, simd_short4 y, simd_short4 mask); |
| 480 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 481 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 482 | * respectively. */ |
| 483 | static inline SIMD_CFUNC simd_short8 simd_bitselect(simd_short8 x, simd_short8 y, simd_short8 mask); |
| 484 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 485 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 486 | * respectively. */ |
| 487 | static inline SIMD_CFUNC simd_short16 simd_bitselect(simd_short16 x, simd_short16 y, simd_short16 mask); |
| 488 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 489 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 490 | * respectively. */ |
| 491 | static inline SIMD_CFUNC simd_short32 simd_bitselect(simd_short32 x, simd_short32 y, simd_short32 mask); |
| 492 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 493 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 494 | * respectively. */ |
| 495 | static inline SIMD_CFUNC simd_ushort2 simd_bitselect(simd_ushort2 x, simd_ushort2 y, simd_short2 mask); |
| 496 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 497 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 498 | * respectively. */ |
| 499 | static inline SIMD_CFUNC simd_ushort3 simd_bitselect(simd_ushort3 x, simd_ushort3 y, simd_short3 mask); |
| 500 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 501 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 502 | * respectively. */ |
| 503 | static inline SIMD_CFUNC simd_ushort4 simd_bitselect(simd_ushort4 x, simd_ushort4 y, simd_short4 mask); |
| 504 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 505 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 506 | * respectively. */ |
| 507 | static inline SIMD_CFUNC simd_ushort8 simd_bitselect(simd_ushort8 x, simd_ushort8 y, simd_short8 mask); |
| 508 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 509 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 510 | * respectively. */ |
| 511 | static inline SIMD_CFUNC simd_ushort16 simd_bitselect(simd_ushort16 x, simd_ushort16 y, simd_short16 mask); |
| 512 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 513 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 514 | * respectively. */ |
| 515 | static inline SIMD_CFUNC simd_ushort32 simd_bitselect(simd_ushort32 x, simd_ushort32 y, simd_short32 mask); |
| 516 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 517 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 518 | * respectively. */ |
| 519 | static inline SIMD_CFUNC simd_half2 simd_bitselect(simd_half2 x, simd_half2 y, simd_short2 mask); |
| 520 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 521 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 522 | * respectively. */ |
| 523 | static inline SIMD_CFUNC simd_half3 simd_bitselect(simd_half3 x, simd_half3 y, simd_short3 mask); |
| 524 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 525 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 526 | * respectively. */ |
| 527 | static inline SIMD_CFUNC simd_half4 simd_bitselect(simd_half4 x, simd_half4 y, simd_short4 mask); |
| 528 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 529 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 530 | * respectively. */ |
| 531 | static inline SIMD_CFUNC simd_half8 simd_bitselect(simd_half8 x, simd_half8 y, simd_short8 mask); |
| 532 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 533 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 534 | * respectively. */ |
| 535 | static inline SIMD_CFUNC simd_half16 simd_bitselect(simd_half16 x, simd_half16 y, simd_short16 mask); |
| 536 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 537 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 538 | * respectively. */ |
| 539 | static inline SIMD_CFUNC simd_half32 simd_bitselect(simd_half32 x, simd_half32 y, simd_short32 mask); |
| 540 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 541 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 542 | * respectively. */ |
| 543 | static inline SIMD_CFUNC simd_int2 simd_bitselect(simd_int2 x, simd_int2 y, simd_int2 mask); |
| 544 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 545 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 546 | * respectively. */ |
| 547 | static inline SIMD_CFUNC simd_int3 simd_bitselect(simd_int3 x, simd_int3 y, simd_int3 mask); |
| 548 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 549 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 550 | * respectively. */ |
| 551 | static inline SIMD_CFUNC simd_int4 simd_bitselect(simd_int4 x, simd_int4 y, simd_int4 mask); |
| 552 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 553 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 554 | * respectively. */ |
| 555 | static inline SIMD_CFUNC simd_int8 simd_bitselect(simd_int8 x, simd_int8 y, simd_int8 mask); |
| 556 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 557 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 558 | * respectively. */ |
| 559 | static inline SIMD_CFUNC simd_int16 simd_bitselect(simd_int16 x, simd_int16 y, simd_int16 mask); |
| 560 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 561 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 562 | * respectively. */ |
| 563 | static inline SIMD_CFUNC simd_uint2 simd_bitselect(simd_uint2 x, simd_uint2 y, simd_int2 mask); |
| 564 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 565 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 566 | * respectively. */ |
| 567 | static inline SIMD_CFUNC simd_uint3 simd_bitselect(simd_uint3 x, simd_uint3 y, simd_int3 mask); |
| 568 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 569 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 570 | * respectively. */ |
| 571 | static inline SIMD_CFUNC simd_uint4 simd_bitselect(simd_uint4 x, simd_uint4 y, simd_int4 mask); |
| 572 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 573 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 574 | * respectively. */ |
| 575 | static inline SIMD_CFUNC simd_uint8 simd_bitselect(simd_uint8 x, simd_uint8 y, simd_int8 mask); |
| 576 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 577 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 578 | * respectively. */ |
| 579 | static inline SIMD_CFUNC simd_uint16 simd_bitselect(simd_uint16 x, simd_uint16 y, simd_int16 mask); |
| 580 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 581 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 582 | * respectively. */ |
| 583 | static inline SIMD_CFUNC simd_float2 simd_bitselect(simd_float2 x, simd_float2 y, simd_int2 mask); |
| 584 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 585 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 586 | * respectively. */ |
| 587 | static inline SIMD_CFUNC simd_float3 simd_bitselect(simd_float3 x, simd_float3 y, simd_int3 mask); |
| 588 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 589 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 590 | * respectively. */ |
| 591 | static inline SIMD_CFUNC simd_float4 simd_bitselect(simd_float4 x, simd_float4 y, simd_int4 mask); |
| 592 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 593 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 594 | * respectively. */ |
| 595 | static inline SIMD_CFUNC simd_float8 simd_bitselect(simd_float8 x, simd_float8 y, simd_int8 mask); |
| 596 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 597 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 598 | * respectively. */ |
| 599 | static inline SIMD_CFUNC simd_float16 simd_bitselect(simd_float16 x, simd_float16 y, simd_int16 mask); |
| 600 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 601 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 602 | * respectively. */ |
| 603 | static inline SIMD_CFUNC simd_long2 simd_bitselect(simd_long2 x, simd_long2 y, simd_long2 mask); |
| 604 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 605 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 606 | * respectively. */ |
| 607 | static inline SIMD_CFUNC simd_long3 simd_bitselect(simd_long3 x, simd_long3 y, simd_long3 mask); |
| 608 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 609 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 610 | * respectively. */ |
| 611 | static inline SIMD_CFUNC simd_long4 simd_bitselect(simd_long4 x, simd_long4 y, simd_long4 mask); |
| 612 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 613 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 614 | * respectively. */ |
| 615 | static inline SIMD_CFUNC simd_long8 simd_bitselect(simd_long8 x, simd_long8 y, simd_long8 mask); |
| 616 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 617 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 618 | * respectively. */ |
| 619 | static inline SIMD_CFUNC simd_ulong2 simd_bitselect(simd_ulong2 x, simd_ulong2 y, simd_long2 mask); |
| 620 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 621 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 622 | * respectively. */ |
| 623 | static inline SIMD_CFUNC simd_ulong3 simd_bitselect(simd_ulong3 x, simd_ulong3 y, simd_long3 mask); |
| 624 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 625 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 626 | * respectively. */ |
| 627 | static inline SIMD_CFUNC simd_ulong4 simd_bitselect(simd_ulong4 x, simd_ulong4 y, simd_long4 mask); |
| 628 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 629 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 630 | * respectively. */ |
| 631 | static inline SIMD_CFUNC simd_ulong8 simd_bitselect(simd_ulong8 x, simd_ulong8 y, simd_long8 mask); |
| 632 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 633 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 634 | * respectively. */ |
| 635 | static inline SIMD_CFUNC simd_double2 simd_bitselect(simd_double2 x, simd_double2 y, simd_long2 mask); |
| 636 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 637 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 638 | * respectively. */ |
| 639 | static inline SIMD_CFUNC simd_double3 simd_bitselect(simd_double3 x, simd_double3 y, simd_long3 mask); |
| 640 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 641 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 642 | * respectively. */ |
| 643 | static inline SIMD_CFUNC simd_double4 simd_bitselect(simd_double4 x, simd_double4 y, simd_long4 mask); |
| 644 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 645 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 646 | * respectively. */ |
| 647 | static inline SIMD_CFUNC simd_double8 simd_bitselect(simd_double8 x, simd_double8 y, simd_long8 mask); |
| 648 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 649 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 650 | * respectively. |
| 651 | * @discussion Deprecated. Use simd_bitselect instead. */ |
| 652 | #define vector_bitselect simd_bitselect |
| 653 | |
| 654 | #ifdef __cplusplus |
| 655 | } /* extern "C" */ |
| 656 | |
| 657 | namespace simd { |
| 658 | /*! @abstract True if and only if the high-order bit of every lane is set. */ |
| 659 | template <typename inttypeN> static SIMD_CPPFUNC simd_bool all(const inttypeN predicate) { return ::simd_all(predicate); } |
| 660 | /*! @abstract True if and only if the high-order bit of any lane is set. */ |
| 661 | template <typename inttypeN> static SIMD_CPPFUNC simd_bool any(const inttypeN predicate) { return ::simd_any(predicate); } |
| 662 | /*! @abstract Each lane of the result is selected from the corresponding lane |
| 663 | * of x or y according to whether the high-order bit of the corresponding |
| 664 | * lane of mask is 0 or 1, respectively. */ |
| 665 | template <typename inttypeN, typename fptypeN> static SIMD_CPPFUNC fptypeN select(const fptypeN x, const fptypeN y, const inttypeN predicate) { return ::simd_select(x,y,predicate); } |
| 666 | /*! @abstract For each bit in the result, selects the corresponding bit of x |
| 667 | * or y according to whether the corresponding bit of mask is 0 or 1, |
| 668 | * respectively. */ |
| 669 | template <typename inttypeN, typename typeN> static SIMD_CPPFUNC typeN bitselect(const typeN x, const typeN y, const inttypeN mask) { return ::simd_bitselect(x,y,mask); } |
| 670 | } |
| 671 | |
| 672 | extern "C" { |
| 673 | #endif /* __cplusplus */ |
| 674 | |
| 675 | #pragma mark - Implementations |
| 676 | |
| 677 | static inline SIMD_CFUNC simd_bool simd_any(simd_char2 x) { |
| 678 | #if defined __SSE2__ |
| 679 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0x3); |
| 680 | #elif defined __arm64__ || defined __aarch64__ |
| 681 | return simd_any(x.xyxy); |
| 682 | #else |
| 683 | union { uint16_t i; simd_char2 v; } u = { .v = x }; |
| 684 | return (u.i & 0x8080); |
| 685 | #endif |
| 686 | } |
| 687 | static inline SIMD_CFUNC simd_bool simd_any(simd_char3 x) { |
| 688 | #if defined __SSE2__ |
| 689 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0x7); |
| 690 | #elif defined __arm64__ || defined __aarch64__ |
| 691 | return simd_any(x.xyzz); |
| 692 | #else |
| 693 | union { uint32_t i; simd_char3 v; } u = { .v = x }; |
| 694 | return (u.i & 0x808080); |
| 695 | #endif |
| 696 | } |
| 697 | static inline SIMD_CFUNC simd_bool simd_any(simd_char4 x) { |
| 698 | #if defined __SSE2__ |
| 699 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0xf); |
| 700 | #elif defined __arm64__ || defined __aarch64__ |
| 701 | return simd_any(x.xyzwxyzw); |
| 702 | #else |
| 703 | union { uint32_t i; simd_char4 v; } u = { .v = x }; |
| 704 | return (u.i & 0x80808080); |
| 705 | #endif |
| 706 | } |
| 707 | static inline SIMD_CFUNC simd_bool simd_any(simd_char8 x) { |
| 708 | #if defined __SSE2__ |
| 709 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0xff); |
| 710 | #elif defined __arm64__ || defined __aarch64__ |
| 711 | return vmaxv_u8(x) & 0x80; |
| 712 | #else |
| 713 | union { uint64_t i; simd_char8 v; } u = { .v = x }; |
| 714 | return (u.i & 0x8080808080808080); |
| 715 | #endif |
| 716 | } |
| 717 | static inline SIMD_CFUNC simd_bool simd_any(simd_char16 x) { |
| 718 | #if defined __SSE2__ |
| 719 | return _mm_movemask_epi8((__m128i)x); |
| 720 | #elif defined __arm64__ || defined __aarch64__ |
| 721 | return vmaxvq_u8(x) & 0x80; |
| 722 | #else |
| 723 | return simd_any(x.lo | x.hi); |
| 724 | #endif |
| 725 | } |
| 726 | static inline SIMD_CFUNC simd_bool simd_any(simd_char32 x) { |
| 727 | #if defined __AVX2__ |
| 728 | return _mm256_movemask_epi8(x); |
| 729 | #else |
| 730 | return simd_any(x.lo | x.hi); |
| 731 | #endif |
| 732 | } |
| 733 | static inline SIMD_CFUNC simd_bool simd_any(simd_char64 x) { |
| 734 | return simd_any(x.lo | x.hi); |
| 735 | } |
| 736 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar2 x) { |
| 737 | return simd_any((simd_char2)x); |
| 738 | } |
| 739 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar3 x) { |
| 740 | return simd_any((simd_char3)x); |
| 741 | } |
| 742 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar4 x) { |
| 743 | return simd_any((simd_char4)x); |
| 744 | } |
| 745 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar8 x) { |
| 746 | return simd_any((simd_char8)x); |
| 747 | } |
| 748 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar16 x) { |
| 749 | return simd_any((simd_char16)x); |
| 750 | } |
| 751 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar32 x) { |
| 752 | return simd_any((simd_char32)x); |
| 753 | } |
| 754 | static inline SIMD_CFUNC simd_bool simd_any(simd_uchar64 x) { |
| 755 | return simd_any((simd_char64)x); |
| 756 | } |
| 757 | static inline SIMD_CFUNC simd_bool simd_any(simd_short2 x) { |
| 758 | #if defined __SSE2__ |
| 759 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0xa); |
| 760 | #elif defined __arm64__ || defined __aarch64__ |
| 761 | return simd_any(x.xyxy); |
| 762 | #else |
| 763 | union { uint32_t i; simd_short2 v; } u = { .v = x }; |
| 764 | return (u.i & 0x80008000); |
| 765 | #endif |
| 766 | } |
| 767 | static inline SIMD_CFUNC simd_bool simd_any(simd_short3 x) { |
| 768 | #if defined __SSE2__ |
| 769 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0x2a); |
| 770 | #elif defined __arm64__ || defined __aarch64__ |
| 771 | return simd_any(x.xyzz); |
| 772 | #else |
| 773 | union { uint64_t i; simd_short3 v; } u = { .v = x }; |
| 774 | return (u.i & 0x800080008000); |
| 775 | #endif |
| 776 | } |
| 777 | static inline SIMD_CFUNC simd_bool simd_any(simd_short4 x) { |
| 778 | #if defined __SSE2__ |
| 779 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0xaa); |
| 780 | #elif defined __arm64__ || defined __aarch64__ |
| 781 | return vmaxv_u16(x) & 0x8000; |
| 782 | #else |
| 783 | union { uint64_t i; simd_short4 v; } u = { .v = x }; |
| 784 | return (u.i & 0x8000800080008000); |
| 785 | #endif |
| 786 | } |
| 787 | static inline SIMD_CFUNC simd_bool simd_any(simd_short8 x) { |
| 788 | #if defined __SSE2__ |
| 789 | return (_mm_movemask_epi8((__m128i)x) & 0xaaaa); |
| 790 | #elif defined __arm64__ || defined __aarch64__ |
| 791 | return vmaxvq_u16(x) & 0x8000; |
| 792 | #else |
| 793 | return simd_any(x.lo | x.hi); |
| 794 | #endif |
| 795 | } |
| 796 | static inline SIMD_CFUNC simd_bool simd_any(simd_short16 x) { |
| 797 | #if defined __AVX2__ |
| 798 | return (_mm256_movemask_epi8(x) & 0xaaaaaaaa); |
| 799 | #else |
| 800 | return simd_any(x.lo | x.hi); |
| 801 | #endif |
| 802 | } |
| 803 | static inline SIMD_CFUNC simd_bool simd_any(simd_short32 x) { |
| 804 | return simd_any(x.lo | x.hi); |
| 805 | } |
| 806 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort2 x) { |
| 807 | return simd_any((simd_short2)x); |
| 808 | } |
| 809 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort3 x) { |
| 810 | return simd_any((simd_short3)x); |
| 811 | } |
| 812 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort4 x) { |
| 813 | return simd_any((simd_short4)x); |
| 814 | } |
| 815 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort8 x) { |
| 816 | return simd_any((simd_short8)x); |
| 817 | } |
| 818 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort16 x) { |
| 819 | return simd_any((simd_short16)x); |
| 820 | } |
| 821 | static inline SIMD_CFUNC simd_bool simd_any(simd_ushort32 x) { |
| 822 | return simd_any((simd_short32)x); |
| 823 | } |
| 824 | static inline SIMD_CFUNC simd_bool simd_any(simd_int2 x) { |
| 825 | #if defined __SSE2__ |
| 826 | return (_mm_movemask_ps((__m128)simd_make_int4_undef(x)) & 0x3); |
| 827 | #elif defined __arm64__ || defined __aarch64__ |
| 828 | return vmaxv_u32(x) & 0x80000000; |
| 829 | #else |
| 830 | union { uint64_t i; simd_int2 v; } u = { .v = x }; |
| 831 | return (u.i & 0x8000000080000000); |
| 832 | #endif |
| 833 | } |
| 834 | static inline SIMD_CFUNC simd_bool simd_any(simd_int3 x) { |
| 835 | #if defined __SSE2__ |
| 836 | return (_mm_movemask_ps((__m128)simd_make_int4_undef(x)) & 0x7); |
| 837 | #elif defined __arm64__ || defined __aarch64__ |
| 838 | return simd_any(x.xyzz); |
| 839 | #else |
| 840 | return (x.x | x.y | x.z) & 0x80000000; |
| 841 | #endif |
| 842 | } |
| 843 | static inline SIMD_CFUNC simd_bool simd_any(simd_int4 x) { |
| 844 | #if defined __SSE2__ |
| 845 | return _mm_movemask_ps((__m128)x); |
| 846 | #elif defined __arm64__ || defined __aarch64__ |
| 847 | return vmaxvq_u32(x) & 0x80000000; |
| 848 | #else |
| 849 | return simd_any(x.lo | x.hi); |
| 850 | #endif |
| 851 | } |
| 852 | static inline SIMD_CFUNC simd_bool simd_any(simd_int8 x) { |
| 853 | #if defined __AVX__ |
| 854 | return _mm256_movemask_ps(x); |
| 855 | #else |
| 856 | return simd_any(x.lo | x.hi); |
| 857 | #endif |
| 858 | } |
| 859 | static inline SIMD_CFUNC simd_bool simd_any(simd_int16 x) { |
| 860 | return simd_any(x.lo | x.hi); |
| 861 | } |
| 862 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint2 x) { |
| 863 | return simd_any((simd_int2)x); |
| 864 | } |
| 865 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint3 x) { |
| 866 | return simd_any((simd_int3)x); |
| 867 | } |
| 868 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint4 x) { |
| 869 | return simd_any((simd_int4)x); |
| 870 | } |
| 871 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint8 x) { |
| 872 | return simd_any((simd_int8)x); |
| 873 | } |
| 874 | static inline SIMD_CFUNC simd_bool simd_any(simd_uint16 x) { |
| 875 | return simd_any((simd_int16)x); |
| 876 | } |
| 877 | static inline SIMD_CFUNC simd_bool simd_any(simd_long2 x) { |
| 878 | #if defined __SSE2__ |
| 879 | return _mm_movemask_pd((__m128d)x); |
| 880 | #elif defined __arm64__ || defined __aarch64__ |
| 881 | return (x.x | x.y) & 0x8000000000000000U; |
| 882 | #else |
| 883 | return (x.x | x.y) & 0x8000000000000000U; |
| 884 | #endif |
| 885 | } |
| 886 | static inline SIMD_CFUNC simd_bool simd_any(simd_long3 x) { |
| 887 | #if defined __AVX__ |
| 888 | return (_mm256_movemask_pd(simd_make_long4_undef(x)) & 0x7); |
| 889 | #else |
| 890 | return (x.x | x.y | x.z) & 0x8000000000000000U; |
| 891 | #endif |
| 892 | } |
| 893 | static inline SIMD_CFUNC simd_bool simd_any(simd_long4 x) { |
| 894 | #if defined __AVX__ |
| 895 | return _mm256_movemask_pd(x); |
| 896 | #else |
| 897 | return simd_any(x.lo | x.hi); |
| 898 | #endif |
| 899 | } |
| 900 | static inline SIMD_CFUNC simd_bool simd_any(simd_long8 x) { |
| 901 | return simd_any(x.lo | x.hi); |
| 902 | } |
| 903 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong2 x) { |
| 904 | return simd_any((simd_long2)x); |
| 905 | } |
| 906 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong3 x) { |
| 907 | return simd_any((simd_long3)x); |
| 908 | } |
| 909 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong4 x) { |
| 910 | return simd_any((simd_long4)x); |
| 911 | } |
| 912 | static inline SIMD_CFUNC simd_bool simd_any(simd_ulong8 x) { |
| 913 | return simd_any((simd_long8)x); |
| 914 | } |
| 915 | |
| 916 | static inline SIMD_CFUNC simd_bool simd_all(simd_char2 x) { |
| 917 | #if defined __SSE2__ |
| 918 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0x3) == 0x3; |
| 919 | #elif defined __arm64__ || defined __aarch64__ |
| 920 | return simd_all(x.xyxy); |
| 921 | #else |
| 922 | union { uint16_t i; simd_char2 v; } u = { .v = x }; |
| 923 | return (u.i & 0x8080) == 0x8080; |
| 924 | #endif |
| 925 | } |
| 926 | static inline SIMD_CFUNC simd_bool simd_all(simd_char3 x) { |
| 927 | #if defined __SSE2__ |
| 928 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0x7) == 0x7; |
| 929 | #elif defined __arm64__ || defined __aarch64__ |
| 930 | return simd_all(x.xyzz); |
| 931 | #else |
| 932 | union { uint32_t i; simd_char3 v; } u = { .v = x }; |
| 933 | return (u.i & 0x808080) == 0x808080; |
| 934 | #endif |
| 935 | } |
| 936 | static inline SIMD_CFUNC simd_bool simd_all(simd_char4 x) { |
| 937 | #if defined __SSE2__ |
| 938 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0xf) == 0xf; |
| 939 | #elif defined __arm64__ || defined __aarch64__ |
| 940 | return simd_all(x.xyzwxyzw); |
| 941 | #else |
| 942 | union { uint32_t i; simd_char4 v; } u = { .v = x }; |
| 943 | return (u.i & 0x80808080) == 0x80808080; |
| 944 | #endif |
| 945 | } |
| 946 | static inline SIMD_CFUNC simd_bool simd_all(simd_char8 x) { |
| 947 | #if defined __SSE2__ |
| 948 | return (_mm_movemask_epi8((__m128i)simd_make_char16_undef(x)) & 0xff) == 0xff; |
| 949 | #elif defined __arm64__ || defined __aarch64__ |
| 950 | return vminv_u8(x) & 0x80; |
| 951 | #else |
| 952 | union { uint64_t i; simd_char8 v; } u = { .v = x }; |
| 953 | return (u.i & 0x8080808080808080) == 0x8080808080808080; |
| 954 | #endif |
| 955 | } |
| 956 | static inline SIMD_CFUNC simd_bool simd_all(simd_char16 x) { |
| 957 | #if defined __SSE2__ |
| 958 | return _mm_movemask_epi8((__m128i)x) == 0xffff; |
| 959 | #elif defined __arm64__ || defined __aarch64__ |
| 960 | return vminvq_u8(x) & 0x80; |
| 961 | #else |
| 962 | return simd_all(x.lo & x.hi); |
| 963 | #endif |
| 964 | } |
| 965 | static inline SIMD_CFUNC simd_bool simd_all(simd_char32 x) { |
| 966 | #if defined __AVX2__ |
| 967 | return _mm256_movemask_epi8(x) == 0xffffffff; |
| 968 | #else |
| 969 | return simd_all(x.lo & x.hi); |
| 970 | #endif |
| 971 | } |
| 972 | static inline SIMD_CFUNC simd_bool simd_all(simd_char64 x) { |
| 973 | return simd_all(x.lo & x.hi); |
| 974 | } |
| 975 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar2 x) { |
| 976 | return simd_all((simd_char2)x); |
| 977 | } |
| 978 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar3 x) { |
| 979 | return simd_all((simd_char3)x); |
| 980 | } |
| 981 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar4 x) { |
| 982 | return simd_all((simd_char4)x); |
| 983 | } |
| 984 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar8 x) { |
| 985 | return simd_all((simd_char8)x); |
| 986 | } |
| 987 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar16 x) { |
| 988 | return simd_all((simd_char16)x); |
| 989 | } |
| 990 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar32 x) { |
| 991 | return simd_all((simd_char32)x); |
| 992 | } |
| 993 | static inline SIMD_CFUNC simd_bool simd_all(simd_uchar64 x) { |
| 994 | return simd_all((simd_char64)x); |
| 995 | } |
| 996 | static inline SIMD_CFUNC simd_bool simd_all(simd_short2 x) { |
| 997 | #if defined __SSE2__ |
| 998 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0xa) == 0xa; |
| 999 | #elif defined __arm64__ || defined __aarch64__ |
| 1000 | return simd_all(x.xyxy); |
| 1001 | #else |
| 1002 | union { uint32_t i; simd_short2 v; } u = { .v = x }; |
| 1003 | return (u.i & 0x80008000) == 0x80008000; |
| 1004 | #endif |
| 1005 | } |
| 1006 | static inline SIMD_CFUNC simd_bool simd_all(simd_short3 x) { |
| 1007 | #if defined __SSE2__ |
| 1008 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0x2a) == 0x2a; |
| 1009 | #elif defined __arm64__ || defined __aarch64__ |
| 1010 | return simd_all(x.xyzz); |
| 1011 | #else |
| 1012 | union { uint64_t i; simd_short3 v; } u = { .v = x }; |
| 1013 | return (u.i & 0x800080008000) == 0x800080008000; |
| 1014 | #endif |
| 1015 | } |
| 1016 | static inline SIMD_CFUNC simd_bool simd_all(simd_short4 x) { |
| 1017 | #if defined __SSE2__ |
| 1018 | return (_mm_movemask_epi8((__m128i)simd_make_short8_undef(x)) & 0xaa) == 0xaa; |
| 1019 | #elif defined __arm64__ || defined __aarch64__ |
| 1020 | return vminv_u16(x) & 0x8000; |
| 1021 | #else |
| 1022 | union { uint64_t i; simd_short4 v; } u = { .v = x }; |
| 1023 | return (u.i & 0x8000800080008000) == 0x8000800080008000; |
| 1024 | #endif |
| 1025 | } |
| 1026 | static inline SIMD_CFUNC simd_bool simd_all(simd_short8 x) { |
| 1027 | #if defined __SSE2__ |
| 1028 | return (_mm_movemask_epi8((__m128i)x) & 0xaaaa) == 0xaaaa; |
| 1029 | #elif defined __arm64__ || defined __aarch64__ |
| 1030 | return vminvq_u16(x) & 0x8000; |
| 1031 | #else |
| 1032 | return simd_all(x.lo & x.hi); |
| 1033 | #endif |
| 1034 | } |
| 1035 | static inline SIMD_CFUNC simd_bool simd_all(simd_short16 x) { |
| 1036 | #if defined __AVX2__ |
| 1037 | return (_mm256_movemask_epi8(x) & 0xaaaaaaaa) == 0xaaaaaaaa; |
| 1038 | #else |
| 1039 | return simd_all(x.lo & x.hi); |
| 1040 | #endif |
| 1041 | } |
| 1042 | static inline SIMD_CFUNC simd_bool simd_all(simd_short32 x) { |
| 1043 | return simd_all(x.lo & x.hi); |
| 1044 | } |
| 1045 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort2 x) { |
| 1046 | return simd_all((simd_short2)x); |
| 1047 | } |
| 1048 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort3 x) { |
| 1049 | return simd_all((simd_short3)x); |
| 1050 | } |
| 1051 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort4 x) { |
| 1052 | return simd_all((simd_short4)x); |
| 1053 | } |
| 1054 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort8 x) { |
| 1055 | return simd_all((simd_short8)x); |
| 1056 | } |
| 1057 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort16 x) { |
| 1058 | return simd_all((simd_short16)x); |
| 1059 | } |
| 1060 | static inline SIMD_CFUNC simd_bool simd_all(simd_ushort32 x) { |
| 1061 | return simd_all((simd_short32)x); |
| 1062 | } |
| 1063 | static inline SIMD_CFUNC simd_bool simd_all(simd_int2 x) { |
| 1064 | #if defined __SSE2__ |
| 1065 | return (_mm_movemask_ps((__m128)simd_make_int4_undef(x)) & 0x3) == 0x3; |
| 1066 | #elif defined __arm64__ || defined __aarch64__ |
| 1067 | return vminv_u32(x) & 0x80000000; |
| 1068 | #else |
| 1069 | union { uint64_t i; simd_int2 v; } u = { .v = x }; |
| 1070 | return (u.i & 0x8000000080000000) == 0x8000000080000000; |
| 1071 | #endif |
| 1072 | } |
| 1073 | static inline SIMD_CFUNC simd_bool simd_all(simd_int3 x) { |
| 1074 | #if defined __SSE2__ |
| 1075 | return (_mm_movemask_ps((__m128)simd_make_int4_undef(x)) & 0x7) == 0x7; |
| 1076 | #elif defined __arm64__ || defined __aarch64__ |
| 1077 | return simd_all(x.xyzz); |
| 1078 | #else |
| 1079 | return (x.x & x.y & x.z) & 0x80000000; |
| 1080 | #endif |
| 1081 | } |
| 1082 | static inline SIMD_CFUNC simd_bool simd_all(simd_int4 x) { |
| 1083 | #if defined __SSE2__ |
| 1084 | return _mm_movemask_ps((__m128)x) == 0xf; |
| 1085 | #elif defined __arm64__ || defined __aarch64__ |
| 1086 | return vminvq_u32(x) & 0x80000000; |
| 1087 | #else |
| 1088 | return simd_all(x.lo & x.hi); |
| 1089 | #endif |
| 1090 | } |
| 1091 | static inline SIMD_CFUNC simd_bool simd_all(simd_int8 x) { |
| 1092 | #if defined __AVX__ |
| 1093 | return _mm256_movemask_ps(x) == 0xff; |
| 1094 | #else |
| 1095 | return simd_all(x.lo & x.hi); |
| 1096 | #endif |
| 1097 | } |
| 1098 | static inline SIMD_CFUNC simd_bool simd_all(simd_int16 x) { |
| 1099 | return simd_all(x.lo & x.hi); |
| 1100 | } |
| 1101 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint2 x) { |
| 1102 | return simd_all((simd_int2)x); |
| 1103 | } |
| 1104 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint3 x) { |
| 1105 | return simd_all((simd_int3)x); |
| 1106 | } |
| 1107 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint4 x) { |
| 1108 | return simd_all((simd_int4)x); |
| 1109 | } |
| 1110 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint8 x) { |
| 1111 | return simd_all((simd_int8)x); |
| 1112 | } |
| 1113 | static inline SIMD_CFUNC simd_bool simd_all(simd_uint16 x) { |
| 1114 | return simd_all((simd_int16)x); |
| 1115 | } |
| 1116 | static inline SIMD_CFUNC simd_bool simd_all(simd_long2 x) { |
| 1117 | #if defined __SSE2__ |
| 1118 | return _mm_movemask_pd((__m128d)x) == 0x3; |
| 1119 | #elif defined __arm64__ || defined __aarch64__ |
| 1120 | return (x.x & x.y) & 0x8000000000000000U; |
| 1121 | #else |
| 1122 | return (x.x & x.y) & 0x8000000000000000U; |
| 1123 | #endif |
| 1124 | } |
| 1125 | static inline SIMD_CFUNC simd_bool simd_all(simd_long3 x) { |
| 1126 | #if defined __AVX__ |
| 1127 | return (_mm256_movemask_pd(simd_make_long4_undef(x)) & 0x7) == 0x7; |
| 1128 | #else |
| 1129 | return (x.x & x.y & x.z) & 0x8000000000000000U; |
| 1130 | #endif |
| 1131 | } |
| 1132 | static inline SIMD_CFUNC simd_bool simd_all(simd_long4 x) { |
| 1133 | #if defined __AVX__ |
| 1134 | return _mm256_movemask_pd(x) == 0xf; |
| 1135 | #else |
| 1136 | return simd_all(x.lo & x.hi); |
| 1137 | #endif |
| 1138 | } |
| 1139 | static inline SIMD_CFUNC simd_bool simd_all(simd_long8 x) { |
| 1140 | return simd_all(x.lo & x.hi); |
| 1141 | } |
| 1142 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong2 x) { |
| 1143 | return simd_all((simd_long2)x); |
| 1144 | } |
| 1145 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong3 x) { |
| 1146 | return simd_all((simd_long3)x); |
| 1147 | } |
| 1148 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong4 x) { |
| 1149 | return simd_all((simd_long4)x); |
| 1150 | } |
| 1151 | static inline SIMD_CFUNC simd_bool simd_all(simd_ulong8 x) { |
| 1152 | return simd_all((simd_long8)x); |
| 1153 | } |
| 1154 | |
| 1155 | static inline SIMD_CFUNC simd_half2 simd_select(simd_half2 x, simd_half2 y, simd_short2 mask) { |
| 1156 | return simd_make_half2(simd_select(simd_make_half8_undef(x), simd_make_half8_undef(y), simd_make_short8_undef(mask))); |
| 1157 | } |
| 1158 | static inline SIMD_CFUNC simd_half3 simd_select(simd_half3 x, simd_half3 y, simd_short3 mask) { |
| 1159 | return simd_make_half3(simd_select(simd_make_half8_undef(x), simd_make_half8_undef(y), simd_make_short8_undef(mask))); |
| 1160 | } |
| 1161 | static inline SIMD_CFUNC simd_half4 simd_select(simd_half4 x, simd_half4 y, simd_short4 mask) { |
| 1162 | return simd_make_half4(simd_select(simd_make_half8_undef(x), simd_make_half8_undef(y), simd_make_short8_undef(mask))); |
| 1163 | } |
| 1164 | static inline SIMD_CFUNC simd_half8 simd_select(simd_half8 x, simd_half8 y, simd_short8 mask) { |
| 1165 | return simd_bitselect(x, y, mask >> 15); |
| 1166 | } |
| 1167 | static inline SIMD_CFUNC simd_half16 simd_select(simd_half16 x, simd_half16 y, simd_short16 mask) { |
| 1168 | return simd_bitselect(x, y, mask >> 15); |
| 1169 | } |
| 1170 | static inline SIMD_CFUNC simd_half32 simd_select(simd_half32 x, simd_half32 y, simd_short32 mask) { |
| 1171 | return simd_bitselect(x, y, mask >> 15); |
| 1172 | } |
| 1173 | static inline SIMD_CFUNC simd_float2 simd_select(simd_float2 x, simd_float2 y, simd_int2 mask) { |
| 1174 | return simd_make_float2(simd_select(simd_make_float4_undef(x), simd_make_float4_undef(y), simd_make_int4_undef(mask))); |
| 1175 | } |
| 1176 | static inline SIMD_CFUNC simd_float3 simd_select(simd_float3 x, simd_float3 y, simd_int3 mask) { |
| 1177 | return simd_make_float3(simd_select(simd_make_float4_undef(x), simd_make_float4_undef(y), simd_make_int4_undef(mask))); |
| 1178 | } |
| 1179 | static inline SIMD_CFUNC simd_float4 simd_select(simd_float4 x, simd_float4 y, simd_int4 mask) { |
| 1180 | #if defined __SSE4_1__ |
| 1181 | return _mm_blendv_ps(x, y, (__m128)mask); |
| 1182 | #else |
| 1183 | return simd_bitselect(x, y, mask >> 31); |
| 1184 | #endif |
| 1185 | } |
| 1186 | static inline SIMD_CFUNC simd_float8 simd_select(simd_float8 x, simd_float8 y, simd_int8 mask) { |
| 1187 | #if defined __AVX__ |
| 1188 | return _mm256_blendv_ps(x, y, mask); |
| 1189 | #else |
| 1190 | return simd_bitselect(x, y, mask >> 31); |
| 1191 | #endif |
| 1192 | } |
| 1193 | static inline SIMD_CFUNC simd_float16 simd_select(simd_float16 x, simd_float16 y, simd_int16 mask) { |
| 1194 | return simd_bitselect(x, y, mask >> 31); |
| 1195 | } |
| 1196 | static inline SIMD_CFUNC simd_double2 simd_select(simd_double2 x, simd_double2 y, simd_long2 mask) { |
| 1197 | #if defined __SSE4_1__ |
| 1198 | return _mm_blendv_pd(x, y, (__m128d)mask); |
| 1199 | #else |
| 1200 | return simd_bitselect(x, y, mask >> 63); |
| 1201 | #endif |
| 1202 | } |
| 1203 | static inline SIMD_CFUNC simd_double3 simd_select(simd_double3 x, simd_double3 y, simd_long3 mask) { |
| 1204 | return simd_make_double3(simd_select(simd_make_double4_undef(x), simd_make_double4_undef(y), simd_make_long4_undef(mask))); |
| 1205 | } |
| 1206 | static inline SIMD_CFUNC simd_double4 simd_select(simd_double4 x, simd_double4 y, simd_long4 mask) { |
| 1207 | #if defined __AVX__ |
| 1208 | return _mm256_blendv_pd(x, y, mask); |
| 1209 | #else |
| 1210 | return simd_bitselect(x, y, mask >> 63); |
| 1211 | #endif |
| 1212 | } |
| 1213 | static inline SIMD_CFUNC simd_double8 simd_select(simd_double8 x, simd_double8 y, simd_long8 mask) { |
| 1214 | return simd_bitselect(x, y, mask >> 63); |
| 1215 | } |
| 1216 | |
| 1217 | static inline SIMD_CFUNC simd_char2 simd_bitselect(simd_char2 x, simd_char2 y, simd_char2 mask) { |
| 1218 | return (x & ~mask) | (y & mask); |
| 1219 | } |
| 1220 | static inline SIMD_CFUNC simd_char3 simd_bitselect(simd_char3 x, simd_char3 y, simd_char3 mask) { |
| 1221 | return (x & ~mask) | (y & mask); |
| 1222 | } |
| 1223 | static inline SIMD_CFUNC simd_char4 simd_bitselect(simd_char4 x, simd_char4 y, simd_char4 mask) { |
| 1224 | return (x & ~mask) | (y & mask); |
| 1225 | } |
| 1226 | static inline SIMD_CFUNC simd_char8 simd_bitselect(simd_char8 x, simd_char8 y, simd_char8 mask) { |
| 1227 | return (x & ~mask) | (y & mask); |
| 1228 | } |
| 1229 | static inline SIMD_CFUNC simd_char16 simd_bitselect(simd_char16 x, simd_char16 y, simd_char16 mask) { |
| 1230 | return (x & ~mask) | (y & mask); |
| 1231 | } |
| 1232 | static inline SIMD_CFUNC simd_char32 simd_bitselect(simd_char32 x, simd_char32 y, simd_char32 mask) { |
| 1233 | return (x & ~mask) | (y & mask); |
| 1234 | } |
| 1235 | static inline SIMD_CFUNC simd_char64 simd_bitselect(simd_char64 x, simd_char64 y, simd_char64 mask) { |
| 1236 | return (x & ~mask) | (y & mask); |
| 1237 | } |
| 1238 | static inline SIMD_CFUNC simd_uchar2 simd_bitselect(simd_uchar2 x, simd_uchar2 y, simd_char2 mask) { |
| 1239 | return (simd_uchar2)simd_bitselect((simd_char2)x, (simd_char2)y, mask); |
| 1240 | } |
| 1241 | static inline SIMD_CFUNC simd_uchar3 simd_bitselect(simd_uchar3 x, simd_uchar3 y, simd_char3 mask) { |
| 1242 | return (simd_uchar3)simd_bitselect((simd_char3)x, (simd_char3)y, mask); |
| 1243 | } |
| 1244 | static inline SIMD_CFUNC simd_uchar4 simd_bitselect(simd_uchar4 x, simd_uchar4 y, simd_char4 mask) { |
| 1245 | return (simd_uchar4)simd_bitselect((simd_char4)x, (simd_char4)y, mask); |
| 1246 | } |
| 1247 | static inline SIMD_CFUNC simd_uchar8 simd_bitselect(simd_uchar8 x, simd_uchar8 y, simd_char8 mask) { |
| 1248 | return (simd_uchar8)simd_bitselect((simd_char8)x, (simd_char8)y, mask); |
| 1249 | } |
| 1250 | static inline SIMD_CFUNC simd_uchar16 simd_bitselect(simd_uchar16 x, simd_uchar16 y, simd_char16 mask) { |
| 1251 | return (simd_uchar16)simd_bitselect((simd_char16)x, (simd_char16)y, mask); |
| 1252 | } |
| 1253 | static inline SIMD_CFUNC simd_uchar32 simd_bitselect(simd_uchar32 x, simd_uchar32 y, simd_char32 mask) { |
| 1254 | return (simd_uchar32)simd_bitselect((simd_char32)x, (simd_char32)y, mask); |
| 1255 | } |
| 1256 | static inline SIMD_CFUNC simd_uchar64 simd_bitselect(simd_uchar64 x, simd_uchar64 y, simd_char64 mask) { |
| 1257 | return (simd_uchar64)simd_bitselect((simd_char64)x, (simd_char64)y, mask); |
| 1258 | } |
| 1259 | static inline SIMD_CFUNC simd_short2 simd_bitselect(simd_short2 x, simd_short2 y, simd_short2 mask) { |
| 1260 | return (x & ~mask) | (y & mask); |
| 1261 | } |
| 1262 | static inline SIMD_CFUNC simd_short3 simd_bitselect(simd_short3 x, simd_short3 y, simd_short3 mask) { |
| 1263 | return (x & ~mask) | (y & mask); |
| 1264 | } |
| 1265 | static inline SIMD_CFUNC simd_short4 simd_bitselect(simd_short4 x, simd_short4 y, simd_short4 mask) { |
| 1266 | return (x & ~mask) | (y & mask); |
| 1267 | } |
| 1268 | static inline SIMD_CFUNC simd_short8 simd_bitselect(simd_short8 x, simd_short8 y, simd_short8 mask) { |
| 1269 | return (x & ~mask) | (y & mask); |
| 1270 | } |
| 1271 | static inline SIMD_CFUNC simd_short16 simd_bitselect(simd_short16 x, simd_short16 y, simd_short16 mask) { |
| 1272 | return (x & ~mask) | (y & mask); |
| 1273 | } |
| 1274 | static inline SIMD_CFUNC simd_short32 simd_bitselect(simd_short32 x, simd_short32 y, simd_short32 mask) { |
| 1275 | return (x & ~mask) | (y & mask); |
| 1276 | } |
| 1277 | static inline SIMD_CFUNC simd_ushort2 simd_bitselect(simd_ushort2 x, simd_ushort2 y, simd_short2 mask) { |
| 1278 | return (simd_ushort2)simd_bitselect((simd_short2)x, (simd_short2)y, mask); |
| 1279 | } |
| 1280 | static inline SIMD_CFUNC simd_ushort3 simd_bitselect(simd_ushort3 x, simd_ushort3 y, simd_short3 mask) { |
| 1281 | return (simd_ushort3)simd_bitselect((simd_short3)x, (simd_short3)y, mask); |
| 1282 | } |
| 1283 | static inline SIMD_CFUNC simd_ushort4 simd_bitselect(simd_ushort4 x, simd_ushort4 y, simd_short4 mask) { |
| 1284 | return (simd_ushort4)simd_bitselect((simd_short4)x, (simd_short4)y, mask); |
| 1285 | } |
| 1286 | static inline SIMD_CFUNC simd_ushort8 simd_bitselect(simd_ushort8 x, simd_ushort8 y, simd_short8 mask) { |
| 1287 | return (simd_ushort8)simd_bitselect((simd_short8)x, (simd_short8)y, mask); |
| 1288 | } |
| 1289 | static inline SIMD_CFUNC simd_ushort16 simd_bitselect(simd_ushort16 x, simd_ushort16 y, simd_short16 mask) { |
| 1290 | return (simd_ushort16)simd_bitselect((simd_short16)x, (simd_short16)y, mask); |
| 1291 | } |
| 1292 | static inline SIMD_CFUNC simd_ushort32 simd_bitselect(simd_ushort32 x, simd_ushort32 y, simd_short32 mask) { |
| 1293 | return (simd_ushort32)simd_bitselect((simd_short32)x, (simd_short32)y, mask); |
| 1294 | } |
| 1295 | static inline SIMD_CFUNC simd_half2 simd_bitselect(simd_half2 x, simd_half2 y, simd_short2 mask) { |
| 1296 | return (simd_half2)simd_bitselect((simd_short2)x, (simd_short2)y, mask); |
| 1297 | } |
| 1298 | static inline SIMD_CFUNC simd_half3 simd_bitselect(simd_half3 x, simd_half3 y, simd_short3 mask) { |
| 1299 | return (simd_half3)simd_bitselect((simd_short3)x, (simd_short3)y, mask); |
| 1300 | } |
| 1301 | static inline SIMD_CFUNC simd_half4 simd_bitselect(simd_half4 x, simd_half4 y, simd_short4 mask) { |
| 1302 | return (simd_half4)simd_bitselect((simd_short4)x, (simd_short4)y, mask); |
| 1303 | } |
| 1304 | static inline SIMD_CFUNC simd_half8 simd_bitselect(simd_half8 x, simd_half8 y, simd_short8 mask) { |
| 1305 | return (simd_half8)simd_bitselect((simd_short8)x, (simd_short8)y, mask); |
| 1306 | } |
| 1307 | static inline SIMD_CFUNC simd_half16 simd_bitselect(simd_half16 x, simd_half16 y, simd_short16 mask) { |
| 1308 | return (simd_half16)simd_bitselect((simd_short16)x, (simd_short16)y, mask); |
| 1309 | } |
| 1310 | static inline SIMD_CFUNC simd_half32 simd_bitselect(simd_half32 x, simd_half32 y, simd_short32 mask) { |
| 1311 | return (simd_half32)simd_bitselect((simd_short32)x, (simd_short32)y, mask); |
| 1312 | } |
| 1313 | static inline SIMD_CFUNC simd_int2 simd_bitselect(simd_int2 x, simd_int2 y, simd_int2 mask) { |
| 1314 | return (x & ~mask) | (y & mask); |
| 1315 | } |
| 1316 | static inline SIMD_CFUNC simd_int3 simd_bitselect(simd_int3 x, simd_int3 y, simd_int3 mask) { |
| 1317 | return (x & ~mask) | (y & mask); |
| 1318 | } |
| 1319 | static inline SIMD_CFUNC simd_int4 simd_bitselect(simd_int4 x, simd_int4 y, simd_int4 mask) { |
| 1320 | return (x & ~mask) | (y & mask); |
| 1321 | } |
| 1322 | static inline SIMD_CFUNC simd_int8 simd_bitselect(simd_int8 x, simd_int8 y, simd_int8 mask) { |
| 1323 | return (x & ~mask) | (y & mask); |
| 1324 | } |
| 1325 | static inline SIMD_CFUNC simd_int16 simd_bitselect(simd_int16 x, simd_int16 y, simd_int16 mask) { |
| 1326 | return (x & ~mask) | (y & mask); |
| 1327 | } |
| 1328 | static inline SIMD_CFUNC simd_uint2 simd_bitselect(simd_uint2 x, simd_uint2 y, simd_int2 mask) { |
| 1329 | return (simd_uint2)simd_bitselect((simd_int2)x, (simd_int2)y, mask); |
| 1330 | } |
| 1331 | static inline SIMD_CFUNC simd_uint3 simd_bitselect(simd_uint3 x, simd_uint3 y, simd_int3 mask) { |
| 1332 | return (simd_uint3)simd_bitselect((simd_int3)x, (simd_int3)y, mask); |
| 1333 | } |
| 1334 | static inline SIMD_CFUNC simd_uint4 simd_bitselect(simd_uint4 x, simd_uint4 y, simd_int4 mask) { |
| 1335 | return (simd_uint4)simd_bitselect((simd_int4)x, (simd_int4)y, mask); |
| 1336 | } |
| 1337 | static inline SIMD_CFUNC simd_uint8 simd_bitselect(simd_uint8 x, simd_uint8 y, simd_int8 mask) { |
| 1338 | return (simd_uint8)simd_bitselect((simd_int8)x, (simd_int8)y, mask); |
| 1339 | } |
| 1340 | static inline SIMD_CFUNC simd_uint16 simd_bitselect(simd_uint16 x, simd_uint16 y, simd_int16 mask) { |
| 1341 | return (simd_uint16)simd_bitselect((simd_int16)x, (simd_int16)y, mask); |
| 1342 | } |
| 1343 | static inline SIMD_CFUNC simd_float2 simd_bitselect(simd_float2 x, simd_float2 y, simd_int2 mask) { |
| 1344 | return (simd_float2)simd_bitselect((simd_int2)x, (simd_int2)y, mask); |
| 1345 | } |
| 1346 | static inline SIMD_CFUNC simd_float3 simd_bitselect(simd_float3 x, simd_float3 y, simd_int3 mask) { |
| 1347 | return (simd_float3)simd_bitselect((simd_int3)x, (simd_int3)y, mask); |
| 1348 | } |
| 1349 | static inline SIMD_CFUNC simd_float4 simd_bitselect(simd_float4 x, simd_float4 y, simd_int4 mask) { |
| 1350 | return (simd_float4)simd_bitselect((simd_int4)x, (simd_int4)y, mask); |
| 1351 | } |
| 1352 | static inline SIMD_CFUNC simd_float8 simd_bitselect(simd_float8 x, simd_float8 y, simd_int8 mask) { |
| 1353 | return (simd_float8)simd_bitselect((simd_int8)x, (simd_int8)y, mask); |
| 1354 | } |
| 1355 | static inline SIMD_CFUNC simd_float16 simd_bitselect(simd_float16 x, simd_float16 y, simd_int16 mask) { |
| 1356 | return (simd_float16)simd_bitselect((simd_int16)x, (simd_int16)y, mask); |
| 1357 | } |
| 1358 | static inline SIMD_CFUNC simd_long2 simd_bitselect(simd_long2 x, simd_long2 y, simd_long2 mask) { |
| 1359 | return (x & ~mask) | (y & mask); |
| 1360 | } |
| 1361 | static inline SIMD_CFUNC simd_long3 simd_bitselect(simd_long3 x, simd_long3 y, simd_long3 mask) { |
| 1362 | return (x & ~mask) | (y & mask); |
| 1363 | } |
| 1364 | static inline SIMD_CFUNC simd_long4 simd_bitselect(simd_long4 x, simd_long4 y, simd_long4 mask) { |
| 1365 | return (x & ~mask) | (y & mask); |
| 1366 | } |
| 1367 | static inline SIMD_CFUNC simd_long8 simd_bitselect(simd_long8 x, simd_long8 y, simd_long8 mask) { |
| 1368 | return (x & ~mask) | (y & mask); |
| 1369 | } |
| 1370 | static inline SIMD_CFUNC simd_ulong2 simd_bitselect(simd_ulong2 x, simd_ulong2 y, simd_long2 mask) { |
| 1371 | return (simd_ulong2)simd_bitselect((simd_long2)x, (simd_long2)y, mask); |
| 1372 | } |
| 1373 | static inline SIMD_CFUNC simd_ulong3 simd_bitselect(simd_ulong3 x, simd_ulong3 y, simd_long3 mask) { |
| 1374 | return (simd_ulong3)simd_bitselect((simd_long3)x, (simd_long3)y, mask); |
| 1375 | } |
| 1376 | static inline SIMD_CFUNC simd_ulong4 simd_bitselect(simd_ulong4 x, simd_ulong4 y, simd_long4 mask) { |
| 1377 | return (simd_ulong4)simd_bitselect((simd_long4)x, (simd_long4)y, mask); |
| 1378 | } |
| 1379 | static inline SIMD_CFUNC simd_ulong8 simd_bitselect(simd_ulong8 x, simd_ulong8 y, simd_long8 mask) { |
| 1380 | return (simd_ulong8)simd_bitselect((simd_long8)x, (simd_long8)y, mask); |
| 1381 | } |
| 1382 | static inline SIMD_CFUNC simd_double2 simd_bitselect(simd_double2 x, simd_double2 y, simd_long2 mask) { |
| 1383 | return (simd_double2)simd_bitselect((simd_long2)x, (simd_long2)y, mask); |
| 1384 | } |
| 1385 | static inline SIMD_CFUNC simd_double3 simd_bitselect(simd_double3 x, simd_double3 y, simd_long3 mask) { |
| 1386 | return (simd_double3)simd_bitselect((simd_long3)x, (simd_long3)y, mask); |
| 1387 | } |
| 1388 | static inline SIMD_CFUNC simd_double4 simd_bitselect(simd_double4 x, simd_double4 y, simd_long4 mask) { |
| 1389 | return (simd_double4)simd_bitselect((simd_long4)x, (simd_long4)y, mask); |
| 1390 | } |
| 1391 | static inline SIMD_CFUNC simd_double8 simd_bitselect(simd_double8 x, simd_double8 y, simd_long8 mask) { |
| 1392 | return (simd_double8)simd_bitselect((simd_long8)x, (simd_long8)y, mask); |
| 1393 | } |
| 1394 | |
| 1395 | #ifdef __cplusplus |
| 1396 | } |
| 1397 | #endif |
| 1398 | #endif /* SIMD_COMPILER_HAS_REQUIRED_FEATURES */ |
| 1399 | #endif /* __SIMD_LOGIC_HEADER__ */ |