1/* SPDX-License-Identifier: MIT */
2/*
3 * Header for the Direct Rendering Manager
4 *
5 * Author: Rickard E. (Rik) Faith <faith@valinux.com>
6 *
7 * Acknowledgments:
8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
9 */
10
11/*
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
15 */
16
17#ifndef _DRM_H_
18#define _DRM_H_
19
20#if defined(__linux__)
21
22#include <linux/types.h>
23#include <asm/ioctl.h>
24typedef unsigned int drm_handle_t;
25
26#else /* One of the BSDs */
27
28#include <stdint.h>
29#include <sys/ioccom.h>
30#include <sys/types.h>
31typedef int8_t __s8;
32typedef uint8_t __u8;
33typedef int16_t __s16;
34typedef uint16_t __u16;
35typedef int32_t __s32;
36typedef uint32_t __u32;
37typedef int64_t __s64;
38typedef uint64_t __u64;
39typedef size_t __kernel_size_t;
40typedef unsigned long drm_handle_t;
41
42#endif
43
44#if defined(__cplusplus)
45extern "C" {
46#endif
47
48#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
49#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
50#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
51#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
52
53#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
54#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
55#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
56#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
57#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
58
59typedef unsigned int drm_context_t;
60typedef unsigned int drm_drawable_t;
61typedef unsigned int drm_magic_t;
62
63/*
64 * Cliprect.
65 *
66 * \warning: If you change this structure, make sure you change
67 * XF86DRIClipRectRec in the server as well
68 *
69 * \note KW: Actually it's illegal to change either for
70 * backwards-compatibility reasons.
71 */
72struct drm_clip_rect {
73 unsigned short x1;
74 unsigned short y1;
75 unsigned short x2;
76 unsigned short y2;
77};
78
79/*
80 * Drawable information.
81 */
82struct drm_drawable_info {
83 unsigned int num_rects;
84 struct drm_clip_rect *rects;
85};
86
87/*
88 * Texture region,
89 */
90struct drm_tex_region {
91 unsigned char next;
92 unsigned char prev;
93 unsigned char in_use;
94 unsigned char padding;
95 unsigned int age;
96};
97
98/*
99 * Hardware lock.
100 *
101 * The lock structure is a simple cache-line aligned integer. To avoid
102 * processor bus contention on a multiprocessor system, there should not be any
103 * other data stored in the same cache line.
104 */
105struct drm_hw_lock {
106 __volatile__ unsigned int lock; /**< lock variable */
107 char padding[60]; /**< Pad to cache line */
108};
109
110/*
111 * DRM_IOCTL_VERSION ioctl argument type.
112 *
113 * \sa drmGetVersion().
114 */
115struct drm_version {
116 int version_major; /**< Major version */
117 int version_minor; /**< Minor version */
118 int version_patchlevel; /**< Patch level */
119 __kernel_size_t name_len; /**< Length of name buffer */
120 char *name; /**< Name of driver */
121 __kernel_size_t date_len; /**< Length of date buffer */
122 char *date; /**< User-space buffer to hold date */
123 __kernel_size_t desc_len; /**< Length of desc buffer */
124 char *desc; /**< User-space buffer to hold desc */
125};
126
127/*
128 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
129 *
130 * \sa drmGetBusid() and drmSetBusId().
131 */
132struct drm_unique {
133 __kernel_size_t unique_len; /**< Length of unique */
134 char *unique; /**< Unique name for driver instantiation */
135};
136
137struct drm_list {
138 int count; /**< Length of user-space structures */
139 struct drm_version *version;
140};
141
142struct drm_block {
143 int unused;
144};
145
146/*
147 * DRM_IOCTL_CONTROL ioctl argument type.
148 *
149 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
150 */
151struct drm_control {
152 enum {
153 DRM_ADD_COMMAND,
154 DRM_RM_COMMAND,
155 DRM_INST_HANDLER,
156 DRM_UNINST_HANDLER
157 } func;
158 int irq;
159};
160
161/*
162 * Type of memory to map.
163 */
164enum drm_map_type {
165 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
166 _DRM_REGISTERS = 1, /**< no caching, no core dump */
167 _DRM_SHM = 2, /**< shared, cached */
168 _DRM_AGP = 3, /**< AGP/GART */
169 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
170 _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
171};
172
173/*
174 * Memory mapping flags.
175 */
176enum drm_map_flags {
177 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
178 _DRM_READ_ONLY = 0x02,
179 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
180 _DRM_KERNEL = 0x08, /**< kernel requires access */
181 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
182 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
183 _DRM_REMOVABLE = 0x40, /**< Removable mapping */
184 _DRM_DRIVER = 0x80 /**< Managed by driver */
185};
186
187struct drm_ctx_priv_map {
188 unsigned int ctx_id; /**< Context requesting private mapping */
189 void *handle; /**< Handle of map */
190};
191
192/*
193 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
194 * argument type.
195 *
196 * \sa drmAddMap().
197 */
198struct drm_map {
199 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
200 unsigned long size; /**< Requested physical size (bytes) */
201 enum drm_map_type type; /**< Type of memory to map */
202 enum drm_map_flags flags; /**< Flags */
203 void *handle; /**< User-space: "Handle" to pass to mmap() */
204 /**< Kernel-space: kernel-virtual address */
205 int mtrr; /**< MTRR slot used */
206 /* Private data */
207};
208
209/*
210 * DRM_IOCTL_GET_CLIENT ioctl argument type.
211 */
212struct drm_client {
213 int idx; /**< Which client desired? */
214 int auth; /**< Is client authenticated? */
215 unsigned long pid; /**< Process ID */
216 unsigned long uid; /**< User ID */
217 unsigned long magic; /**< Magic */
218 unsigned long iocs; /**< Ioctl count */
219};
220
221enum drm_stat_type {
222 _DRM_STAT_LOCK,
223 _DRM_STAT_OPENS,
224 _DRM_STAT_CLOSES,
225 _DRM_STAT_IOCTLS,
226 _DRM_STAT_LOCKS,
227 _DRM_STAT_UNLOCKS,
228 _DRM_STAT_VALUE, /**< Generic value */
229 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
230 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
231
232 _DRM_STAT_IRQ, /**< IRQ */
233 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
234 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
235 _DRM_STAT_DMA, /**< DMA */
236 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
237 _DRM_STAT_MISSED /**< Missed DMA opportunity */
238 /* Add to the *END* of the list */
239};
240
241/*
242 * DRM_IOCTL_GET_STATS ioctl argument type.
243 */
244struct drm_stats {
245 unsigned long count;
246 struct {
247 unsigned long value;
248 enum drm_stat_type type;
249 } data[15];
250};
251
252/*
253 * Hardware locking flags.
254 */
255enum drm_lock_flags {
256 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
257 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
258 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
259 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
260 /* These *HALT* flags aren't supported yet
261 -- they will be used to support the
262 full-screen DGA-like mode. */
263 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
264 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
265};
266
267/*
268 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
269 *
270 * \sa drmGetLock() and drmUnlock().
271 */
272struct drm_lock {
273 int context;
274 enum drm_lock_flags flags;
275};
276
277/*
278 * DMA flags
279 *
280 * \warning
281 * These values \e must match xf86drm.h.
282 *
283 * \sa drm_dma.
284 */
285enum drm_dma_flags {
286 /* Flags for DMA buffer dispatch */
287 _DRM_DMA_BLOCK = 0x01, /**<
288 * Block until buffer dispatched.
289 *
290 * \note The buffer may not yet have
291 * been processed by the hardware --
292 * getting a hardware lock with the
293 * hardware quiescent will ensure
294 * that the buffer has been
295 * processed.
296 */
297 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
298 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
299
300 /* Flags for DMA buffer request */
301 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
302 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
303 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
304};
305
306/*
307 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
308 *
309 * \sa drmAddBufs().
310 */
311struct drm_buf_desc {
312 int count; /**< Number of buffers of this size */
313 int size; /**< Size in bytes */
314 int low_mark; /**< Low water mark */
315 int high_mark; /**< High water mark */
316 enum {
317 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
318 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
319 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
320 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
321 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
322 } flags;
323 unsigned long agp_start; /**<
324 * Start address of where the AGP buffers are
325 * in the AGP aperture
326 */
327};
328
329/*
330 * DRM_IOCTL_INFO_BUFS ioctl argument type.
331 */
332struct drm_buf_info {
333 int count; /**< Entries in list */
334 struct drm_buf_desc *list;
335};
336
337/*
338 * DRM_IOCTL_FREE_BUFS ioctl argument type.
339 */
340struct drm_buf_free {
341 int count;
342 int *list;
343};
344
345/*
346 * Buffer information
347 *
348 * \sa drm_buf_map.
349 */
350struct drm_buf_pub {
351 int idx; /**< Index into the master buffer list */
352 int total; /**< Buffer size */
353 int used; /**< Amount of buffer in use (for DMA) */
354 void *address; /**< Address of buffer */
355};
356
357/*
358 * DRM_IOCTL_MAP_BUFS ioctl argument type.
359 */
360struct drm_buf_map {
361 int count; /**< Length of the buffer list */
362#ifdef __cplusplus
363 void *virt;
364#else
365 void *virtual; /**< Mmap'd area in user-virtual */
366#endif
367 struct drm_buf_pub *list; /**< Buffer information */
368};
369
370/*
371 * DRM_IOCTL_DMA ioctl argument type.
372 *
373 * Indices here refer to the offset into the buffer list in drm_buf_get.
374 *
375 * \sa drmDMA().
376 */
377struct drm_dma {
378 int context; /**< Context handle */
379 int send_count; /**< Number of buffers to send */
380 int *send_indices; /**< List of handles to buffers */
381 int *send_sizes; /**< Lengths of data to send */
382 enum drm_dma_flags flags; /**< Flags */
383 int request_count; /**< Number of buffers requested */
384 int request_size; /**< Desired size for buffers */
385 int *request_indices; /**< Buffer information */
386 int *request_sizes;
387 int granted_count; /**< Number of buffers granted */
388};
389
390enum drm_ctx_flags {
391 _DRM_CONTEXT_PRESERVED = 0x01,
392 _DRM_CONTEXT_2DONLY = 0x02
393};
394
395/*
396 * DRM_IOCTL_ADD_CTX ioctl argument type.
397 *
398 * \sa drmCreateContext() and drmDestroyContext().
399 */
400struct drm_ctx {
401 drm_context_t handle;
402 enum drm_ctx_flags flags;
403};
404
405/*
406 * DRM_IOCTL_RES_CTX ioctl argument type.
407 */
408struct drm_ctx_res {
409 int count;
410 struct drm_ctx *contexts;
411};
412
413/*
414 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
415 */
416struct drm_draw {
417 drm_drawable_t handle;
418};
419
420/*
421 * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
422 */
423typedef enum {
424 DRM_DRAWABLE_CLIPRECTS
425} drm_drawable_info_type_t;
426
427struct drm_update_draw {
428 drm_drawable_t handle;
429 unsigned int type;
430 unsigned int num;
431 unsigned long long data;
432};
433
434/*
435 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
436 */
437struct drm_auth {
438 drm_magic_t magic;
439};
440
441/*
442 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
443 *
444 * \sa drmGetInterruptFromBusID().
445 */
446struct drm_irq_busid {
447 int irq; /**< IRQ number */
448 int busnum; /**< bus number */
449 int devnum; /**< device number */
450 int funcnum; /**< function number */
451};
452
453enum drm_vblank_seq_type {
454 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
455 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
456 /* bits 1-6 are reserved for high crtcs */
457 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
458 _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
459 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
460 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
461 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
462 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
463};
464#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
465
466#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
467#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
468 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
469
470struct drm_wait_vblank_request {
471 enum drm_vblank_seq_type type;
472 unsigned int sequence;
473 unsigned long signal;
474};
475
476struct drm_wait_vblank_reply {
477 enum drm_vblank_seq_type type;
478 unsigned int sequence;
479 long tval_sec;
480 long tval_usec;
481};
482
483/*
484 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
485 *
486 * \sa drmWaitVBlank().
487 */
488union drm_wait_vblank {
489 struct drm_wait_vblank_request request;
490 struct drm_wait_vblank_reply reply;
491};
492
493#define _DRM_PRE_MODESET 1
494#define _DRM_POST_MODESET 2
495
496/*
497 * DRM_IOCTL_MODESET_CTL ioctl argument type
498 *
499 * \sa drmModesetCtl().
500 */
501struct drm_modeset_ctl {
502 __u32 crtc;
503 __u32 cmd;
504};
505
506/*
507 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
508 *
509 * \sa drmAgpEnable().
510 */
511struct drm_agp_mode {
512 unsigned long mode; /**< AGP mode */
513};
514
515/*
516 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
517 *
518 * \sa drmAgpAlloc() and drmAgpFree().
519 */
520struct drm_agp_buffer {
521 unsigned long size; /**< In bytes -- will round to page boundary */
522 unsigned long handle; /**< Used for binding / unbinding */
523 unsigned long type; /**< Type of memory to allocate */
524 unsigned long physical; /**< Physical used by i810 */
525};
526
527/*
528 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
529 *
530 * \sa drmAgpBind() and drmAgpUnbind().
531 */
532struct drm_agp_binding {
533 unsigned long handle; /**< From drm_agp_buffer */
534 unsigned long offset; /**< In bytes -- will round to page boundary */
535};
536
537/*
538 * DRM_IOCTL_AGP_INFO ioctl argument type.
539 *
540 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
541 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
542 * drmAgpVendorId() and drmAgpDeviceId().
543 */
544struct drm_agp_info {
545 int agp_version_major;
546 int agp_version_minor;
547 unsigned long mode;
548 unsigned long aperture_base; /* physical address */
549 unsigned long aperture_size; /* bytes */
550 unsigned long memory_allowed; /* bytes */
551 unsigned long memory_used;
552
553 /* PCI information */
554 unsigned short id_vendor;
555 unsigned short id_device;
556};
557
558/*
559 * DRM_IOCTL_SG_ALLOC ioctl argument type.
560 */
561struct drm_scatter_gather {
562 unsigned long size; /**< In bytes -- will round to page boundary */
563 unsigned long handle; /**< Used for mapping / unmapping */
564};
565
566/*
567 * DRM_IOCTL_SET_VERSION ioctl argument type.
568 */
569struct drm_set_version {
570 int drm_di_major;
571 int drm_di_minor;
572 int drm_dd_major;
573 int drm_dd_minor;
574};
575
576/**
577 * struct drm_gem_close - Argument for &DRM_IOCTL_GEM_CLOSE ioctl.
578 * @handle: Handle of the object to be closed.
579 * @pad: Padding.
580 *
581 * Releases the handle to an mm object.
582 */
583struct drm_gem_close {
584 __u32 handle;
585 __u32 pad;
586};
587
588/**
589 * struct drm_gem_flink - Argument for &DRM_IOCTL_GEM_FLINK ioctl.
590 * @handle: Handle for the object being named.
591 * @name: Returned global name.
592 *
593 * Create a global name for an object, returning the name.
594 *
595 * Note that the name does not hold a reference; when the object
596 * is freed, the name goes away.
597 */
598struct drm_gem_flink {
599 __u32 handle;
600 __u32 name;
601};
602
603/**
604 * struct drm_gem_open - Argument for &DRM_IOCTL_GEM_OPEN ioctl.
605 * @name: Name of object being opened.
606 * @handle: Returned handle for the object.
607 * @size: Returned size of the object
608 *
609 * Open an object using the global name, returning a handle and the size.
610 *
611 * This handle (of course) holds a reference to the object, so the object
612 * will not go away until the handle is deleted.
613 */
614struct drm_gem_open {
615 __u32 name;
616 __u32 handle;
617 __u64 size;
618};
619
620/**
621 * struct drm_gem_change_handle - Argument for &DRM_IOCTL_GEM_CHANGE_HANDLE ioctl.
622 * @handle: The handle of a gem object.
623 * @new_handle: An available gem handle.
624 *
625 * This ioctl changes the handle of a GEM object to the specified one.
626 * The new handle must be unused. On success the old handle is closed
627 * and all further IOCTL should refer to the new handle only.
628 * Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle.
629 */
630struct drm_gem_change_handle {
631 __u32 handle;
632 __u32 new_handle;
633};
634
635/**
636 * DRM_CAP_DUMB_BUFFER
637 *
638 * If set to 1, the driver supports creating dumb buffers via the
639 * &DRM_IOCTL_MODE_CREATE_DUMB ioctl.
640 */
641#define DRM_CAP_DUMB_BUFFER 0x1
642/**
643 * DRM_CAP_VBLANK_HIGH_CRTC
644 *
645 * If set to 1, the kernel supports specifying a :ref:`CRTC index<crtc_index>`
646 * in the high bits of &drm_wait_vblank_request.type.
647 *
648 * Starting kernel version 2.6.39, this capability is always set to 1.
649 */
650#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
651/**
652 * DRM_CAP_DUMB_PREFERRED_DEPTH
653 *
654 * The preferred bit depth for dumb buffers.
655 *
656 * The bit depth is the number of bits used to indicate the color of a single
657 * pixel excluding any padding. This is different from the number of bits per
658 * pixel. For instance, XRGB8888 has a bit depth of 24 but has 32 bits per
659 * pixel.
660 *
661 * Note that this preference only applies to dumb buffers, it's irrelevant for
662 * other types of buffers.
663 */
664#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
665/**
666 * DRM_CAP_DUMB_PREFER_SHADOW
667 *
668 * If set to 1, the driver prefers userspace to render to a shadow buffer
669 * instead of directly rendering to a dumb buffer. For best speed, userspace
670 * should do streaming ordered memory copies into the dumb buffer and never
671 * read from it.
672 *
673 * Note that this preference only applies to dumb buffers, it's irrelevant for
674 * other types of buffers.
675 */
676#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
677/**
678 * DRM_CAP_PRIME
679 *
680 * Bitfield of supported PRIME sharing capabilities. See &DRM_PRIME_CAP_IMPORT
681 * and &DRM_PRIME_CAP_EXPORT.
682 *
683 * Starting from kernel version 6.6, both &DRM_PRIME_CAP_IMPORT and
684 * &DRM_PRIME_CAP_EXPORT are always advertised.
685 *
686 * PRIME buffers are exposed as dma-buf file descriptors.
687 * See :ref:`prime_buffer_sharing`.
688 */
689#define DRM_CAP_PRIME 0x5
690/**
691 * DRM_PRIME_CAP_IMPORT
692 *
693 * If this bit is set in &DRM_CAP_PRIME, the driver supports importing PRIME
694 * buffers via the &DRM_IOCTL_PRIME_FD_TO_HANDLE ioctl.
695 *
696 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
697 */
698#define DRM_PRIME_CAP_IMPORT 0x1
699/**
700 * DRM_PRIME_CAP_EXPORT
701 *
702 * If this bit is set in &DRM_CAP_PRIME, the driver supports exporting PRIME
703 * buffers via the &DRM_IOCTL_PRIME_HANDLE_TO_FD ioctl.
704 *
705 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
706 */
707#define DRM_PRIME_CAP_EXPORT 0x2
708/**
709 * DRM_CAP_TIMESTAMP_MONOTONIC
710 *
711 * If set to 0, the kernel will report timestamps with ``CLOCK_REALTIME`` in
712 * struct drm_event_vblank. If set to 1, the kernel will report timestamps with
713 * ``CLOCK_MONOTONIC``. See ``clock_gettime(2)`` for the definition of these
714 * clocks.
715 *
716 * Starting from kernel version 2.6.39, the default value for this capability
717 * is 1. Starting kernel version 4.15, this capability is always set to 1.
718 */
719#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
720/**
721 * DRM_CAP_ASYNC_PAGE_FLIP
722 *
723 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy
724 * page-flips.
725 */
726#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
727/**
728 * DRM_CAP_CURSOR_WIDTH
729 *
730 * The ``CURSOR_WIDTH`` and ``CURSOR_HEIGHT`` capabilities return a valid
731 * width x height combination for the hardware cursor. The intention is that a
732 * hardware agnostic userspace can query a cursor plane size to use.
733 *
734 * Note that the cross-driver contract is to merely return a valid size;
735 * drivers are free to attach another meaning on top, eg. i915 returns the
736 * maximum plane size.
737 */
738#define DRM_CAP_CURSOR_WIDTH 0x8
739/**
740 * DRM_CAP_CURSOR_HEIGHT
741 *
742 * See &DRM_CAP_CURSOR_WIDTH.
743 */
744#define DRM_CAP_CURSOR_HEIGHT 0x9
745/**
746 * DRM_CAP_ADDFB2_MODIFIERS
747 *
748 * If set to 1, the driver supports supplying modifiers in the
749 * &DRM_IOCTL_MODE_ADDFB2 ioctl.
750 */
751#define DRM_CAP_ADDFB2_MODIFIERS 0x10
752/**
753 * DRM_CAP_PAGE_FLIP_TARGET
754 *
755 * If set to 1, the driver supports the &DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE and
756 * &DRM_MODE_PAGE_FLIP_TARGET_RELATIVE flags in
757 * &drm_mode_crtc_page_flip_target.flags for the &DRM_IOCTL_MODE_PAGE_FLIP
758 * ioctl.
759 */
760#define DRM_CAP_PAGE_FLIP_TARGET 0x11
761/**
762 * DRM_CAP_CRTC_IN_VBLANK_EVENT
763 *
764 * If set to 1, the kernel supports reporting the CRTC ID in
765 * &drm_event_vblank.crtc_id for the &DRM_EVENT_VBLANK and
766 * &DRM_EVENT_FLIP_COMPLETE events.
767 *
768 * Starting kernel version 4.12, this capability is always set to 1.
769 */
770#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
771/**
772 * DRM_CAP_SYNCOBJ
773 *
774 * If set to 1, the driver supports sync objects. See :ref:`drm_sync_objects`.
775 */
776#define DRM_CAP_SYNCOBJ 0x13
777/**
778 * DRM_CAP_SYNCOBJ_TIMELINE
779 *
780 * If set to 1, the driver supports timeline operations on sync objects. See
781 * :ref:`drm_sync_objects`.
782 */
783#define DRM_CAP_SYNCOBJ_TIMELINE 0x14
784/**
785 * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
786 *
787 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic
788 * commits.
789 */
790#define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15
791
792/* DRM_IOCTL_GET_CAP ioctl argument type */
793struct drm_get_cap {
794 __u64 capability;
795 __u64 value;
796};
797
798/**
799 * DRM_CLIENT_CAP_STEREO_3D
800 *
801 * If set to 1, the DRM core will expose the stereo 3D capabilities of the
802 * monitor by advertising the supported 3D layouts in the flags of struct
803 * drm_mode_modeinfo. See ``DRM_MODE_FLAG_3D_*``.
804 *
805 * This capability is always supported for all drivers starting from kernel
806 * version 3.13.
807 */
808#define DRM_CLIENT_CAP_STEREO_3D 1
809
810/**
811 * DRM_CLIENT_CAP_UNIVERSAL_PLANES
812 *
813 * If set to 1, the DRM core will expose all planes (overlay, primary, and
814 * cursor) to userspace.
815 *
816 * This capability has been introduced in kernel version 3.15. Starting from
817 * kernel version 3.17, this capability is always supported for all drivers.
818 */
819#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
820
821/**
822 * DRM_CLIENT_CAP_ATOMIC
823 *
824 * If set to 1, the DRM core will expose atomic properties to userspace. This
825 * implicitly enables &DRM_CLIENT_CAP_UNIVERSAL_PLANES and
826 * &DRM_CLIENT_CAP_ASPECT_RATIO.
827 *
828 * If the driver doesn't support atomic mode-setting, enabling this capability
829 * will fail with -EOPNOTSUPP.
830 *
831 * This capability has been introduced in kernel version 4.0. Starting from
832 * kernel version 4.2, this capability is always supported for atomic-capable
833 * drivers.
834 */
835#define DRM_CLIENT_CAP_ATOMIC 3
836
837/**
838 * DRM_CLIENT_CAP_ASPECT_RATIO
839 *
840 * If set to 1, the DRM core will provide aspect ratio information in modes.
841 * See ``DRM_MODE_FLAG_PIC_AR_*``.
842 *
843 * This capability is always supported for all drivers starting from kernel
844 * version 4.18.
845 */
846#define DRM_CLIENT_CAP_ASPECT_RATIO 4
847
848/**
849 * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS
850 *
851 * If set to 1, the DRM core will expose special connectors to be used for
852 * writing back to memory the scene setup in the commit. The client must enable
853 * &DRM_CLIENT_CAP_ATOMIC first.
854 *
855 * This capability is always supported for atomic-capable drivers starting from
856 * kernel version 4.19.
857 */
858#define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5
859
860/**
861 * DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT
862 *
863 * Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and
864 * virtualbox) have additional restrictions for cursor planes (thus
865 * making cursor planes on those drivers not truly universal,) e.g.
866 * they need cursor planes to act like one would expect from a mouse
867 * cursor and have correctly set hotspot properties.
868 * If this client cap is not set the DRM core will hide cursor plane on
869 * those virtualized drivers because not setting it implies that the
870 * client is not capable of dealing with those extra restictions.
871 * Clients which do set cursor hotspot and treat the cursor plane
872 * like a mouse cursor should set this property.
873 * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
874 *
875 * Setting this property on drivers which do not special case
876 * cursor planes (i.e. non-virtualized drivers) will return
877 * EOPNOTSUPP, which can be used by userspace to gauge
878 * requirements of the hardware/drivers they're running on.
879 *
880 * This capability is always supported for atomic-capable virtualized
881 * drivers starting from kernel version 6.6.
882 */
883#define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
884
885/**
886 * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
887 *
888 * If set to 1 the DRM core will allow setting the COLOR_PIPELINE
889 * property on a &drm_plane, as well as drm_colorop properties.
890 *
891 * Setting of these plane properties will be rejected when this client
892 * cap is set:
893 * - COLOR_ENCODING
894 * - COLOR_RANGE
895 *
896 * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
897 */
898#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7
899
900/* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
901struct drm_set_client_cap {
902 __u64 capability;
903 __u64 value;
904};
905
906#define DRM_RDWR O_RDWR
907#define DRM_CLOEXEC O_CLOEXEC
908struct drm_prime_handle {
909 __u32 handle;
910
911 /** Flags.. only applicable for handle->fd */
912 __u32 flags;
913
914 /** Returned dmabuf file descriptor */
915 __s32 fd;
916};
917
918struct drm_syncobj_create {
919 __u32 handle;
920#define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
921 __u32 flags;
922};
923
924struct drm_syncobj_destroy {
925 __u32 handle;
926 __u32 pad;
927};
928
929#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
930#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE (1 << 1)
931#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
932#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE (1 << 1)
933struct drm_syncobj_handle {
934 __u32 handle;
935 __u32 flags;
936
937 __s32 fd;
938 __u32 pad;
939
940 __u64 point;
941};
942
943struct drm_syncobj_transfer {
944 __u32 src_handle;
945 __u32 dst_handle;
946 __u64 src_point;
947 __u64 dst_point;
948 __u32 flags;
949 __u32 pad;
950};
951
952#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
953#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
954#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */
955#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */
956struct drm_syncobj_wait {
957 __u64 handles;
958 /* absolute timeout */
959 __s64 timeout_nsec;
960 __u32 count_handles;
961 __u32 flags;
962 __u32 first_signaled; /* only valid when not waiting all */
963 __u32 pad;
964 /**
965 * @deadline_nsec - fence deadline hint
966 *
967 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
968 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
969 * set.
970 */
971 __u64 deadline_nsec;
972};
973
974struct drm_syncobj_timeline_wait {
975 __u64 handles;
976 /* wait on specific timeline point for every handles*/
977 __u64 points;
978 /* absolute timeout */
979 __s64 timeout_nsec;
980 __u32 count_handles;
981 __u32 flags;
982 __u32 first_signaled; /* only valid when not waiting all */
983 __u32 pad;
984 /**
985 * @deadline_nsec - fence deadline hint
986 *
987 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
988 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
989 * set.
990 */
991 __u64 deadline_nsec;
992};
993
994/**
995 * struct drm_syncobj_eventfd
996 * @handle: syncobj handle.
997 * @flags: Zero to wait for the point to be signalled, or
998 * &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE to wait for a fence to be
999 * available for the point.
1000 * @point: syncobj timeline point (set to zero for binary syncobjs).
1001 * @fd: Existing eventfd to sent events to.
1002 * @pad: Must be zero.
1003 *
1004 * Register an eventfd to be signalled by a syncobj. The eventfd counter will
1005 * be incremented by one.
1006 */
1007struct drm_syncobj_eventfd {
1008 __u32 handle;
1009 __u32 flags;
1010 __u64 point;
1011 __s32 fd;
1012 __u32 pad;
1013};
1014
1015
1016struct drm_syncobj_array {
1017 __u64 handles;
1018 __u32 count_handles;
1019 __u32 pad;
1020};
1021
1022#define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */
1023struct drm_syncobj_timeline_array {
1024 __u64 handles;
1025 __u64 points;
1026 __u32 count_handles;
1027 __u32 flags;
1028};
1029
1030
1031/* Query current scanout sequence number */
1032struct drm_crtc_get_sequence {
1033 __u32 crtc_id; /* requested crtc_id */
1034 __u32 active; /* return: crtc output is active */
1035 __u64 sequence; /* return: most recent vblank sequence */
1036 __s64 sequence_ns; /* return: most recent time of first pixel out */
1037};
1038
1039/* Queue event to be delivered at specified sequence. Time stamp marks
1040 * when the first pixel of the refresh cycle leaves the display engine
1041 * for the display
1042 */
1043#define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */
1044#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */
1045
1046struct drm_crtc_queue_sequence {
1047 __u32 crtc_id;
1048 __u32 flags;
1049 __u64 sequence; /* on input, target sequence. on output, actual sequence */
1050 __u64 user_data; /* user data passed to event */
1051};
1052
1053#define DRM_CLIENT_NAME_MAX_LEN 64
1054struct drm_set_client_name {
1055 __u64 name_len;
1056 __u64 name;
1057};
1058
1059
1060#if defined(__cplusplus)
1061}
1062#endif
1063
1064#include "drm_mode.h"
1065
1066#if defined(__cplusplus)
1067extern "C" {
1068#endif
1069
1070#define DRM_IOCTL_BASE 'd'
1071#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
1072#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
1073#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
1074#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
1075
1076#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
1077#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
1078#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
1079#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
1080#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
1081#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
1082#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
1083#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
1084#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
1085/**
1086 * DRM_IOCTL_GEM_CLOSE - Close a GEM handle.
1087 *
1088 * GEM handles are not reference-counted by the kernel. User-space is
1089 * responsible for managing their lifetime. For example, if user-space imports
1090 * the same memory object twice on the same DRM file description, the same GEM
1091 * handle is returned by both imports, and user-space needs to ensure
1092 * &DRM_IOCTL_GEM_CLOSE is performed once only. The same situation can happen
1093 * when a memory object is allocated, then exported and imported again on the
1094 * same DRM file description. The &DRM_IOCTL_MODE_GETFB2 IOCTL is an exception
1095 * and always returns fresh new GEM handles even if an existing GEM handle
1096 * already refers to the same memory object before the IOCTL is performed.
1097 */
1098#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
1099#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
1100#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
1101#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
1102#define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
1103
1104#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
1105#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
1106#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
1107#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
1108#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
1109#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
1110#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
1111#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
1112#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
1113#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
1114#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
1115
1116#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
1117
1118#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
1119#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
1120
1121#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
1122#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
1123
1124#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
1125#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
1126#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
1127#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
1128#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
1129#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
1130#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
1131#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
1132#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
1133#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
1134#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
1135#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
1136#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
1137
1138/**
1139 * DRM_IOCTL_PRIME_HANDLE_TO_FD - Convert a GEM handle to a DMA-BUF FD.
1140 *
1141 * User-space sets &drm_prime_handle.handle with the GEM handle to export and
1142 * &drm_prime_handle.flags, and gets back a DMA-BUF file descriptor in
1143 * &drm_prime_handle.fd.
1144 *
1145 * The export can fail for any driver-specific reason, e.g. because export is
1146 * not supported for this specific GEM handle (but might be for others).
1147 *
1148 * Support for exporting DMA-BUFs is advertised via &DRM_PRIME_CAP_EXPORT.
1149 */
1150#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
1151/**
1152 * DRM_IOCTL_PRIME_FD_TO_HANDLE - Convert a DMA-BUF FD to a GEM handle.
1153 *
1154 * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to
1155 * import, and gets back a GEM handle in &drm_prime_handle.handle.
1156 * &drm_prime_handle.flags is unused.
1157 *
1158 * If an existing GEM handle refers to the memory object backing the DMA-BUF,
1159 * that GEM handle is returned. Therefore user-space which needs to handle
1160 * arbitrary DMA-BUFs must have a user-space lookup data structure to manually
1161 * reference-count duplicated GEM handles. For more information see
1162 * &DRM_IOCTL_GEM_CLOSE.
1163 *
1164 * The import can fail for any driver-specific reason, e.g. because import is
1165 * only supported for DMA-BUFs allocated on this DRM device.
1166 *
1167 * Support for importing DMA-BUFs is advertised via &DRM_PRIME_CAP_IMPORT.
1168 */
1169#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
1170
1171#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
1172#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
1173#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
1174#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
1175#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
1176#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
1177#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
1178#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
1179
1180#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
1181#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
1182
1183#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
1184
1185#define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
1186#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
1187
1188#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
1189
1190#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
1191#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
1192#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
1193#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
1194#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
1195#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
1196#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
1197#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
1198#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
1199#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
1200
1201#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
1202#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
1203#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
1204#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
1205#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
1206/**
1207 * DRM_IOCTL_MODE_RMFB - Remove a framebuffer.
1208 *
1209 * This removes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
1210 * argument is a framebuffer object ID.
1211 *
1212 * Warning: removing a framebuffer currently in-use on an enabled plane will
1213 * disable that plane. The CRTC the plane is linked to may also be disabled
1214 * (depending on driver capabilities).
1215 */
1216#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
1217#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
1218#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
1219
1220/**
1221 * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object.
1222 *
1223 * KMS dumb buffers provide a very primitive way to allocate a buffer object
1224 * suitable for scanout and map it for software rendering. KMS dumb buffers are
1225 * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb
1226 * buffers are not suitable to be displayed on any other device than the KMS
1227 * device where they were allocated from. Also see
1228 * :ref:`kms_dumb_buffer_objects`.
1229 *
1230 * The IOCTL argument is a struct drm_mode_create_dumb.
1231 *
1232 * User-space is expected to create a KMS dumb buffer via this IOCTL, then add
1233 * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via
1234 * &DRM_IOCTL_MODE_MAP_DUMB.
1235 *
1236 * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported.
1237 * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate
1238 * driver preferences for dumb buffers.
1239 */
1240#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
1241#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
1242#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
1243#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
1244#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
1245#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
1246#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
1247#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
1248#define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
1249#define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
1250#define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
1251#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
1252#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
1253
1254#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
1255#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
1256#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
1257#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
1258#define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait)
1259#define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array)
1260#define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array)
1261
1262#define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
1263#define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
1264#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)
1265#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
1266
1267#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)
1268#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array)
1269#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer)
1270#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)
1271
1272/**
1273 * DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata.
1274 *
1275 * This queries metadata about a framebuffer. User-space fills
1276 * &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the
1277 * struct as the output.
1278 *
1279 * If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles
1280 * will be filled with GEM buffer handles. Fresh new GEM handles are always
1281 * returned, even if another GEM handle referring to the same memory object
1282 * already exists on the DRM file description. The caller is responsible for
1283 * removing the new handles, e.g. via the &DRM_IOCTL_GEM_CLOSE IOCTL. The same
1284 * new handle will be returned for multiple planes in case they use the same
1285 * memory object. Planes are valid until one has a zero handle -- this can be
1286 * used to compute the number of planes.
1287 *
1288 * Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid
1289 * until one has a zero &drm_mode_fb_cmd2.pitches.
1290 *
1291 * If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set
1292 * in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the
1293 * modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier.
1294 *
1295 * To obtain DMA-BUF FDs for each plane without leaking GEM handles, user-space
1296 * can export each handle via &DRM_IOCTL_PRIME_HANDLE_TO_FD, then immediately
1297 * close each unique handle via &DRM_IOCTL_GEM_CLOSE, making sure to not
1298 * double-close handles which are specified multiple times in the array.
1299 */
1300#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
1301
1302/**
1303 * DRM_IOCTL_SYNCOBJ_EVENTFD - Register an eventfd to be signalled by a syncobj.
1304 *
1305 * This can be used to integrate a syncobj in an event loop.
1306 *
1307 * The IOCTL argument is a struct drm_syncobj_eventfd.
1308 */
1309#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
1310
1311/**
1312 * DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer.
1313 *
1314 * This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
1315 * argument is a framebuffer object ID.
1316 *
1317 * This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable
1318 * planes and CRTCs. As long as the framebuffer is used by a plane, it's kept
1319 * alive. When the plane no longer uses the framebuffer (because the
1320 * framebuffer is replaced with another one, or the plane is disabled), the
1321 * framebuffer is cleaned up.
1322 *
1323 * This is useful to implement flicker-free transitions between two processes.
1324 *
1325 * Depending on the threat model, user-space may want to ensure that the
1326 * framebuffer doesn't expose any sensitive user information: closed
1327 * framebuffers attached to a plane can be read back by the next DRM master.
1328 */
1329#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
1330
1331/**
1332 * DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file
1333 *
1334 * Having a name allows for easier tracking and debugging.
1335 * The length of the name (without null ending char) must be
1336 * <= DRM_CLIENT_NAME_MAX_LEN.
1337 * The call will fail if the name contains whitespaces or non-printable chars.
1338 */
1339#define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name)
1340
1341/**
1342 * DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle
1343 *
1344 * Some applications (notably CRIU) need objects to have specific gem handles.
1345 * This ioctl changes the object at one gem handle to use a new gem handle.
1346 */
1347#define DRM_IOCTL_GEM_CHANGE_HANDLE DRM_IOWR(0xD2, struct drm_gem_change_handle)
1348
1349/*
1350 * Device specific ioctls should only be in their respective headers
1351 * The device specific ioctl range is from 0x40 to 0x9f.
1352 * Generic IOCTLS restart at 0xA0.
1353 *
1354 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
1355 * drmCommandReadWrite().
1356 */
1357#define DRM_COMMAND_BASE 0x40
1358#define DRM_COMMAND_END 0xA0
1359
1360/**
1361 * struct drm_event - Header for DRM events
1362 * @type: event type.
1363 * @length: total number of payload bytes (including header).
1364 *
1365 * This struct is a header for events written back to user-space on the DRM FD.
1366 * A read on the DRM FD will always only return complete events: e.g. if the
1367 * read buffer is 100 bytes large and there are two 64 byte events pending,
1368 * only one will be returned.
1369 *
1370 * Event types 0 - 0x7fffffff are generic DRM events, 0x80000000 and
1371 * up are chipset specific. Generic DRM events include &DRM_EVENT_VBLANK,
1372 * &DRM_EVENT_FLIP_COMPLETE and &DRM_EVENT_CRTC_SEQUENCE.
1373 */
1374struct drm_event {
1375 __u32 type;
1376 __u32 length;
1377};
1378
1379/**
1380 * DRM_EVENT_VBLANK - vertical blanking event
1381 *
1382 * This event is sent in response to &DRM_IOCTL_WAIT_VBLANK with the
1383 * &_DRM_VBLANK_EVENT flag set.
1384 *
1385 * The event payload is a struct drm_event_vblank.
1386 */
1387#define DRM_EVENT_VBLANK 0x01
1388/**
1389 * DRM_EVENT_FLIP_COMPLETE - page-flip completion event
1390 *
1391 * This event is sent in response to an atomic commit or legacy page-flip with
1392 * the &DRM_MODE_PAGE_FLIP_EVENT flag set.
1393 *
1394 * The event payload is a struct drm_event_vblank.
1395 */
1396#define DRM_EVENT_FLIP_COMPLETE 0x02
1397/**
1398 * DRM_EVENT_CRTC_SEQUENCE - CRTC sequence event
1399 *
1400 * This event is sent in response to &DRM_IOCTL_CRTC_QUEUE_SEQUENCE.
1401 *
1402 * The event payload is a struct drm_event_crtc_sequence.
1403 */
1404#define DRM_EVENT_CRTC_SEQUENCE 0x03
1405
1406struct drm_event_vblank {
1407 struct drm_event base;
1408 __u64 user_data;
1409 __u32 tv_sec;
1410 __u32 tv_usec;
1411 __u32 sequence;
1412 __u32 crtc_id; /* 0 on older kernels that do not support this */
1413};
1414
1415/* Event delivered at sequence. Time stamp marks when the first pixel
1416 * of the refresh cycle leaves the display engine for the display
1417 */
1418struct drm_event_crtc_sequence {
1419 struct drm_event base;
1420 __u64 user_data;
1421 __s64 time_ns;
1422 __u64 sequence;
1423};
1424
1425/* typedef area */
1426typedef struct drm_clip_rect drm_clip_rect_t;
1427typedef struct drm_drawable_info drm_drawable_info_t;
1428typedef struct drm_tex_region drm_tex_region_t;
1429typedef struct drm_hw_lock drm_hw_lock_t;
1430typedef struct drm_version drm_version_t;
1431typedef struct drm_unique drm_unique_t;
1432typedef struct drm_list drm_list_t;
1433typedef struct drm_block drm_block_t;
1434typedef struct drm_control drm_control_t;
1435typedef enum drm_map_type drm_map_type_t;
1436typedef enum drm_map_flags drm_map_flags_t;
1437typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
1438typedef struct drm_map drm_map_t;
1439typedef struct drm_client drm_client_t;
1440typedef enum drm_stat_type drm_stat_type_t;
1441typedef struct drm_stats drm_stats_t;
1442typedef enum drm_lock_flags drm_lock_flags_t;
1443typedef struct drm_lock drm_lock_t;
1444typedef enum drm_dma_flags drm_dma_flags_t;
1445typedef struct drm_buf_desc drm_buf_desc_t;
1446typedef struct drm_buf_info drm_buf_info_t;
1447typedef struct drm_buf_free drm_buf_free_t;
1448typedef struct drm_buf_pub drm_buf_pub_t;
1449typedef struct drm_buf_map drm_buf_map_t;
1450typedef struct drm_dma drm_dma_t;
1451typedef union drm_wait_vblank drm_wait_vblank_t;
1452typedef struct drm_agp_mode drm_agp_mode_t;
1453typedef enum drm_ctx_flags drm_ctx_flags_t;
1454typedef struct drm_ctx drm_ctx_t;
1455typedef struct drm_ctx_res drm_ctx_res_t;
1456typedef struct drm_draw drm_draw_t;
1457typedef struct drm_update_draw drm_update_draw_t;
1458typedef struct drm_auth drm_auth_t;
1459typedef struct drm_irq_busid drm_irq_busid_t;
1460typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
1461
1462typedef struct drm_agp_buffer drm_agp_buffer_t;
1463typedef struct drm_agp_binding drm_agp_binding_t;
1464typedef struct drm_agp_info drm_agp_info_t;
1465typedef struct drm_scatter_gather drm_scatter_gather_t;
1466typedef struct drm_set_version drm_set_version_t;
1467
1468#if defined(__cplusplus)
1469}
1470#endif
1471
1472#endif