1/* $OpenBSD: intr.h,v 1.16 2025/05/10 10:11:02 visa Exp $ */
2/* $NetBSD: intr.h,v 1.12 2003/06/16 20:00:59 thorpej Exp $ */
3
4/*
5 * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
6 * All rights reserved.
7 *
8 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed for the NetBSD Project by
21 * Wasabi Systems, Inc.
22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 * or promote products derived from this software without specific prior
24 * written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#ifndef _MACHINE_INTR_H_
40#define _MACHINE_INTR_H_
41
42#ifdef _KERNEL
43
44/* Interrupt priority `levels'; not mutually exclusive. */
45#define IPL_NONE 0 /* nothing */
46#define IPL_SOFTCLOCK 2 /* soft clock interrupts */
47#define IPL_SOFTNET 3 /* soft network interrupts */
48#define IPL_SOFTTTY 4 /* soft terminal interrupts */
49#define IPL_BIO 5 /* block I/O */
50#define IPL_NET 6 /* network */
51#define IPL_TTY 7 /* terminal */
52#define IPL_VM 8 /* memory allocation */
53#define IPL_AUDIO 9 /* audio */
54#define IPL_CLOCK 10 /* clock */
55#define IPL_SCHED IPL_CLOCK
56#define IPL_STATCLOCK IPL_CLOCK
57#define IPL_HIGH 11 /* everything */
58#define IPL_IPI 12 /* interprocessor interrupt */
59#define NIPL 13 /* number of levels */
60
61#define IPL_MPFLOOR IPL_TTY
62/* Interrupt priority 'flags'. */
63#define IPL_IRQMASK 0xf /* priority only */
64#define IPL_FLAGMASK 0xf00 /* flags only*/
65#define IPL_MPSAFE 0x100 /* 'mpsafe' interrupt, no kernel lock */
66
67/* Interrupt sharing types. */
68#define IST_NONE 0 /* none */
69#define IST_PULSE 1 /* pulsed */
70#define IST_EDGE 2 /* edge-triggered */
71#define IST_LEVEL 3 /* level-triggered */
72
73#define IST_LEVEL_LOW IST_LEVEL
74#define IST_LEVEL_HIGH 4
75#define IST_EDGE_FALLING IST_EDGE
76#define IST_EDGE_RISING 5
77#define IST_EDGE_BOTH 6
78
79#define __USE_MI_SOFTINTR
80
81#include <sys/softintr.h>
82
83#ifndef _LOCORE
84#include <sys/queue.h>
85
86struct cpu_info;
87
88int splraise(int);
89int spllower(int);
90void splx(int);
91
92void arm_do_pending_intr(int);
93void arm_set_intr_handler(int (*raise)(int), int (*lower)(int),
94 void (*x)(int), void (*setipl)(int),
95 void *(*intr_establish)(int irqno, int level, struct cpu_info *ci,
96 int (*func)(void *), void *cookie, char *name),
97 void (*intr_disestablish)(void *cookie),
98 const char *(*intr_string)(void *cookie),
99 void (*intr_handle)(void *));
100
101struct arm_intr_func {
102 int (*raise)(int);
103 int (*lower)(int);
104 void (*x)(int);
105 void (*setipl)(int);
106 void *(*intr_establish)(int irqno, int level, struct cpu_info *,
107 int (*func)(void *), void *cookie, char *name);
108 void (*intr_disestablish)(void *cookie);
109 const char *(*intr_string)(void *cookie);
110};
111
112extern struct arm_intr_func arm_intr_func;
113
114#define splraise(cpl) (arm_intr_func.raise(cpl))
115#define _splraise(cpl) (arm_intr_func.raise(cpl))
116#define spllower(cpl) (arm_intr_func.lower(cpl))
117#define splx(cpl) (arm_intr_func.x(cpl))
118
119#define splhigh() splraise(IPL_HIGH)
120#define splsoftclock() splraise(IPL_SOFTCLOCK)
121#define splsoftnet() splraise(IPL_SOFTNET)
122#define splbio() splraise(IPL_BIO)
123#define splnet() splraise(IPL_NET)
124#define spltty() splraise(IPL_TTY)
125#define splvm() splraise(IPL_VM)
126#define splaudio() splraise(IPL_AUDIO)
127#define splclock() splraise(IPL_CLOCK)
128#define splstatclock() splraise(IPL_STATCLOCK)
129
130#define spl0() spllower(IPL_NONE)
131
132#define splsched() splhigh()
133
134void intr_barrier(void *);
135
136void arm_init_smask(void); /* XXX */
137extern uint32_t arm_smask[NIPL];
138void arm_setsoftintr(int si);
139
140#define softintr arm_setsoftintr
141
142void *arm_intr_establish(int irqno, int level, int (*func)(void *),
143 void *cookie, char *name);
144void arm_intr_disestablish(void *cookie);
145const char *arm_intr_string(void *cookie);
146
147/* XXX - this is probably the wrong location for this */
148void arm_clock_register(void (*)(void), void (*)(u_int), void (*)(int),
149 void (*)(void));
150
151struct interrupt_controller {
152 int ic_node;
153 void *ic_cookie;
154 void *(*ic_establish)(void *, int *, int, struct cpu_info *,
155 int (*)(void *), void *, char *);
156 void *(*ic_establish_msi)(void *, uint64_t *, uint64_t *, int,
157 struct cpu_info *, int (*)(void *), void *, char *);
158 void (*ic_disestablish)(void *);
159 void (*ic_enable)(void *);
160 void (*ic_disable)(void *);
161 void (*ic_route)(void *, int, struct cpu_info *);
162 void (*ic_cpu_enable)(void);
163 void (*ic_barrier)(void *);
164
165 LIST_ENTRY(interrupt_controller) ic_list;
166 uint32_t ic_phandle;
167 uint32_t ic_cells;
168};
169
170void arm_intr_init_fdt(void);
171void arm_intr_register_fdt(struct interrupt_controller *);
172void *arm_intr_establish_fdt(int, int, int (*)(void *),
173 void *, char *);
174void *arm_intr_establish_fdt_cpu(int, int, struct cpu_info *,
175 int (*)(void *), void *, char *);
176void *arm_intr_establish_fdt_idx(int, int, int, int (*)(void *),
177 void *, char *);
178void *arm_intr_establish_fdt_idx_cpu(int, int, int, struct cpu_info *,
179 int (*)(void *), void *, char *);
180void *arm_intr_establish_fdt_imap(int, int *, int, int, int (*)(void *),
181 void *, char *);
182void *arm_intr_establish_fdt_imap_cpu(int, int *, int, int,
183 struct cpu_info *, int (*)(void *), void *, char *);
184void *arm_intr_establish_fdt_msi(int, uint64_t *, uint64_t *, int,
185 int (*)(void *), void *, char *);
186void *arm_intr_establish_fdt_msi_cpu(int, uint64_t *, uint64_t *, int,
187 struct cpu_info *, int (*)(void *), void *, char *);
188void arm_intr_disestablish_fdt(void *);
189void arm_intr_enable(void *);
190void arm_intr_disable(void *);
191void arm_intr_route(void *, int, struct cpu_info *);
192void arm_intr_cpu_enable(void);
193
194void *arm_intr_parent_establish_fdt(void *, int *, int,
195 struct cpu_info *ci, int (*)(void *), void *, char *);
196void arm_intr_parent_disestablish_fdt(void *);
197
198void arm_send_ipi(struct cpu_info *, int);
199extern void (*intr_send_ipi_func)(struct cpu_info *, int);
200
201#define ARM_IPI_NOP 0
202#define ARM_IPI_DDB 1
203
204#ifdef DIAGNOSTIC
205/*
206 * Although this function is implemented in MI code, it must be in this MD
207 * header because we don't want this header to include MI includes.
208 */
209void splassert_fail(int, int, const char *);
210extern int splassert_ctl;
211void arm_splassert_check(int, const char *);
212#define splassert(__wantipl) do { \
213 if (splassert_ctl > 0) { \
214 arm_splassert_check(__wantipl, __func__); \
215 } \
216} while (0)
217#define splsoftassert(wantipl) splassert(wantipl)
218#else
219#define splassert(wantipl) do { /* nothing */ } while (0)
220#define splsoftassert(wantipl) do { /* nothing */ } while (0)
221#endif
222
223#endif /* ! _LOCORE */
224
225#define ARM_IRQ_HANDLER arm_intr
226
227#endif /* _KERNEL */
228
229#endif /* _MACHINE_INTR_H_ */