1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (C) 2003
5 * Hidetoshi Shimokawa. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 *
18 * This product includes software developed by Hidetoshi Shimokawa.
19 *
20 * 4. Neither the name of the author nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 */
36
37struct fwdma_alloc {
38 bus_dma_tag_t dma_tag;
39 bus_dmamap_t dma_map;
40 void *v_addr;
41 bus_addr_t bus_addr;
42};
43
44struct fwdma_seg {
45 bus_dmamap_t dma_map;
46 void *v_addr;
47 bus_addr_t bus_addr;
48};
49
50struct fwdma_alloc_multi {
51 bus_size_t ssize;
52 bus_size_t esize;
53 int nseg;
54 bus_dma_tag_t dma_tag;
55 struct fwdma_seg seg[0];
56};
57
58static __inline void *
59fwdma_v_addr(struct fwdma_alloc_multi *am, int index)
60{
61 bus_size_t ssize = am->ssize;
62 int offset = am->esize * index;
63
64 return ((caddr_t)am->seg[offset / ssize].v_addr + (offset % ssize));
65}
66
67static __inline bus_addr_t
68fwdma_bus_addr(struct fwdma_alloc_multi *am, int index)
69{
70 bus_size_t ssize = am->ssize;
71 int offset = am->esize * index;
72
73 return (am->seg[offset / ssize].bus_addr + (offset % ssize));
74}
75
76static __inline void
77fwdma_sync(struct fwdma_alloc *dma, bus_dmasync_op_t op)
78{
79 bus_dmamap_sync(dma->dma_tag, dma->dma_map, op);
80}
81
82static __inline void
83fwdma_sync_multiseg(struct fwdma_alloc_multi *am,
84 int start, int end, bus_dmasync_op_t op)
85{
86 struct fwdma_seg *seg, *eseg;
87
88 seg = &am->seg[am->esize * start / am->ssize];
89 eseg = &am->seg[am->esize * end / am->ssize];
90 for (; seg <= eseg; seg++)
91 bus_dmamap_sync(am->dma_tag, seg->dma_map, op);
92}
93
94static __inline void
95fwdma_sync_multiseg_all(struct fwdma_alloc_multi *am, bus_dmasync_op_t op)
96{
97 struct fwdma_seg *seg;
98 int i;
99
100 seg = &am->seg[0];
101 for (i = 0; i < am->nseg; i++, seg++)
102 bus_dmamap_sync(am->dma_tag, seg->dma_map, op);
103}
104
105void *fwdma_malloc(struct firewire_comm *, int, bus_size_t, struct fwdma_alloc *, int);
106void fwdma_free(struct firewire_comm *, struct fwdma_alloc *);
107void *fwdma_malloc_size(bus_dma_tag_t, bus_dmamap_t *, bus_size_t, bus_addr_t *, int);
108void fwdma_free_size(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t);
109struct fwdma_alloc_multi *fwdma_malloc_multiseg(struct firewire_comm *,
110 int, int, int, int);
111void fwdma_free_multiseg(struct fwdma_alloc_multi *);