1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1998, 2001 Nicolas Souchu
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28#ifndef __IICONF_H
29#define __IICONF_H
30
31#include <sys/queue.h>
32#include <dev/iicbus/iic.h>
33
34
35#define IICPRI (PWAIT) /* XXX sleep/wakeup queue priority */
36
37#define LSB 0x1
38
39/*
40 * Options affecting iicbus_request_bus()
41 */
42#define IIC_DONTWAIT 0
43#define IIC_NOINTR 0
44#define IIC_WAIT 0x1
45#define IIC_INTR 0x2
46#define IIC_INTRWAIT (IIC_INTR | IIC_WAIT)
47#define IIC_RECURSIVE 0x4
48#define IIC_REQBUS_DEV 0x8 /* See struct iic_reqbus_data, below. */
49
50/*
51 * The original iicbus->bridge callback api took a pointer to an int containing
52 * flags. The new api allows a pointer to this struct, with IIC_REQBUS_DEV set
53 * in the flags to let the implementation know the pointer is actually to this
54 * struct which has the flags word first, followed by the device_t of the
55 * requesting bus and device.
56 *
57 * Note that the requesting device may not be a i2c slave device which is a
58 * child of the requested bus -- it may be a mux device which is electrically
59 * part of the bus hierarchy, but whose driver belongs to some other bus
60 * hierarchy such as gpio.
61 */
62struct iic_reqbus_data {
63 int flags; /* Flags from the set defined above. */
64 device_t bus; /* The iicbus being requested. */
65 device_t dev; /* The device requesting the bus. */
66};
67
68/*
69 * i2c modes
70 */
71#define IIC_MASTER 0x1
72#define IIC_SLAVE 0x2
73#define IIC_POLLED 0x4
74
75/*
76 * i2c speed
77 */
78#define IIC_UNKNOWN 0x0
79#define IIC_SLOW 0x1
80#define IIC_FAST 0x2
81#define IIC_FASTEST 0x3
82
83#define IIC_LAST_READ 0x1
84
85/*
86 * callback index
87 */
88#define IIC_REQUEST_BUS 0x1
89#define IIC_RELEASE_BUS 0x2
90
91/*
92 * interrupt events
93 */
94#define INTR_GENERAL 0x1 /* general call received */
95#define INTR_START 0x2 /* the I2C interface is addressed */
96#define INTR_STOP 0x3 /* stop condition received */
97#define INTR_RECEIVE 0x4 /* character received */
98#define INTR_TRANSMIT 0x5 /* character to transmit */
99#define INTR_ERROR 0x6 /* error */
100#define INTR_NOACK 0x7 /* no ack from master receiver */
101
102/*
103 * adapter layer errors
104 */
105#define IIC_NOERR 0x0 /* no error occurred */
106#define IIC_EBUSERR 0x1 /* bus error (hardware not in expected state) */
107#define IIC_ENOACK 0x2 /* ack not received until timeout */
108#define IIC_ETIMEOUT 0x3 /* timeout */
109#define IIC_EBUSBSY 0x4 /* bus busy (reserved by another client) */
110#define IIC_ESTATUS 0x5 /* status error */
111#define IIC_EUNDERFLOW 0x6 /* slave ready for more data */
112#define IIC_EOVERFLOW 0x7 /* too much data */
113#define IIC_ENOTSUPP 0x8 /* request not supported */
114#define IIC_ENOADDR 0x9 /* no address assigned to the interface */
115#define IIC_ERESOURCE 0xa /* resources (memory, whatever) unavailable */
116#define IIC_ERRNO __INT_MIN /* marker bit: errno is in low-order bits */
117
118/*
119 * Note that all iicbus functions return IIC_Exxxxx status values,
120 * except iic2errno() (obviously) and iicbus_started() (returns bool).
121 */
122extern int iic2errno(int);
123extern int errno2iic(int);
124extern int iicbus_request_bus(device_t, device_t, int);
125extern int iicbus_release_bus(device_t, device_t);
126extern device_t iicbus_alloc_bus(device_t);
127
128extern void iicbus_intr(device_t, int, char *);
129
130extern int iicbus_null_repeated_start(device_t, u_char);
131extern int iicbus_null_callback(device_t, int, caddr_t);
132
133#define iicbus_reset(bus,speed,addr,oldaddr) \
134 (IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
135
136/* basic I2C operations */
137extern int iicbus_started(device_t);
138extern int iicbus_start(device_t, u_char, int);
139extern int iicbus_stop(device_t);
140extern int iicbus_repeated_start(device_t, u_char, int);
141extern int iicbus_write(device_t, const char *, int, int *, int);
142extern int iicbus_read(device_t, char *, int, int *, int, int);
143
144/* single byte read/write functions, start/stop not managed */
145extern int iicbus_write_byte(device_t, char, int);
146extern int iicbus_read_byte(device_t, char *, int);
147
148/* Read/write operations with start/stop conditions managed */
149extern int iicbus_block_write(device_t, u_char, char *, int, int *);
150extern int iicbus_block_read(device_t, u_char, char *, int, int *);
151
152/* vectors of iic operations to pass to bridge */
153int iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
154int iicbus_transfer_excl(device_t bus, struct iic_msg *msgs, uint32_t nmsgs,
155 int how);
156int iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
157
158/*
159 * Simple register read/write routines, but the "register" can be any size.
160 * The transfers are done with iicbus_transfer_excl(). Reads use a repeat-start
161 * between sending the address and reading; writes use a single start/stop.
162 */
163int iicdev_readfrom(device_t _slavedev, uint8_t _regaddr, void *_buffer,
164 uint16_t _buflen, int _waithow);
165int iicdev_writeto(device_t _slavedev, uint8_t _regaddr, void *_buffer,
166 uint16_t _buflen, int _waithow);
167
168#define IICBUS_MODVER 1
169#define IICBUS_MINVER 1
170#define IICBUS_MAXVER 1
171#define IICBUS_PREFVER IICBUS_MODVER
172
173extern driver_t iicbb_driver;
174
175#define IICBB_MODVER 1
176#define IICBB_MINVER 1
177#define IICBB_MAXVER 1
178#define IICBB_PREFVER IICBB_MODVER
179
180#endif