| 1 | /*- |
| 2 | * SPDX-License-Identifier: BSD-3-Clause |
| 3 | * |
| 4 | * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions are |
| 9 | * met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
| 13 | * substantially similar to the "NO WARRANTY" disclaimer below |
| 14 | * ("Disclaimer") and any redistribution must be conditioned upon including |
| 15 | * a substantially similar Disclaimer requirement for further binary |
| 16 | * redistribution. |
| 17 | * 3. Neither the name of the LSI Logic Corporation nor the names of its |
| 18 | * contributors may be used to endorse or promote products derived from |
| 19 | * this software without specific prior written permission. |
| 20 | * |
| 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
| 25 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT |
| 31 | * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | * |
| 33 | * Name: mpi_init.h |
| 34 | * Title: MPI initiator mode messages and structures |
| 35 | * Creation Date: June 8, 2000 |
| 36 | * |
| 37 | * mpi_init.h Version: 01.05.09 |
| 38 | * |
| 39 | * Version History |
| 40 | * --------------- |
| 41 | * |
| 42 | * Date Version Description |
| 43 | * -------- -------- ------------------------------------------------------ |
| 44 | * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. |
| 45 | * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. |
| 46 | * 06-06-00 01.00.01 Update version number for 1.0 release. |
| 47 | * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. |
| 48 | * 11-02-00 01.01.01 Original release for post 1.0 work. |
| 49 | * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. |
| 50 | * 02-20-01 01.01.03 Started using MPI_POINTER. |
| 51 | * 03-27-01 01.01.04 Added structure offset comments. |
| 52 | * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. |
| 53 | * 08-08-01 01.02.01 Original release for v1.2 work. |
| 54 | * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. |
| 55 | * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for |
| 56 | * MSG_SCSI_IO_REPLY. |
| 57 | * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure |
| 58 | * Processor messages. |
| 59 | * 10-04-01 01.02.04 Added defines for SEP request Action field. |
| 60 | * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define |
| 61 | * for SCSI IO requests. |
| 62 | * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP. |
| 63 | * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define. |
| 64 | * 05-11-04 01.03.01 Original release for MPI v1.3. |
| 65 | * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request. |
| 66 | * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field |
| 67 | * and a reserved U16. |
| 68 | * Added new MSG_SCSI_IO32_REQUEST structure. |
| 69 | * Added a TaskType of Clear Task Set to SCSI |
| 70 | * Task Management request. |
| 71 | * 12-07-04 01.05.02 Added support for Task Management Query Task. |
| 72 | * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support |
| 73 | * WWID addressing. |
| 74 | * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request. |
| 75 | * Removed SCSI IO 32 Request. |
| 76 | * Modified SCSI Enclosure Processor Request and Reply to |
| 77 | * support Enclosure/Slot addressing rather than WWID |
| 78 | * addressing. |
| 79 | * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines. |
| 80 | * Added four new defines for SEP SlotStatus. |
| 81 | * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them |
| 82 | * unique in the first 32 characters. |
| 83 | * 03-27-06 01.05.07 Added Task Management type of Clear ACA. |
| 84 | * 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA. |
| 85 | * 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management |
| 86 | * Request: Do Not Send Task IU and Soft Reset Option. |
| 87 | * -------------------------------------------------------------------------- |
| 88 | */ |
| 89 | |
| 90 | #ifndef MPI_INIT_H |
| 91 | #define MPI_INIT_H |
| 92 | |
| 93 | /***************************************************************************** |
| 94 | * |
| 95 | * S C S I I n i t i a t o r M e s s a g e s |
| 96 | * |
| 97 | *****************************************************************************/ |
| 98 | |
| 99 | /****************************************************************************/ |
| 100 | /* SCSI IO messages and associated structures */ |
| 101 | /****************************************************************************/ |
| 102 | |
| 103 | typedef struct _MSG_SCSI_IO_REQUEST |
| 104 | { |
| 105 | U8 TargetID; /* 00h */ |
| 106 | U8 Bus; /* 01h */ |
| 107 | U8 ChainOffset; /* 02h */ |
| 108 | U8 Function; /* 03h */ |
| 109 | U8 CDBLength; /* 04h */ |
| 110 | U8 SenseBufferLength; /* 05h */ |
| 111 | U8 Reserved; /* 06h */ |
| 112 | U8 MsgFlags; /* 07h */ |
| 113 | U32 MsgContext; /* 08h */ |
| 114 | U8 LUN[8]; /* 0Ch */ |
| 115 | U32 Control; /* 14h */ |
| 116 | U8 CDB[16]; /* 18h */ |
| 117 | U32 DataLength; /* 28h */ |
| 118 | U32 SenseBufferLowAddr; /* 2Ch */ |
| 119 | SGE_IO_UNION SGL; /* 30h */ |
| 120 | } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, |
| 121 | SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; |
| 122 | |
| 123 | /* SCSI IO MsgFlags bits */ |
| 124 | |
| 125 | #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) |
| 126 | #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) |
| 127 | #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) |
| 128 | |
| 129 | #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) |
| 130 | #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) |
| 131 | #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) |
| 132 | |
| 133 | #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) |
| 134 | |
| 135 | /* SCSI IO LUN fields */ |
| 136 | |
| 137 | #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) |
| 138 | #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) |
| 139 | #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) |
| 140 | #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) |
| 141 | #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) |
| 142 | #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) |
| 143 | |
| 144 | /* SCSI IO Control bits */ |
| 145 | |
| 146 | #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) |
| 147 | #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) |
| 148 | #define MPI_SCSIIO_CONTROL_WRITE (0x01000000) |
| 149 | #define MPI_SCSIIO_CONTROL_READ (0x02000000) |
| 150 | |
| 151 | #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) |
| 152 | #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) |
| 153 | |
| 154 | #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) |
| 155 | #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) |
| 156 | #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) |
| 157 | #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) |
| 158 | #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) |
| 159 | #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) |
| 160 | #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) |
| 161 | |
| 162 | #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) |
| 163 | #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) |
| 164 | #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) |
| 165 | #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) |
| 166 | #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) |
| 167 | #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) |
| 168 | #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) |
| 169 | #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) |
| 170 | #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) |
| 171 | |
| 172 | /* SCSI IO reply structure */ |
| 173 | typedef struct _MSG_SCSI_IO_REPLY |
| 174 | { |
| 175 | U8 TargetID; /* 00h */ |
| 176 | U8 Bus; /* 01h */ |
| 177 | U8 MsgLength; /* 02h */ |
| 178 | U8 Function; /* 03h */ |
| 179 | U8 CDBLength; /* 04h */ |
| 180 | U8 SenseBufferLength; /* 05h */ |
| 181 | U8 Reserved; /* 06h */ |
| 182 | U8 MsgFlags; /* 07h */ |
| 183 | U32 MsgContext; /* 08h */ |
| 184 | U8 SCSIStatus; /* 0Ch */ |
| 185 | U8 SCSIState; /* 0Dh */ |
| 186 | U16 IOCStatus; /* 0Eh */ |
| 187 | U32 IOCLogInfo; /* 10h */ |
| 188 | U32 TransferCount; /* 14h */ |
| 189 | U32 SenseCount; /* 18h */ |
| 190 | U32 ResponseInfo; /* 1Ch */ |
| 191 | U16 TaskTag; /* 20h */ |
| 192 | U16 Reserved1; /* 22h */ |
| 193 | } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, |
| 194 | SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; |
| 195 | |
| 196 | /* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */ |
| 197 | |
| 198 | #define MPI_SCSI_STATUS_SUCCESS (0x00) |
| 199 | #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) |
| 200 | #define MPI_SCSI_STATUS_CONDITION_MET (0x04) |
| 201 | #define MPI_SCSI_STATUS_BUSY (0x08) |
| 202 | #define MPI_SCSI_STATUS_INTERMEDIATE (0x10) |
| 203 | #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) |
| 204 | #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) |
| 205 | #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) |
| 206 | #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) |
| 207 | #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) |
| 208 | |
| 209 | #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80) |
| 210 | #define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81) |
| 211 | #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82) |
| 212 | |
| 213 | /* SCSI IO Reply SCSIState values */ |
| 214 | |
| 215 | #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) |
| 216 | #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) |
| 217 | #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) |
| 218 | #define MPI_SCSI_STATE_TERMINATED (0x08) |
| 219 | #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) |
| 220 | #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) |
| 221 | |
| 222 | /* SCSI IO Reply ResponseInfo values */ |
| 223 | /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ |
| 224 | |
| 225 | #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) |
| 226 | #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) |
| 227 | #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) |
| 228 | #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) |
| 229 | #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) |
| 230 | #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) |
| 231 | #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) |
| 232 | |
| 233 | #define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF) |
| 234 | |
| 235 | /****************************************************************************/ |
| 236 | /* SCSI IO 32 messages and associated structures */ |
| 237 | /****************************************************************************/ |
| 238 | |
| 239 | typedef struct |
| 240 | { |
| 241 | U8 CDB[20]; /* 00h */ |
| 242 | U32 PrimaryReferenceTag; /* 14h */ |
| 243 | U16 PrimaryApplicationTag; /* 18h */ |
| 244 | U16 PrimaryApplicationTagMask; /* 1Ah */ |
| 245 | U32 TransferLength; /* 1Ch */ |
| 246 | } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32, |
| 247 | MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t; |
| 248 | |
| 249 | typedef struct |
| 250 | { |
| 251 | U8 CDB[16]; /* 00h */ |
| 252 | U32 DataLength; /* 10h */ |
| 253 | U32 PrimaryReferenceTag; /* 14h */ |
| 254 | U16 PrimaryApplicationTag; /* 18h */ |
| 255 | U16 PrimaryApplicationTagMask; /* 1Ah */ |
| 256 | U32 TransferLength; /* 1Ch */ |
| 257 | } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16, |
| 258 | MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t; |
| 259 | |
| 260 | typedef union |
| 261 | { |
| 262 | U8 CDB32[32]; |
| 263 | MPI_SCSI_IO32_CDB_EEDP32 EEDP32; |
| 264 | MPI_SCSI_IO32_CDB_EEDP16 EEDP16; |
| 265 | SGE_SIMPLE_UNION SGE; |
| 266 | } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION, |
| 267 | MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t; |
| 268 | |
| 269 | typedef struct |
| 270 | { |
| 271 | U8 TargetID; /* 00h */ |
| 272 | U8 Bus; /* 01h */ |
| 273 | U16 Reserved1; /* 02h */ |
| 274 | U32 Reserved2; /* 04h */ |
| 275 | } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM, |
| 276 | MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t; |
| 277 | |
| 278 | typedef union |
| 279 | { |
| 280 | MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID; |
| 281 | U64 WWID; |
| 282 | } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS, |
| 283 | MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t; |
| 284 | |
| 285 | typedef struct _MSG_SCSI_IO32_REQUEST |
| 286 | { |
| 287 | U8 Port; /* 00h */ |
| 288 | U8 Reserved1; /* 01h */ |
| 289 | U8 ChainOffset; /* 02h */ |
| 290 | U8 Function; /* 03h */ |
| 291 | U8 CDBLength; /* 04h */ |
| 292 | U8 SenseBufferLength; /* 05h */ |
| 293 | U8 Flags; /* 06h */ |
| 294 | U8 MsgFlags; /* 07h */ |
| 295 | U32 MsgContext; /* 08h */ |
| 296 | U8 LUN[8]; /* 0Ch */ |
| 297 | U32 Control; /* 14h */ |
| 298 | MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */ |
| 299 | U32 DataLength; /* 38h */ |
| 300 | U32 BidirectionalDataLength; /* 3Ch */ |
| 301 | U32 SecondaryReferenceTag; /* 40h */ |
| 302 | U16 SecondaryApplicationTag; /* 44h */ |
| 303 | U16 Reserved2; /* 46h */ |
| 304 | U16 EEDPFlags; /* 48h */ |
| 305 | U16 ApplicationTagTranslationMask; /* 4Ah */ |
| 306 | U32 EEDPBlockSize; /* 4Ch */ |
| 307 | MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */ |
| 308 | U8 SGLOffset0; /* 58h */ |
| 309 | U8 SGLOffset1; /* 59h */ |
| 310 | U8 SGLOffset2; /* 5Ah */ |
| 311 | U8 SGLOffset3; /* 5Bh */ |
| 312 | U32 Reserved3; /* 5Ch */ |
| 313 | U32 Reserved4; /* 60h */ |
| 314 | U32 SenseBufferLowAddr; /* 64h */ |
| 315 | SGE_IO_UNION SGL; /* 68h */ |
| 316 | } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST, |
| 317 | SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t; |
| 318 | |
| 319 | /* SCSI IO 32 MsgFlags bits */ |
| 320 | #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01) |
| 321 | #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00) |
| 322 | #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01) |
| 323 | |
| 324 | #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02) |
| 325 | #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00) |
| 326 | #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02) |
| 327 | |
| 328 | #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) |
| 329 | #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08) |
| 330 | #define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10) |
| 331 | #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20) |
| 332 | #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40) |
| 333 | |
| 334 | /* SCSI IO 32 Flags bits */ |
| 335 | #define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03) |
| 336 | #define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00) |
| 337 | #define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01) |
| 338 | |
| 339 | /* SCSI IO 32 LUN fields */ |
| 340 | #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) |
| 341 | #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) |
| 342 | #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) |
| 343 | #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) |
| 344 | #define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00) |
| 345 | #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00) |
| 346 | |
| 347 | /* SCSI IO 32 Control bits */ |
| 348 | #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000) |
| 349 | #define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000) |
| 350 | #define MPI_SCSIIO32_CONTROL_WRITE (0x01000000) |
| 351 | #define MPI_SCSIIO32_CONTROL_READ (0x02000000) |
| 352 | #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000) |
| 353 | |
| 354 | #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000) |
| 355 | #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26) |
| 356 | |
| 357 | #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700) |
| 358 | #define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000) |
| 359 | #define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100) |
| 360 | #define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200) |
| 361 | #define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400) |
| 362 | #define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500) |
| 363 | #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700) |
| 364 | |
| 365 | #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000) |
| 366 | #define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000) |
| 367 | #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000) |
| 368 | #define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000) |
| 369 | #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000) |
| 370 | #define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000) |
| 371 | #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000) |
| 372 | #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000) |
| 373 | #define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000) |
| 374 | |
| 375 | /* SCSI IO 32 EEDPFlags */ |
| 376 | #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007) |
| 377 | #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000) |
| 378 | #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001) |
| 379 | #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002) |
| 380 | #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003) |
| 381 | #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004) |
| 382 | #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006) |
| 383 | #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007) |
| 384 | |
| 385 | #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008) |
| 386 | #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010) |
| 387 | |
| 388 | #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700) |
| 389 | #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100) |
| 390 | #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200) |
| 391 | #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400) |
| 392 | #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8) |
| 393 | |
| 394 | #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000) |
| 395 | #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000) |
| 396 | #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000) |
| 397 | #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000) |
| 398 | |
| 399 | /* SCSIIO32 IO reply structure */ |
| 400 | typedef struct _MSG_SCSIIO32_IO_REPLY |
| 401 | { |
| 402 | U8 Port; /* 00h */ |
| 403 | U8 Reserved1; /* 01h */ |
| 404 | U8 MsgLength; /* 02h */ |
| 405 | U8 Function; /* 03h */ |
| 406 | U8 CDBLength; /* 04h */ |
| 407 | U8 SenseBufferLength; /* 05h */ |
| 408 | U8 Flags; /* 06h */ |
| 409 | U8 MsgFlags; /* 07h */ |
| 410 | U32 MsgContext; /* 08h */ |
| 411 | U8 SCSIStatus; /* 0Ch */ |
| 412 | U8 SCSIState; /* 0Dh */ |
| 413 | U16 IOCStatus; /* 0Eh */ |
| 414 | U32 IOCLogInfo; /* 10h */ |
| 415 | U32 TransferCount; /* 14h */ |
| 416 | U32 SenseCount; /* 18h */ |
| 417 | U32 ResponseInfo; /* 1Ch */ |
| 418 | U16 TaskTag; /* 20h */ |
| 419 | U16 Reserved2; /* 22h */ |
| 420 | U32 BidirectionalTransferCount; /* 24h */ |
| 421 | } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY, |
| 422 | SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t; |
| 423 | |
| 424 | /****************************************************************************/ |
| 425 | /* SCSI Task Management messages */ |
| 426 | /****************************************************************************/ |
| 427 | |
| 428 | typedef struct _MSG_SCSI_TASK_MGMT |
| 429 | { |
| 430 | U8 TargetID; /* 00h */ |
| 431 | U8 Bus; /* 01h */ |
| 432 | U8 ChainOffset; /* 02h */ |
| 433 | U8 Function; /* 03h */ |
| 434 | U8 Reserved; /* 04h */ |
| 435 | U8 TaskType; /* 05h */ |
| 436 | U8 Reserved1; /* 06h */ |
| 437 | U8 MsgFlags; /* 07h */ |
| 438 | U32 MsgContext; /* 08h */ |
| 439 | U8 LUN[8]; /* 0Ch */ |
| 440 | U32 Reserved2[7]; /* 14h */ |
| 441 | U32 TaskMsgContext; /* 30h */ |
| 442 | } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, |
| 443 | SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; |
| 444 | |
| 445 | /* TaskType values */ |
| 446 | |
| 447 | #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) |
| 448 | #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) |
| 449 | #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) |
| 450 | #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) |
| 451 | #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) |
| 452 | #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) |
| 453 | #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) |
| 454 | #define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) |
| 455 | |
| 456 | /* MsgFlags bits */ |
| 457 | #define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) |
| 458 | |
| 459 | #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) |
| 460 | #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) |
| 461 | #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) |
| 462 | |
| 463 | #define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08) |
| 464 | |
| 465 | /* SCSI Task Management Reply */ |
| 466 | typedef struct _MSG_SCSI_TASK_MGMT_REPLY |
| 467 | { |
| 468 | U8 TargetID; /* 00h */ |
| 469 | U8 Bus; /* 01h */ |
| 470 | U8 MsgLength; /* 02h */ |
| 471 | U8 Function; /* 03h */ |
| 472 | U8 ResponseCode; /* 04h */ |
| 473 | U8 TaskType; /* 05h */ |
| 474 | U8 Reserved1; /* 06h */ |
| 475 | U8 MsgFlags; /* 07h */ |
| 476 | U32 MsgContext; /* 08h */ |
| 477 | U8 Reserved2[2]; /* 0Ch */ |
| 478 | U16 IOCStatus; /* 0Eh */ |
| 479 | U32 IOCLogInfo; /* 10h */ |
| 480 | U32 TerminationCount; /* 14h */ |
| 481 | } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, |
| 482 | SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; |
| 483 | |
| 484 | /* ResponseCode values */ |
| 485 | #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) |
| 486 | #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) |
| 487 | #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) |
| 488 | #define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05) |
| 489 | #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) |
| 490 | #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) |
| 491 | #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) |
| 492 | |
| 493 | /****************************************************************************/ |
| 494 | /* SCSI Enclosure Processor messages */ |
| 495 | /****************************************************************************/ |
| 496 | |
| 497 | typedef struct _MSG_SEP_REQUEST |
| 498 | { |
| 499 | U8 TargetID; /* 00h */ |
| 500 | U8 Bus; /* 01h */ |
| 501 | U8 ChainOffset; /* 02h */ |
| 502 | U8 Function; /* 03h */ |
| 503 | U8 Action; /* 04h */ |
| 504 | U8 Flags; /* 05h */ |
| 505 | U8 Reserved1; /* 06h */ |
| 506 | U8 MsgFlags; /* 07h */ |
| 507 | U32 MsgContext; /* 08h */ |
| 508 | U32 SlotStatus; /* 0Ch */ |
| 509 | U32 Reserved2; /* 10h */ |
| 510 | U32 Reserved3; /* 14h */ |
| 511 | U32 Reserved4; /* 18h */ |
| 512 | U16 Slot; /* 1Ch */ |
| 513 | U16 EnclosureHandle; /* 1Eh */ |
| 514 | } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, |
| 515 | SEPRequest_t, MPI_POINTER pSEPRequest_t; |
| 516 | |
| 517 | /* Action defines */ |
| 518 | #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) |
| 519 | #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) |
| 520 | |
| 521 | /* Flags defines */ |
| 522 | #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) |
| 523 | #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00) |
| 524 | |
| 525 | /* SlotStatus bits for MSG_SEP_REQUEST */ |
| 526 | #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) |
| 527 | #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) |
| 528 | #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) |
| 529 | #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) |
| 530 | #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) |
| 531 | #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) |
| 532 | #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) |
| 533 | #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) |
| 534 | #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) |
| 535 | #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) |
| 536 | #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000) |
| 537 | #define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000) |
| 538 | #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000) |
| 539 | #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) |
| 540 | #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) |
| 541 | #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) |
| 542 | #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) |
| 543 | #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000) |
| 544 | #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) |
| 545 | #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) |
| 546 | #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) |
| 547 | #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) |
| 548 | |
| 549 | typedef struct _MSG_SEP_REPLY |
| 550 | { |
| 551 | U8 TargetID; /* 00h */ |
| 552 | U8 Bus; /* 01h */ |
| 553 | U8 MsgLength; /* 02h */ |
| 554 | U8 Function; /* 03h */ |
| 555 | U8 Action; /* 04h */ |
| 556 | U8 Reserved1; /* 05h */ |
| 557 | U8 Reserved2; /* 06h */ |
| 558 | U8 MsgFlags; /* 07h */ |
| 559 | U32 MsgContext; /* 08h */ |
| 560 | U16 Reserved3; /* 0Ch */ |
| 561 | U16 IOCStatus; /* 0Eh */ |
| 562 | U32 IOCLogInfo; /* 10h */ |
| 563 | U32 SlotStatus; /* 14h */ |
| 564 | U32 Reserved4; /* 18h */ |
| 565 | U16 Slot; /* 1Ch */ |
| 566 | U16 EnclosureHandle; /* 1Eh */ |
| 567 | } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, |
| 568 | SEPReply_t, MPI_POINTER pSEPReply_t; |
| 569 | |
| 570 | /* SlotStatus bits for MSG_SEP_REPLY */ |
| 571 | #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) |
| 572 | #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) |
| 573 | #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) |
| 574 | #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) |
| 575 | #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) |
| 576 | #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) |
| 577 | #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) |
| 578 | #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) |
| 579 | #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) |
| 580 | #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) |
| 581 | #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000) |
| 582 | #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000) |
| 583 | #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000) |
| 584 | #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) |
| 585 | #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) |
| 586 | #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) |
| 587 | #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) |
| 588 | #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) |
| 589 | #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000) |
| 590 | #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) |
| 591 | #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) |
| 592 | #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) |
| 593 | #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) |
| 594 | #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) |
| 595 | #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) |
| 596 | #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) |
| 597 | |
| 598 | #endif |