| 1 | /*	$NetBSD: cpu.h,v 1.135 2023/07/23 07:20:45 skrll Exp $	*/ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1992, 1993 |
| 5 | *	The Regents of the University of California. All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to Berkeley by |
| 8 | * Ralph Campbell and Rick Macklem. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * 3. Neither the name of the University nor the names of its contributors |
| 19 | * may be used to endorse or promote products derived from this software |
| 20 | * without specific prior written permission. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 28 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 29 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 30 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 32 | * SUCH DAMAGE. |
| 33 | * |
| 34 | *	@(#)cpu.h	8.4 (Berkeley) 1/4/94 |
| 35 | */ |
| 36 | |
| 37 | #ifndef _CPU_H_ |
| 38 | #define	_CPU_H_ |
| 39 | |
| 40 | /* |
| 41 | * Exported definitions unique to NetBSD/mips cpu support. |
| 42 | */ |
| 43 | |
| 44 | #ifdef _LOCORE |
| 45 | #error Use assym.h to get definitions from <mips/cpu.h> |
| 46 | #endif |
| 47 | |
| 48 | #if defined(_KERNEL) || defined(_KMEMUSER) |
| 49 | |
| 50 | #if defined(_KERNEL_OPT) |
| 51 | #include "opt_cputype.h" |
| 52 | #include "opt_gprof.h" |
| 53 | #include "opt_lockdebug.h" |
| 54 | #include "opt_multiprocessor.h" |
| 55 | #endif |
| 56 | |
| 57 | #include <mips/frame.h> |
| 58 | |
| 59 | #include <sys/cpu_data.h> |
| 60 | #include <sys/device_if.h> |
| 61 | #include <sys/evcnt.h> |
| 62 | #include <sys/kcpuset.h> |
| 63 | #include <sys/intr.h> |
| 64 | |
| 65 | typedef struct cpu_watchpoint { |
| 66 | 	register_t	cw_addr; |
| 67 | 	register_t	cw_mask; |
| 68 | 	uint32_t	cw_asid; |
| 69 | 	uint32_t	cw_mode; |
| 70 | } cpu_watchpoint_t; |
| 71 | |
| 72 | /* (abstract) mode bits */ |
| 73 | #define	CPUWATCH_WRITE	__BIT(0) |
| 74 | #define	CPUWATCH_READ	__BIT(1) |
| 75 | #define	CPUWATCH_EXEC	__BIT(2) |
| 76 | #define	CPUWATCH_MASK	__BIT(3) |
| 77 | #define	CPUWATCH_ASID	__BIT(4) |
| 78 | #define	CPUWATCH_RWX	(CPUWATCH_EXEC|CPUWATCH_READ|CPUWATCH_WRITE) |
| 79 | |
| 80 | #define	CPUWATCH_MAX	8	/* max possible number of watchpoints */ |
| 81 | |
| 82 | u_int		 cpuwatch_discover(void); |
| 83 | void		 cpuwatch_free(cpu_watchpoint_t *); |
| 84 | cpu_watchpoint_t *cpuwatch_alloc(void); |
| 85 | void		 cpuwatch_set_all(void); |
| 86 | void		 cpuwatch_clr_all(void); |
| 87 | void		 cpuwatch_set(cpu_watchpoint_t *); |
| 88 | void		 cpuwatch_clr(cpu_watchpoint_t *); |
| 89 | |
| 90 | struct cpu_info { |
| 91 | 	struct cpu_data ci_data;	/* MI per-cpu data */ |
| 92 | 	void *ci_nmi_stack;		/* NMI exception stack */ |
| 93 | 	struct cpu_softc *ci_softc;	/* chip-dependent hook */ |
| 94 | 	device_t ci_dev;		/* owning device */ |
| 95 | 	cpuid_t ci_cpuid;		/* Machine-level identifier */ |
| 96 | 	u_long ci_cctr_freq;		/* cycle counter frequency */ |
| 97 | 	u_long ci_cpu_freq;		/* CPU frequency */ |
| 98 | 	u_long ci_cycles_per_hz;	/* CPU freq / hz */ |
| 99 | 	u_long ci_divisor_delay;	/* for delay/DELAY */ |
| 100 | 	u_long ci_divisor_recip;	/* unused, for obsolete microtime(9) */ |
| 101 | 	struct lwp *ci_curlwp;		/* currently running lwp */ |
| 102 | 	struct lwp *ci_onproc;		/* current user LWP / kthread */ |
| 103 | 	volatile int ci_want_resched;	/* user preemption pending */ |
| 104 | 	int ci_mtx_count;		/* negative count of held mutexes */ |
| 105 | 	int ci_mtx_oldspl;		/* saved SPL value */ |
| 106 | 	int ci_idepth;			/* hardware interrupt depth */ |
| 107 | 	int ci_cpl;			/* current [interrupt] priority level */ |
| 108 | 	uint32_t ci_next_cp0_clk_intr;	/* for hard clock intr scheduling */ |
| 109 | 	struct evcnt ci_ev_count_compare;		/* hard clock intr counter */ |
| 110 | 	struct evcnt ci_ev_count_compare_missed;	/* hard clock miss counter */ |
| 111 | 	struct lwp *ci_softlwps[SOFTINT_COUNT]; |
| 112 | 	volatile u_int ci_softints; |
| 113 | 	struct evcnt ci_ev_fpu_loads;	/* fpu load counter */ |
| 114 | 	struct evcnt ci_ev_fpu_saves;	/* fpu save counter */ |
| 115 | 	struct evcnt ci_ev_dsp_loads;	/* dsp load counter */ |
| 116 | 	struct evcnt ci_ev_dsp_saves;	/* dsp save counter */ |
| 117 | 	struct evcnt ci_ev_tlbmisses; |
| 118 | |
| 119 | 	/* |
| 120 | 	 * Per-cpu pmap information |
| 121 | 	 */ |
| 122 | 	int ci_tlb_slot;		/* reserved tlb entry for cpu_info */ |
| 123 | 	u_int ci_pmap_asid_cur;		/* current ASID */ |
| 124 | 	struct pmap_tlb_info *ci_tlb_info; /* tlb information for this cpu */ |
| 125 | 	union pmap_segtab *ci_pmap_segtabs[2]; |
| 126 | #define	ci_pmap_user_segtab	ci_pmap_segtabs[0] |
| 127 | #define	ci_pmap_kern_segtab	ci_pmap_segtabs[1] |
| 128 | #ifdef _LP64 |
| 129 | 	union pmap_segtab *ci_pmap_seg0tabs[2]; |
| 130 | #define	ci_pmap_user_seg0tab	ci_pmap_seg0tabs[0] |
| 131 | #define	ci_pmap_kern_seg0tab	ci_pmap_seg0tabs[1] |
| 132 | #endif |
| 133 | 	vaddr_t ci_pmap_srcbase;	/* starting VA of ephemeral src space */ |
| 134 | 	vaddr_t ci_pmap_dstbase;	/* starting VA of ephemeral dst space */ |
| 135 | |
| 136 | 	u_int ci_cpuwatch_count;	/* number of watchpoints on this CPU */ |
| 137 | 	cpu_watchpoint_t ci_cpuwatch_tab[CPUWATCH_MAX]; |
| 138 | |
| 139 | #ifdef MULTIPROCESSOR |
| 140 | 	volatile u_long ci_flags; |
| 141 | 	volatile uint64_t ci_request_ipis; |
| 142 | 					/* bitmask of IPIs requested */ |
| 143 | 					/* use on chips where hw cannot pass tag */ |
| 144 | 	uint64_t ci_active_ipis;	/* bitmask of IPIs being serviced */ |
| 145 | 	uint32_t ci_ksp_tlb_slot;	/* tlb entry for kernel stack */ |
| 146 | 	struct evcnt ci_evcnt_all_ipis;	/* aggregated IPI counter */ |
| 147 | 	struct evcnt ci_evcnt_per_ipi[NIPIS];	/* individual IPI counters*/ |
| 148 | 	struct evcnt ci_evcnt_synci_activate_rqst; |
| 149 | 	struct evcnt ci_evcnt_synci_onproc_rqst; |
| 150 | 	struct evcnt ci_evcnt_synci_deferred_rqst; |
| 151 | 	struct evcnt ci_evcnt_synci_ipi_rqst; |
| 152 | |
| 153 | #define	CPUF_PRIMARY	__BIT(0)	/* CPU is primary CPU */ |
| 154 | #define	CPUF_PRESENT	__BIT(1)	/* CPU is present */ |
| 155 | #define	CPUF_RUNNING	__BIT(2)	/* CPU is running */ |
| 156 | #define	CPUF_PAUSED	__BIT(3)	/* CPU is paused */ |
| 157 | #define	CPUF_USERPMAP	__BIT(5)	/* CPU has a user pmap activated */ |
| 158 | 	kcpuset_t *ci_shootdowncpus; |
| 159 | 	kcpuset_t *ci_multicastcpus; |
| 160 | 	kcpuset_t *ci_watchcpus; |
| 161 | 	kcpuset_t *ci_ddbcpus; |
| 162 | #endif |
| 163 | #if defined(GPROF) && defined(MULTIPROCESSOR) |
| 164 | 	struct gmonparam *ci_gmon;	/* MI per-cpu GPROF */ |
| 165 | #endif |
| 166 | |
| 167 | }; |
| 168 | #endif /* _KERNEL || _KMEMUSER */ |
| 169 | |
| 170 | #ifdef _KERNEL |
| 171 | |
| 172 | #ifdef MULTIPROCESSOR |
| 173 | #define	CPU_INFO_ITERATOR		int |
| 174 | #define	CPU_INFO_FOREACH(cii, ci)	\ |
| 175 | cii = 0, ci = &cpu_info_store; \ |
| 176 | ci != NULL; \ |
| 177 | cii++, \ |
| 178 | ncpu ? (ci = cpu_infos[cii]) \ |
| 179 | : (ci = NULL) |
| 180 | #else |
| 181 | #define	CPU_INFO_ITERATOR		int __unused |
| 182 | #define	CPU_INFO_FOREACH(cii, ci)	\ |
| 183 | ci = &cpu_info_store; ci != NULL; ci = NULL |
| 184 | #endif |
| 185 | |
| 186 | /* Note: must be kept in sync with -ffixed-?? Makefile.mips. */ |
| 187 | //	MIPS_CURLWP moved to <mips/regdef.h> |
| 188 | #define	MIPS_CURLWP_QUOTED	"$24" |
| 189 | #define	MIPS_CURLWP_LABEL	_L_T8 |
| 190 | #define	MIPS_CURLWP_REG		_R_T8 |
| 191 | |
| 192 | extern struct cpu_info cpu_info_store; |
| 193 | #ifdef MULTIPROCESSOR |
| 194 | extern struct cpu_info *cpuid_infos[]; |
| 195 | #endif |
| 196 | register struct lwp *mips_curlwp asm(MIPS_CURLWP_QUOTED); |
| 197 | |
| 198 | #define	curlwp			mips_curlwp |
| 199 | #define	curcpu()		lwp_getcpu(curlwp) |
| 200 | #define	curpcb			((struct pcb *)lwp_getpcb(curlwp)) |
| 201 | #ifdef MULTIPROCESSOR |
| 202 | #define	cpu_number()		(curcpu()->ci_index) |
| 203 | #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY) |
| 204 | #else |
| 205 | #define	cpu_number()		(0) |
| 206 | #define	CPU_IS_PRIMARY(ci)	(true) |
| 207 | #endif |
| 208 | |
| 209 | /* |
| 210 | * definitions of cpu-dependent requirements |
| 211 | * referenced in generic code |
| 212 | */ |
| 213 | |
| 214 | /* |
| 215 | * Send an inter-processor interrupt to each other CPU (excludes curcpu()) |
| 216 | */ |
| 217 | void cpu_broadcast_ipi(int); |
| 218 | |
| 219 | /* |
| 220 | * Send an inter-processor interrupt to CPUs in kcpuset (excludes curcpu()) |
| 221 | */ |
| 222 | void cpu_multicast_ipi(const kcpuset_t *, int); |
| 223 | |
| 224 | /* |
| 225 | * Send an inter-processor interrupt to another CPU. |
| 226 | */ |
| 227 | int cpu_send_ipi(struct cpu_info *, int); |
| 228 | |
| 229 | /* |
| 230 | * cpu_intr(ppl, pc, status); (most state needed by clockframe) |
| 231 | */ |
| 232 | void cpu_intr(int, vaddr_t, uint32_t); |
| 233 | |
| 234 | /* |
| 235 | * Arguments to hardclock and gatherstats encapsulate the previous |
| 236 | * machine state in an opaque clockframe. |
| 237 | */ |
| 238 | struct clockframe { |
| 239 | 	vaddr_t		pc;	/* program counter at time of interrupt */ |
| 240 | 	uint32_t	sr;	/* status register at time of interrupt */ |
| 241 | 	bool		intr;	/* interrupted a interrupt */ |
| 242 | }; |
| 243 | |
| 244 | /* |
| 245 | * A port must provide CLKF_USERMODE() for use in machine-independent code. |
| 246 | * These differ on r4000 and r3000 systems; provide them in the |
| 247 | * port-dependent file that includes this one, using the macros below. |
| 248 | */ |
| 249 | uint32_t cpu_clkf_usermode_mask(void); |
| 250 | |
| 251 | #define	CLKF_USERMODE(framep)	((framep)->sr & cpu_clkf_usermode_mask()) |
| 252 | #define	CLKF_PC(framep)		((framep)->pc + 0) |
| 253 | #define	CLKF_INTR(framep)	((framep)->intr + 0) |
| 254 | |
| 255 | /* |
| 256 | * Misc prototypes and variable declarations. |
| 257 | */ |
| 258 | #define	LWP_PC(l)	cpu_lwp_pc(l) |
| 259 | |
| 260 | struct proc; |
| 261 | struct lwp; |
| 262 | struct pcb; |
| 263 | struct reg; |
| 264 | |
| 265 | /* |
| 266 | * Notify the current lwp (l) that it has a signal pending, |
| 267 | * process as soon as possible. |
| 268 | */ |
| 269 | void	cpu_signotify(struct lwp *); |
| 270 | |
| 271 | /* |
| 272 | * Give a profiling tick to the current process when the user profiling |
| 273 | * buffer pages are invalid. On the MIPS, request an ast to send us |
| 274 | * through trap, marking the proc as needing a profiling tick. |
| 275 | */ |
| 276 | void	cpu_need_proftick(struct lwp *); |
| 277 | |
| 278 | /* VM related hooks */ |
| 279 | void	cpu_boot_secondary_processors(void); |
| 280 | void *	cpu_uarea_alloc(bool); |
| 281 | bool	cpu_uarea_free(void *); |
| 282 | void	cpu_proc_fork(struct proc *, struct proc *); |
| 283 | vaddr_t	cpu_lwp_pc(struct lwp *); |
| 284 | #ifdef _LP64 |
| 285 | void	cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t); |
| 286 | #endif |
| 287 | |
| 288 | #endif /* _KERNEL */ |
| 289 | |
| 290 | /* |
| 291 | * CTL_MACHDEP definitions. |
| 292 | */ |
| 293 | #define	CPU_CONSDEV		1	/* dev_t: console terminal device */ |
| 294 | #define	CPU_BOOTED_KERNEL	2	/* string: booted kernel name */ |
| 295 | #define	CPU_ROOT_DEVICE		3	/* string: root device name */ |
| 296 | #define	CPU_LLSC		4	/* OS/CPU supports LL/SC instruction */ |
| 297 | #define	CPU_LMMI		5	/* Loongson multimedia instructions */ |
| 298 | |
| 299 | #endif /* _CPU_H_ */ |